From nobody Tue Feb 10 11:13:00 2026 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=intel.com Return-Path: Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 1548919396137695.500955767915; Wed, 30 Jan 2019 23:23:16 -0800 (PST) Received: from localhost ([127.0.0.1]:49946 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gp6gi-0001xq-O1 for importer@patchew.org; Thu, 31 Jan 2019 02:23:04 -0500 Received: from eggs.gnu.org ([209.51.188.92]:33413) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gp6ce-0006y8-42 for qemu-devel@nongnu.org; Thu, 31 Jan 2019 02:18:53 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gp6cd-00039V-5S for qemu-devel@nongnu.org; Thu, 31 Jan 2019 02:18:52 -0500 Received: from mga07.intel.com ([134.134.136.100]:58183) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gp6cc-000313-Ti for qemu-devel@nongnu.org; Thu, 31 Jan 2019 02:18:51 -0500 Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Jan 2019 23:18:50 -0800 Received: from vmmtaopc.sh.intel.com ([10.239.13.92]) by orsmga006.jf.intel.com with ESMTP; 30 Jan 2019 23:18:48 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,543,1539673200"; d="scan'208";a="112546120" From: Tao Xu To: eblake@redhat.com, mst@redhat.com, imammedo@redhat.com, xiaoguangrong.eric@gmail.com Date: Thu, 31 Jan 2019 15:16:55 +0800 Message-Id: <20190131071658.29120-6-tao3.xu@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190131071658.29120-1-tao3.xu@intel.com> References: <20190131071658.29120-1-tao3.xu@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.100 Subject: [Qemu-devel] [PATCH v3 5/8] numa: Extend the command-line to provide memory side cache information X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ehabkost@redhat.com, jingqi.liu@intel.com, tao3.xu@intel.com, qemu-devel@nongnu.org, pbonzini@redhat.com, danmei.wei@intel.com, karl.heubaum@oracle.com, rth@twiddle.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Liu Jingqi Add -numa hmat-cache option to provide Memory Side Cache Information. These memory attributes help to build Memory Side Cache Information Structure(s) in ACPI Heterogeneous Memory Attribute Table (HMAT). Signed-off-by: Liu Jingqi Signed-off-by: Tao Xu --- numa.c | 72 ++++++++++++++++++++++++++++++++++++++++++++++++++ qapi/misc.json | 72 ++++++++++++++++++++++++++++++++++++++++++++++++-- 2 files changed, 142 insertions(+), 2 deletions(-) diff --git a/numa.c b/numa.c index 97b77356ad..c2f4049689 100644 --- a/numa.c +++ b/numa.c @@ -298,6 +298,72 @@ static void parse_numa_hmat_lb(MachineState *ms, NumaH= matLBOptions *node, } } =20 +static void parse_numa_hmat_cache(MachineState *ms, NumaHmatCacheOptions *= node, + Error **errp) +{ + struct numa_hmat_cache_info *hmat_cache; + + if (node->node_id >=3D nb_numa_nodes) { + error_setg(errp, "Invalid node-id=3D%" PRIu32 + ", it should be less than %d.", + node->node_id, nb_numa_nodes); + return; + } + if (!numa_info[node->node_id].is_target) { + error_setg(errp, "Invalid node-id=3D%" PRIu32 + ", it isn't a target proximity domain.", + node->node_id); + return; + } + + if (node->total > MAX_HMAT_CACHE_LEVEL) { + error_setg(errp, "Invalid total=3D%" PRIu8 + ", it should be less than or equal to %d.", + node->total, MAX_HMAT_CACHE_LEVEL); + return; + } + if (node->level > node->total) { + error_setg(errp, "Invalid level=3D%" PRIu8 + ", it should be less than or equal to" + " total=3D%" PRIu8 ".", + node->level, node->total); + return; + } + if (hmat_cache_info[node->node_id][node->level]) { + error_setg(errp, "Duplicate configuration of the side cache for " + "node-id=3D%" PRIu32 " and level=3D%" PRIu8 ".", + node->node_id, node->level); + return; + } + + if ((node->level > 1) && + hmat_cache_info[node->node_id][node->level - 1] && + (node->size >=3D + hmat_cache_info[node->node_id][node->level - 1]->size)) { + error_setg(errp, "Invalid size=3D0x%" PRIx64 + ", the size of level=3D%" PRIu8 + " should be less than the size(0x%" PRIx64 + ") of level=3D%" PRIu8 ".", + node->size, node->level, + hmat_cache_info[node->node_id][node->level - 1]->size, + node->level - 1); + return; + } + + hmat_cache =3D g_malloc0(sizeof(*hmat_cache)); + + hmat_cache->mem_proximity =3D node->node_id; + hmat_cache->size =3D node->size; + hmat_cache->total_levels =3D node->total; + hmat_cache->level =3D node->level; + hmat_cache->associativity =3D node->assoc; + hmat_cache->write_policy =3D node->policy; + hmat_cache->line_size =3D node->line; + hmat_cache->num_smbios_handles =3D 0; + + hmat_cache_info[node->node_id][node->level] =3D hmat_cache; +} + static void set_numa_options(MachineState *ms, NumaOptions *object, Error **errp) { @@ -337,6 +403,12 @@ void set_numa_options(MachineState *ms, NumaOptions *o= bject, Error **errp) goto end; } break; + case NUMA_OPTIONS_TYPE_HMAT_CACHE: + parse_numa_hmat_cache(ms, &object->u.hmat_cache, &err); + if (err) { + goto end; + } + break; default: abort(); } diff --git a/qapi/misc.json b/qapi/misc.json index 10ba90bb39..58adca5ff1 100644 --- a/qapi/misc.json +++ b/qapi/misc.json @@ -2784,10 +2784,12 @@ # # @hmat-lb: memory latency and bandwidth information (Since: 4.0) # +# @hmat-cache: memory side cache information (Since: 4.0) +# # Since: 2.1 ## { 'enum': 'NumaOptionsType', - 'data': [ 'node', 'dist', 'cpu', 'hmat-lb' ] } + 'data': [ 'node', 'dist', 'cpu', 'hmat-lb', 'hmat-cache' ] } =20 ## # @NumaOptions: @@ -2803,7 +2805,8 @@ 'node': 'NumaNodeOptions', 'dist': 'NumaDistOptions', 'cpu': 'NumaCpuOptions', - 'hmat-lb': 'NumaHmatLBOptions' }} + 'hmat-lb': 'NumaHmatLBOptions', + 'hmat-cache': 'NumaHmatCacheOptions' }} =20 ## # @NumaNodeOptions: @@ -2953,6 +2956,71 @@ '*latency': 'uint16', '*bandwidth': 'uint16' }} =20 +## +# @HmatCacheAssociativity: +# +# Cache associativity in the Memory Side Cache +# Information Structure of HMAT +# +# @none: None +# +# @direct: Direct Mapped +# +# @complex: Complex Cache Indexing (implementation specific) +# +# Since: 4.0 +## +{ 'enum': 'HmatCacheAssociativity', + 'data': [ 'none', 'direct', 'complex' ] } + +## +# @HmatCacheWritePolicy: +# +# Cache write policy in the Memory Side Cache +# Information Structure of HMAT +# +# @none: None +# +# @write-back: Write Back (WB) +# +# @write-through: Write Through (WT) +# +# Since: 4.0 +## +{ 'enum': 'HmatCacheWritePolicy', + 'data': [ 'none', 'write-back', 'write-through' ] } + +## +# @NumaHmatCacheOptions: +# +# Set the memory side cache information for a given memory domain. +# +# @node-id: the memory proximity domain to which the memory belongs. +# +# @size: the size of memory side cache in bytes. +# +# @total: the total cache levels for this memory proximity domain. +# +# @level: the cache level described in this structure. +# +# @assoc: the cache associativity, none/direct-mapped/complex(complex cach= e indexing). + +# @policy: the write policy, none/write-back/write-through. +# +# @line: the cache Line size in bytes. +# +# Since: 4.0 +## +{ 'struct': 'NumaHmatCacheOptions', + 'data': { + 'node-id': 'uint32', + 'size': 'size', + 'total': 'uint8', + 'level': 'uint8', + 'assoc': 'HmatCacheAssociativity', + 'policy': 'HmatCacheWritePolicy', + 'line': 'uint16' }} + ## # @HostMemPolicy: # --=20 2.17.1