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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id b18sm97910681wrw.83.2019.01.28.10.11.20 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 28 Jan 2019 10:11:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=Ti2xj1PcDq61eeji1venmmD+roppUY4rxNqkk9jPSqc=; b=LdAyYGshOHISJc/vmgJ863LIrpVt4YjxX5Y8GQeaOwb784Fn8oyO+oFPWEVNlj8qg1 xL5q7HNpulzxepq0epdNrpVO1jU6hCoGDFhikq/aoAgECtjSj3wkoKXC7wCAoz0TmuJJ hlvJU4OjLKUw5NHCxoL2X2Jp58BDHb2D3la6Y= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Ti2xj1PcDq61eeji1venmmD+roppUY4rxNqkk9jPSqc=; b=CdkRmQvcCRrFQa7PfgS/yIFEGQPmUiQB+joSffYJbEzN95pKfzsOb7Pc6U2TtNMcdM kGpzNwgSdhbYLRqDd7o/t9faRcI+ysiPAQk0g61dERu6KAbjkc3NPS0gwNX6DVQ1cQf+ EdNdGN5qWBTGgUFCffBXGCPOQShvBM8VkhDa0I2VpvgMbPCCZcD1RUU5nRfm8L1s3A9m yLjZAHyGavLRy5LjGHFvcJUTOXJC6Gq2vjKOUQhRGj4v7ziy0rcI5S6u1Xbk5jqIzyTf 6B7TPUMfOOIu/ASgY0ac+SM9ZYLmaykrqTi6Hxyqjp3ckyQA87QN6divgR6h4SwdEKog Clbg== X-Gm-Message-State: AJcUukf3aRmT9HPYDY+G+bHKd/BgqieuzxjxdwFC9RKbmXesTKPoMW12 FEq0zYg8DFboymtQ6IW/Tb1oTBPpCWL3IA== X-Google-Smtp-Source: ALg8bN5wfu8fTw3LQr7QEoCQ8sFH7bx6DZWN/qIQ33oaN7KjWZwGoLyKpVHU2n+XFpOiQpMmGSWeSg== X-Received: by 2002:a7b:c1d7:: with SMTP id a23mr17169876wmj.48.1548699081545; Mon, 28 Jan 2019 10:11:21 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Date: Mon, 28 Jan 2019 18:10:46 +0000 Message-Id: <20190128181047.20781-26-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190128181047.20781-1-peter.maydell@linaro.org> References: <20190128181047.20781-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32c Subject: [Qemu-devel] [PULL 25/26] accel/tcg: Add cluster number to TCG TB hash X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Include the cluster number in the hash we use to look up TBs. This is important because a TB that is valid for one cluster at a given physical address and set of CPU flags is not necessarily valid for another: the two clusters may have different views of physical memory, or may have different CPU features (eg FPU present or absent). We put the cluster number in the high 8 bits of the TB cflags. This gives us up to 256 clusters, which should be enough for anybody. If we ever need more, or need more bits in cflags for other purposes, we could make tb_hash_func() take more data (and expand qemu_xxhash7() to qemu_xxhash8()). Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Edgar E. Iglesias Message-id: 20190121152218.9592-4-peter.maydell@linaro.org --- include/exec/exec-all.h | 4 +++- accel/tcg/cpu-exec.c | 3 +++ accel/tcg/translate-all.c | 3 +++ 3 files changed, 9 insertions(+), 1 deletion(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 815e5b1e838..aa7b81aaf01 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -351,9 +351,11 @@ struct TranslationBlock { #define CF_USE_ICOUNT 0x00020000 #define CF_INVALID 0x00040000 /* TB is stale. Set with @jmp_lock held = */ #define CF_PARALLEL 0x00080000 /* Generate code for a parallel context = */ +#define CF_CLUSTER_MASK 0xff000000 /* Top 8 bits are cluster ID */ +#define CF_CLUSTER_SHIFT 24 /* cflags' mask for hashing/comparison */ #define CF_HASH_MASK \ - (CF_COUNT_MASK | CF_LAST_IO | CF_USE_ICOUNT | CF_PARALLEL) + (CF_COUNT_MASK | CF_LAST_IO | CF_USE_ICOUNT | CF_PARALLEL | CF_CLUSTER= _MASK) =20 /* Per-vCPU dynamic tracing state used to generate this TB */ uint32_t trace_vcpu_dstate; diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 870027d4359..6c4a33262f5 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -325,6 +325,9 @@ TranslationBlock *tb_htable_lookup(CPUState *cpu, targe= t_ulong pc, struct tb_desc desc; uint32_t h; =20 + cf_mask &=3D ~CF_CLUSTER_MASK; + cf_mask |=3D cpu->cluster_index << CF_CLUSTER_SHIFT; + desc.env =3D (CPUArchState *)cpu->env_ptr; desc.cs_base =3D cs_base; desc.flags =3D flags; diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 8cb8c8870e6..7364e8a071f 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -1688,6 +1688,9 @@ TranslationBlock *tb_gen_code(CPUState *cpu, cflags |=3D CF_NOCACHE | 1; } =20 + cflags &=3D ~CF_CLUSTER_MASK; + cflags |=3D cpu->cluster_index << CF_CLUSTER_SHIFT; + buffer_overflow: tb =3D tb_alloc(pc); if (unlikely(!tb)) { --=20 2.20.1