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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id b18sm97910681wrw.83.2019.01.28.10.11.06 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 28 Jan 2019 10:11:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=DonBq4Yn8tJ5IMUhhyslVwxS/ZuXbCwOXQTV7SNCdIk=; b=NxNmIDTlqNMl8BGkWtDWHT3GKE1D/DZSYwv8/PoszEuC4lkGRhqSng+NEVngP0UJQs tzEM07XKwO3IXlFJcven9RezDCPat1bW9oHoasQwlG//OlX2HxwFeVUkbV5BHIgjmOo0 B81eaISB0BPrTiQpFqMIYEK4nf9NRkd1MdWg0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DonBq4Yn8tJ5IMUhhyslVwxS/ZuXbCwOXQTV7SNCdIk=; b=gwbkYjAV3rCnWlX/3llr5Np/8F+NpxBztPQIzBblidyos6hCT8lByifSPurOfxoc9i 2L/j5oyMx7q7t+gSkx03AJtXr763oSxVGgZxbuSfKeJkPtmzAJwrUZMr2OX+S2MYaDdW QVkxs1TsAvy3MkrbolXyQUdFy3R2BVNkRWfzEP8T1DEsgBJ5cDrpavTYdpdGEA/MQH/+ qq9x72uGWIRJZZNYZA7G5cuelXtnSVfRXYmT8Grv9zdQW15GGTREf9BnIi+gbUfLu2JT HyU6B059HH6/0fp77IML37EaS9c9K0hgM3DMuX1k+OUn+TXp2VgoBHGscRe8vcKJ/RlE 81cQ== X-Gm-Message-State: AHQUAuaJmvRAt6zx0eO6f19RmBlMgv0sSqFc+Wc1KPTupH1zBsWmHvXu xR9SejmXWpqBcKD9Paea3QecZ22txl8Mnw== X-Google-Smtp-Source: AHgI3IZ6FvBm+aZkfSEF2Rc4PQR8akntI36H040ge68mIjDxcn3u2jxTADwBMLzXT6cqbG38dNQnXg== X-Received: by 2002:adf:ed92:: with SMTP id c18mr15087471wro.194.1548699067911; Mon, 28 Jan 2019 10:11:07 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Date: Mon, 28 Jan 2019 18:10:35 +0000 Message-Id: <20190128181047.20781-15-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190128181047.20781-1-peter.maydell@linaro.org> References: <20190128181047.20781-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::442 Subject: [Qemu-devel] [PULL 14/26] tests/microbit-test: Make test independent of global_qtest X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: Julia Suvorova Using of global_qtest is not required here. Let's replace functions like readl() with the corresponding qtest_* counterparts. Signed-off-by: Julia Suvorova Reviewed-by: Philippe Mathieu-Daud=C3=A9 Acked-by: Thomas Huth Reviewed-by: Stefan Hajnoczi Message-id: 20190123120759.7162-3-jusual@mail.ru Signed-off-by: Peter Maydell --- tests/microbit-test.c | 247 ++++++++++++++++++++++-------------------- 1 file changed, 129 insertions(+), 118 deletions(-) diff --git a/tests/microbit-test.c b/tests/microbit-test.c index dcdc0cd41a5..afeb6b082a6 100644 --- a/tests/microbit-test.c +++ b/tests/microbit-test.c @@ -24,22 +24,22 @@ #include "hw/i2c/microbit_i2c.h" =20 /* Read a byte from I2C device at @addr from register @reg */ -static uint32_t i2c_read_byte(uint32_t addr, uint32_t reg) +static uint32_t i2c_read_byte(QTestState *qts, uint32_t addr, uint32_t reg) { uint32_t val; =20 - writel(NRF51_TWI_BASE + NRF51_TWI_REG_ADDRESS, addr); - writel(NRF51_TWI_BASE + NRF51_TWI_TASK_STARTTX, 1); - writel(NRF51_TWI_BASE + NRF51_TWI_REG_TXD, reg); - val =3D readl(NRF51_TWI_BASE + NRF51_TWI_EVENT_TXDSENT); + qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_REG_ADDRESS, addr); + qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_TASK_STARTTX, 1); + qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_REG_TXD, reg); + val =3D qtest_readl(qts, NRF51_TWI_BASE + NRF51_TWI_EVENT_TXDSENT); g_assert_cmpuint(val, =3D=3D, 1); - writel(NRF51_TWI_BASE + NRF51_TWI_TASK_STOP, 1); + qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_TASK_STOP, 1); =20 - writel(NRF51_TWI_BASE + NRF51_TWI_TASK_STARTRX, 1); - val =3D readl(NRF51_TWI_BASE + NRF51_TWI_EVENT_RXDREADY); + qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_TASK_STARTRX, 1); + val =3D qtest_readl(qts, NRF51_TWI_BASE + NRF51_TWI_EVENT_RXDREADY); g_assert_cmpuint(val, =3D=3D, 1); - val =3D readl(NRF51_TWI_BASE + NRF51_TWI_REG_RXD); - writel(NRF51_TWI_BASE + NRF51_TWI_TASK_STOP, 1); + val =3D qtest_readl(qts, NRF51_TWI_BASE + NRF51_TWI_REG_RXD); + qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_TASK_STOP, 1); =20 return val; } @@ -47,22 +47,25 @@ static uint32_t i2c_read_byte(uint32_t addr, uint32_t r= eg) static void test_microbit_i2c(void) { uint32_t val; + QTestState *qts =3D qtest_init("-M microbit"); =20 /* We don't program pins/irqs but at least enable the device */ - writel(NRF51_TWI_BASE + NRF51_TWI_REG_ENABLE, 5); + qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_REG_ENABLE, 5); =20 /* MMA8653 magnetometer detection */ - val =3D i2c_read_byte(0x3A, 0x0D); + val =3D i2c_read_byte(qts, 0x3A, 0x0D); g_assert_cmpuint(val, =3D=3D, 0x5A); =20 - val =3D i2c_read_byte(0x3A, 0x0D); + val =3D i2c_read_byte(qts, 0x3A, 0x0D); g_assert_cmpuint(val, =3D=3D, 0x5A); =20 /* LSM303 accelerometer detection */ - val =3D i2c_read_byte(0x3C, 0x4F); + val =3D i2c_read_byte(qts, 0x3C, 0x4F); g_assert_cmpuint(val, =3D=3D, 0x40); =20 - writel(NRF51_TWI_BASE + NRF51_TWI_REG_ENABLE, 0); + qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_REG_ENABLE, 0); + + qtest_quit(qts); } =20 static void test_nrf51_gpio(void) @@ -80,220 +83,228 @@ static void test_nrf51_gpio(void) {NRF51_GPIO_REG_DIRCLR, 0x00000000} }; =20 + QTestState *qts =3D qtest_init("-M microbit"); + /* Check reset state */ for (i =3D 0; i < ARRAY_SIZE(reset_state); i++) { expected =3D reset_state[i].expected; - actual =3D readl(NRF51_GPIO_BASE + reset_state[i].addr); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + reset_state[i].addr); g_assert_cmpuint(actual, =3D=3D, expected); } =20 for (i =3D 0; i < NRF51_GPIO_PINS; i++) { expected =3D 0x00000002; - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START + i * = 4); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + + NRF51_GPIO_REG_CNF_START + i * 4); g_assert_cmpuint(actual, =3D=3D, expected); } =20 /* Check dir bit consistency between dir and cnf */ /* Check set via DIRSET */ expected =3D 0x80000001; - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIRSET, expected); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIRSET, expected); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR); g_assert_cmpuint(actual, =3D=3D, expected); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) & 0x01; + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) + & 0x01; g_assert_cmpuint(actual, =3D=3D, 0x01); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01; + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) = & 0x01; g_assert_cmpuint(actual, =3D=3D, 0x01); =20 /* Check clear via DIRCLR */ - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIRCLR, 0x80000001); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIRCLR, 0x80000001); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR); g_assert_cmpuint(actual, =3D=3D, 0x00000000); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) & 0x01; + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) + & 0x01; g_assert_cmpuint(actual, =3D=3D, 0x00); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01; + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) = & 0x01; g_assert_cmpuint(actual, =3D=3D, 0x00); =20 /* Check set via DIR */ expected =3D 0x80000001; - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR, expected); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR, expected); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR); g_assert_cmpuint(actual, =3D=3D, expected); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) & 0x01; + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) + & 0x01; g_assert_cmpuint(actual, =3D=3D, 0x01); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01; + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) = & 0x01; g_assert_cmpuint(actual, =3D=3D, 0x01); =20 /* Reset DIR */ - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR, 0x00000000); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR, 0x00000000); =20 /* Check Input propagates */ - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x00); - qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0,= 0); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x00); + qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, 0); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x0= 1; g_assert_cmpuint(actual, =3D=3D, 0x00); - qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0,= 1); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, 1); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x0= 1; g_assert_cmpuint(actual, =3D=3D, 0x01); - qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0,= -1); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, -1); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x0= 1; g_assert_cmpuint(actual, =3D=3D, 0x01); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02); =20 /* Check pull-up working */ - qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0,= 0); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0000); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, 0); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0000); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x0= 1; g_assert_cmpuint(actual, =3D=3D, 0x00); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b1110); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b1110); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x0= 1; g_assert_cmpuint(actual, =3D=3D, 0x01); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02); =20 /* Check pull-down working */ - qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0,= 1); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0000); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, 1); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0000); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x0= 1; g_assert_cmpuint(actual, =3D=3D, 0x01); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0110); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0110); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x0= 1; g_assert_cmpuint(actual, =3D=3D, 0x00); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02); - qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0,= -1); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02); + qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, -1); =20 /* Check Output propagates */ - irq_intercept_out("/machine/nrf51"); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0011); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01); - g_assert_true(get_irq(0)); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTCLR, 0x01); - g_assert_false(get_irq(0)); + qtest_irq_intercept_out(qts, "/machine/nrf51"); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0011); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01); + g_assert_true(qtest_get_irq(qts, 0)); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTCLR, 0x01); + g_assert_false(qtest_get_irq(qts, 0)); =20 /* Check self-stimulation */ - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b01); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b01); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x0= 1; g_assert_cmpuint(actual, =3D=3D, 0x01); =20 - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTCLR, 0x01); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTCLR, 0x01); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x0= 1; g_assert_cmpuint(actual, =3D=3D, 0x00); =20 /* * Check short-circuit - generates an guest_error which must be checked * manually as long as qtest can not scan qemu_log messages */ - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b01); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01); - qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0,= 0); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b01); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01); + qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, 0); + + qtest_quit(qts); } =20 -static void timer_task(hwaddr task) +static void timer_task(QTestState *qts, hwaddr task) { - writel(NRF51_TIMER_BASE + task, NRF51_TRIGGER_TASK); + qtest_writel(qts, NRF51_TIMER_BASE + task, NRF51_TRIGGER_TASK); } =20 -static void timer_clear_event(hwaddr event) +static void timer_clear_event(QTestState *qts, hwaddr event) { - writel(NRF51_TIMER_BASE + event, NRF51_EVENT_CLEAR); + qtest_writel(qts, NRF51_TIMER_BASE + event, NRF51_EVENT_CLEAR); } =20 -static void timer_set_bitmode(uint8_t mode) +static void timer_set_bitmode(QTestState *qts, uint8_t mode) { - writel(NRF51_TIMER_BASE + NRF51_TIMER_REG_BITMODE, mode); + qtest_writel(qts, NRF51_TIMER_BASE + NRF51_TIMER_REG_BITMODE, mode); } =20 -static void timer_set_prescaler(uint8_t prescaler) +static void timer_set_prescaler(QTestState *qts, uint8_t prescaler) { - writel(NRF51_TIMER_BASE + NRF51_TIMER_REG_PRESCALER, prescaler); + qtest_writel(qts, NRF51_TIMER_BASE + NRF51_TIMER_REG_PRESCALER, presca= ler); } =20 -static void timer_set_cc(size_t idx, uint32_t value) +static void timer_set_cc(QTestState *qts, size_t idx, uint32_t value) { - writel(NRF51_TIMER_BASE + NRF51_TIMER_REG_CC0 + idx * 4, value); + qtest_writel(qts, NRF51_TIMER_BASE + NRF51_TIMER_REG_CC0 + idx * 4, va= lue); } =20 -static void timer_assert_events(uint32_t ev0, uint32_t ev1, uint32_t ev2, - uint32_t ev3) +static void timer_assert_events(QTestState *qts, uint32_t ev0, uint32_t ev= 1, + uint32_t ev2, uint32_t ev3) { - g_assert(readl(NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_0) =3D=3D = ev0); - g_assert(readl(NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_1) =3D=3D = ev1); - g_assert(readl(NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_2) =3D=3D = ev2); - g_assert(readl(NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_3) =3D=3D = ev3); + g_assert(qtest_readl(qts, NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE= _0) + =3D=3D ev0); + g_assert(qtest_readl(qts, NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE= _1) + =3D=3D ev1); + g_assert(qtest_readl(qts, NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE= _2) + =3D=3D ev2); + g_assert(qtest_readl(qts, NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE= _3) + =3D=3D ev3); } =20 static void test_nrf51_timer(void) { uint32_t steps_to_overflow =3D 408; + QTestState *qts =3D qtest_init("-M microbit"); =20 /* Compare Match */ - timer_task(NRF51_TIMER_TASK_STOP); - timer_task(NRF51_TIMER_TASK_CLEAR); + timer_task(qts, NRF51_TIMER_TASK_STOP); + timer_task(qts, NRF51_TIMER_TASK_CLEAR); =20 - timer_clear_event(NRF51_TIMER_EVENT_COMPARE_0); - timer_clear_event(NRF51_TIMER_EVENT_COMPARE_1); - timer_clear_event(NRF51_TIMER_EVENT_COMPARE_2); - timer_clear_event(NRF51_TIMER_EVENT_COMPARE_3); + timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_0); + timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_1); + timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_2); + timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_3); =20 - timer_set_bitmode(NRF51_TIMER_WIDTH_16); /* 16 MHz Timer */ - timer_set_prescaler(0); + timer_set_bitmode(qts, NRF51_TIMER_WIDTH_16); /* 16 MHz Timer */ + timer_set_prescaler(qts, 0); /* Swept over in first step */ - timer_set_cc(0, 2); + timer_set_cc(qts, 0, 2); /* Barely miss on first step */ - timer_set_cc(1, 162); + timer_set_cc(qts, 1, 162); /* Spot on on third step */ - timer_set_cc(2, 480); + timer_set_cc(qts, 2, 480); =20 - timer_assert_events(0, 0, 0, 0); + timer_assert_events(qts, 0, 0, 0, 0); =20 - timer_task(NRF51_TIMER_TASK_START); - clock_step(10000); - timer_assert_events(1, 0, 0, 0); + timer_task(qts, NRF51_TIMER_TASK_START); + qtest_clock_step(qts, 10000); + timer_assert_events(qts, 1, 0, 0, 0); =20 /* Swept over on first overflow */ - timer_set_cc(3, 114); + timer_set_cc(qts, 3, 114); =20 - clock_step(10000); - timer_assert_events(1, 1, 0, 0); + qtest_clock_step(qts, 10000); + timer_assert_events(qts, 1, 1, 0, 0); =20 - clock_step(10000); - timer_assert_events(1, 1, 1, 0); + qtest_clock_step(qts, 10000); + timer_assert_events(qts, 1, 1, 1, 0); =20 /* Wrap time until internal counter overflows */ while (steps_to_overflow--) { - timer_assert_events(1, 1, 1, 0); - clock_step(10000); + timer_assert_events(qts, 1, 1, 1, 0); + qtest_clock_step(qts, 10000); } =20 - timer_assert_events(1, 1, 1, 1); + timer_assert_events(qts, 1, 1, 1, 1); =20 - timer_clear_event(NRF51_TIMER_EVENT_COMPARE_0); - timer_clear_event(NRF51_TIMER_EVENT_COMPARE_1); - timer_clear_event(NRF51_TIMER_EVENT_COMPARE_2); - timer_clear_event(NRF51_TIMER_EVENT_COMPARE_3); - timer_assert_events(0, 0, 0, 0); + timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_0); + timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_1); + timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_2); + timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_3); + timer_assert_events(qts, 0, 0, 0, 0); =20 - timer_task(NRF51_TIMER_TASK_STOP); + timer_task(qts, NRF51_TIMER_TASK_STOP); =20 /* Test Proposal: Stop/Shutdown */ /* Test Proposal: Shortcut Compare -> Clear */ /* Test Proposal: Shortcut Compare -> Stop */ /* Test Proposal: Counter Mode */ + + qtest_quit(qts); } =20 int main(int argc, char **argv) { - int ret; - g_test_init(&argc, &argv, NULL); =20 - global_qtest =3D qtest_initf("-machine microbit"); - qtest_add_func("/microbit/nrf51/gpio", test_nrf51_gpio); qtest_add_func("/microbit/nrf51/timer", test_nrf51_timer); qtest_add_func("/microbit/microbit/i2c", test_microbit_i2c); =20 - ret =3D g_test_run(); - - qtest_quit(global_qtest); - return ret; + return g_test_run(); } --=20 2.20.1