From nobody Fri Nov 7 17:10:24 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 15484543007534.345742841230617; Fri, 25 Jan 2019 14:11:40 -0800 (PST) Received: from localhost ([127.0.0.1]:51388 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gn9hL-0000I5-Lp for importer@patchew.org; Fri, 25 Jan 2019 17:11:39 -0500 Received: from eggs.gnu.org ([209.51.188.92]:59772) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gn9co-0005Ff-0U for qemu-devel@nongnu.org; Fri, 25 Jan 2019 17:06:59 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gn9cm-0006ba-8S for qemu-devel@nongnu.org; Fri, 25 Jan 2019 17:06:57 -0500 Received: from mx1.redhat.com ([209.132.183.28]:47576) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gn9cl-0006a7-Te for qemu-devel@nongnu.org; Fri, 25 Jan 2019 17:06:56 -0500 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 234A57E9E1; Fri, 25 Jan 2019 22:06:54 +0000 (UTC) Received: from probe.bos.redhat.com (dhcp-17-168.bos.redhat.com [10.18.17.168]) by smtp.corp.redhat.com (Postfix) with ESMTP id 8C25B5B6B0; Fri, 25 Jan 2019 22:06:53 +0000 (UTC) From: John Snow To: qemu-devel@nongnu.org Date: Fri, 25 Jan 2019 17:06:44 -0500 Message-Id: <20190125220648.28164-5-jsnow@redhat.com> In-Reply-To: <20190125220648.28164-1-jsnow@redhat.com> References: <20190125220648.28164-1-jsnow@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Fri, 25 Jan 2019 22:06:54 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 4/8] ide: Get rid of CMD646BAR struct X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, jsnow@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: BALATON Zoltan Now that no CMD646 specific parts are left in CMD646BAR (all remaining members are really PCI IDE specific) this struct can be deleted moving the memory regions for PCI IDE BARs to PCIIDEState where they better belong. The CMD646 PCI IDE model is adjusted accordingly. Signed-off-by: BALATON Zoltan Tested-by: Mark Cave-Ayland Reviewed-by: John Snow Message-id: 4b6cb2ae150dc0d21178209e4beb1e35140a7325.1547166960.git.balaton= @eik.bme.hu Signed-off-by: John Snow --- hw/ide/cmd646.c | 33 ++++++++++++++++----------------- include/hw/ide/pci.h | 10 ++-------- 2 files changed, 18 insertions(+), 25 deletions(-) diff --git a/hw/ide/cmd646.c b/hw/ide/cmd646.c index 95f0df9742..5a5679134a 100644 --- a/hw/ide/cmd646.c +++ b/hw/ide/cmd646.c @@ -50,17 +50,6 @@ =20 static void cmd646_update_irq(PCIDevice *pd); =20 -static void setup_cmd646_bar(PCIIDEState *d, int bus_num) -{ - IDEBus *bus =3D &d->bus[bus_num]; - CMD646BAR *bar =3D &d->cmd646_bar[bus_num]; - - memory_region_init_io(&bar->cmd, OBJECT(d), &pci_ide_cmd_le_ops, bus, - "cmd646-cmd", 4); - memory_region_init_io(&bar->data, OBJECT(d), &pci_ide_data_le_ops, bus, - "cmd646-data", 8); -} - static void cmd646_update_dma_interrupts(PCIDevice *pd) { /* Sync DMA interrupt status from UDMA interrupt status */ @@ -277,12 +266,22 @@ static void pci_cmd646_ide_realize(PCIDevice *dev, Er= ror **errp) dev->wmask[MRDMODE] =3D 0x0; dev->w1cmask[MRDMODE] =3D MRDMODE_INTR_CH0 | MRDMODE_INTR_CH1; =20 - setup_cmd646_bar(d, 0); - setup_cmd646_bar(d, 1); - pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &d->cmd646_bar[0].= data); - pci_register_bar(dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &d->cmd646_bar[0].= cmd); - pci_register_bar(dev, 2, PCI_BASE_ADDRESS_SPACE_IO, &d->cmd646_bar[1].= data); - pci_register_bar(dev, 3, PCI_BASE_ADDRESS_SPACE_IO, &d->cmd646_bar[1].= cmd); + memory_region_init_io(&d->data_bar[0], OBJECT(d), &pci_ide_data_le_ops, + &d->bus[0], "cmd646-data0", 8); + pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &d->data_bar[0]); + + memory_region_init_io(&d->cmd_bar[0], OBJECT(d), &pci_ide_cmd_le_ops, + &d->bus[0], "cmd646-cmd0", 4); + pci_register_bar(dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &d->cmd_bar[0]); + + memory_region_init_io(&d->data_bar[1], OBJECT(d), &pci_ide_data_le_ops, + &d->bus[1], "cmd646-data1", 8); + pci_register_bar(dev, 2, PCI_BASE_ADDRESS_SPACE_IO, &d->data_bar[1]); + + memory_region_init_io(&d->cmd_bar[1], OBJECT(d), &pci_ide_cmd_le_ops, + &d->bus[1], "cmd646-cmd1", 4); + pci_register_bar(dev, 3, PCI_BASE_ADDRESS_SPACE_IO, &d->cmd_bar[1]); + bmdma_setup_bar(d); pci_register_bar(dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &d->bmdma_bar); =20 diff --git a/include/hw/ide/pci.h b/include/hw/ide/pci.h index 3110633e4c..a9f2c33e68 100644 --- a/include/hw/ide/pci.h +++ b/include/hw/ide/pci.h @@ -37,11 +37,6 @@ typedef struct BMDMAState { struct PCIIDEState *pci_dev; } BMDMAState; =20 -typedef struct CMD646BAR { - MemoryRegion cmd; - MemoryRegion data; -} CMD646BAR; - #define TYPE_PCI_IDE "pci-ide" #define PCI_IDE(obj) OBJECT_CHECK(PCIIDEState, (obj), TYPE_PCI_IDE) =20 @@ -54,17 +49,16 @@ typedef struct PCIIDEState { BMDMAState bmdma[2]; uint32_t secondary; /* used only for cmd646 */ MemoryRegion bmdma_bar; - CMD646BAR cmd646_bar[2]; /* used only for cmd646 */ + MemoryRegion cmd_bar[2]; + MemoryRegion data_bar[2]; } PCIIDEState; =20 - static inline IDEState *bmdma_active_if(BMDMAState *bmdma) { assert(bmdma->bus->retry_unit !=3D (uint8_t)-1); return bmdma->bus->ifs + bmdma->bus->retry_unit; } =20 - void bmdma_init(IDEBus *bus, BMDMAState *bm, PCIIDEState *d); void bmdma_cmd_writeb(BMDMAState *bm, uint32_t val); extern MemoryRegionOps bmdma_addr_ioport_ops; --=20 2.17.2