From nobody Fri Nov 7 17:09:22 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1548457587616686.7519908088253; Fri, 25 Jan 2019 15:06:27 -0800 (PST) Received: from localhost ([127.0.0.1]:52141 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gnAYJ-0003g2-NJ for importer@patchew.org; Fri, 25 Jan 2019 18:06:23 -0500 Received: from eggs.gnu.org ([209.51.188.92]:52539) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gn9M7-0001SV-Q0 for qemu-devel@nongnu.org; Fri, 25 Jan 2019 16:49:44 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gn9M6-00034j-Oq for qemu-devel@nongnu.org; Fri, 25 Jan 2019 16:49:43 -0500 Received: from poy.remlab.net ([2001:41d0:2:5a1a::]:42980 helo=ns207790.ip-94-23-215.eu) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gn9M4-0002wd-4s; Fri, 25 Jan 2019 16:49:40 -0500 Received: from basile.remlab.net (ip6-localhost [IPv6:::1]) by ns207790.ip-94-23-215.eu (Postfix) with ESMTP id 7918C5FA32; Fri, 25 Jan 2019 22:49:26 +0100 (CET) From: =?UTF-8?q?R=C3=A9mi=20Denis-Courmont?= To: qemu-arm@nongnu.org Date: Fri, 25 Jan 2019 23:49:24 +0200 Message-Id: <20190125214926.3204-1-remi@remlab.net> X-Mailer: git-send-email 2.20.1 In-Reply-To: <1648289.tQCHxfjYn9@basile.remlab.net> References: <1648289.tQCHxfjYn9@basile.remlab.net> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:41d0:2:5a1a:: X-Mailman-Approved-At: Fri, 25 Jan 2019 18:02:26 -0500 Subject: [Qemu-devel] [PATCH 1/3] target/arm: fix AArch64 virtual address space size X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Remi Denis-Courmont Since QEMU does not support the ARMv8.2-LVA, Large Virtual Address, extension (yet), the VA address space is signed 48-bits. User mode can only handle the positive half of the address space, so that makes a limit of 47 bits. (With LVA, it would be 52 and 51 bits respectively.) The incorrectly large address space conflicts with PAuth instructions, which bits 48-54 and 56-63 for the pointer authentication code. This also conflicts with (as yet unsupported by QEMU) data tagging and with the ARMv8.5-MTE extension. Signed-off-by: Remi Denis-Courmont --- target/arm/cpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index ff81db420d..2ccd04b8f7 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -2503,7 +2503,7 @@ bool write_cpustate_to_list(ARMCPU *cpu); =20 #if defined(TARGET_AARCH64) # define TARGET_PHYS_ADDR_SPACE_BITS 48 -# define TARGET_VIRT_ADDR_SPACE_BITS 64 +# define TARGET_VIRT_ADDR_SPACE_BITS 47 #else # define TARGET_PHYS_ADDR_SPACE_BITS 40 # define TARGET_VIRT_ADDR_SPACE_BITS 32 --=20 2.20.1