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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id t5sm45014921wmg.43.2019.01.25.10.26.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 25 Jan 2019 10:26:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=VAdJTXCL7K1e+WuNeCE2OxhDcHh7qYlDwJMPwNMUGu8=; b=cDf7zm1z7gDL7QXYAHtZAd0iP7NbLYvxE5P3iiqlFs+S1HajR2apxlfIu1UAgl7q66 UrAMlrRyo6A7jNZfBN2KWWax6+JwEDJEvGMCKqbIZTasPCn5qa6/BUv177o8kTOpwW0s 2Pbmyk3Wuq1HR3w3cBwoC3ncaAn1bDk+cI5T4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=VAdJTXCL7K1e+WuNeCE2OxhDcHh7qYlDwJMPwNMUGu8=; b=OYuRz0z09GdZ2ebkMWFCnwTSYuV+KojGLXw7fVOZb1NXfIXuNfA1+3r66T2BMtcPFq 94DWXP7BDnxIffTLrtMhzs/Z1lY0dvX6Nhb/srWQ9lpkrGQR2w5aIkrvM/CneMpncpkR RuzC1q/ftfhw+3SldEBjSkIL55Cqnp4Ic9zeQ8bBdFMVznrCJWPj5kz/iT0/5h2Jwhyv KxhoAHMlE3gJFCBZlLakVTGfbe2K4hE/7sFCT8XMdMcKhsYvXAwkReG6H6cyJXt4LQbm dzSpeJziDm4IYIdhZZdk8ckE2T+nApSXgcU8dZ0U4wlf9HlGW4B/ND6aAFtgP9+rYBVZ XBGg== X-Gm-Message-State: AJcUukeI6wcLW1ajk9NOlc2uEqcc35JzlVbCMJMLnCtVxzfkBkHiux8m OSZO560jqWG3Da2dZwYLyJITvQ== X-Google-Smtp-Source: ALg8bN6qfCy3xeF6FX2KffuBn67w2pIZCcKWm1sXuO3HftMwF3Pe+KBS7FWGu+/GSkQJG1VLpWiGuA== X-Received: by 2002:adf:a357:: with SMTP id d23mr13170781wrb.195.1548440796084; Fri, 25 Jan 2019 10:26:36 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Fri, 25 Jan 2019 18:26:25 +0000 Message-Id: <20190125182626.9221-7-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190125182626.9221-1-peter.maydell@linaro.org> References: <20190125182626.9221-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::444 Subject: [Qemu-devel] [PATCH 6/7] target/arm/translate-a64: Don't underdecode FP insns X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Desnogues , patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" In the encoding groups * floating-point data-processing (1 source) * floating-point data-processing (2 source) * floating-point data-processing (3 source) * floating-point immediate * floating-point compare * floating-ponit conditional compare * floating-point conditional select bit 31 is M and bit 29 is S (and bit 30 is 0, already checked at this point in the decode). None of these groups allocate any encoding for M=3D1 or S=3D1. We checked this in disas_fp_compare(), disas_fp_ccomp() and disas_fp_csel(), but missed it in disas_fp_1src(), disas_fp_2src(), disas_fp_3src() and disas_fp_imm(). We also missed that in the fp immediate encoding the imm5 field must be all zeroes. Correctly UNDEF the unallocated encodings here. Reported-by: Laurent Desnogues Signed-off-by: Peter Maydell Reviewed-by: Laurent Desnogues --- target/arm/translate-a64.c | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index efd2f6490b5..474d9bfb5f0 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5636,11 +5636,17 @@ static void handle_fp_fcvt(DisasContext *s, int opc= ode, */ static void disas_fp_1src(DisasContext *s, uint32_t insn) { + int mos =3D extract32(insn, 29, 3); int type =3D extract32(insn, 22, 2); int opcode =3D extract32(insn, 15, 6); int rn =3D extract32(insn, 5, 5); int rd =3D extract32(insn, 0, 5); =20 + if (mos) { + unallocated_encoding(s); + return; + } + switch (opcode) { case 0x4: case 0x5: case 0x7: { @@ -5867,13 +5873,14 @@ static void handle_fp_2src_half(DisasContext *s, in= t opcode, */ static void disas_fp_2src(DisasContext *s, uint32_t insn) { + int mos =3D extract32(insn, 29, 3); int type =3D extract32(insn, 22, 2); int rd =3D extract32(insn, 0, 5); int rn =3D extract32(insn, 5, 5); int rm =3D extract32(insn, 16, 5); int opcode =3D extract32(insn, 12, 4); =20 - if (opcode > 8) { + if (opcode > 8 || mos) { unallocated_encoding(s); return; } @@ -6028,6 +6035,7 @@ static void handle_fp_3src_half(DisasContext *s, bool= o0, bool o1, */ static void disas_fp_3src(DisasContext *s, uint32_t insn) { + int mos =3D extract32(insn, 29, 3); int type =3D extract32(insn, 22, 2); int rd =3D extract32(insn, 0, 5); int rn =3D extract32(insn, 5, 5); @@ -6036,6 +6044,11 @@ static void disas_fp_3src(DisasContext *s, uint32_t = insn) bool o0 =3D extract32(insn, 15, 1); bool o1 =3D extract32(insn, 21, 1); =20 + if (mos) { + unallocated_encoding(s); + return; + } + switch (type) { case 0: if (!fp_access_check(s)) { @@ -6105,12 +6118,19 @@ uint64_t vfp_expand_imm(int size, uint8_t imm8) static void disas_fp_imm(DisasContext *s, uint32_t insn) { int rd =3D extract32(insn, 0, 5); + int imm5 =3D extract32(insn, 5, 5); int imm8 =3D extract32(insn, 13, 8); int type =3D extract32(insn, 22, 2); + int mos =3D extract32(insn, 29, 3); uint64_t imm; TCGv_i64 tcg_res; TCGMemOp sz; =20 + if (mos || imm5) { + unallocated_encoding(s); + return; + } + switch (type) { case 0: sz =3D MO_32; --=20 2.20.1