From nobody Fri Nov 7 09:08:04 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1548245689832685.4116258478394; Wed, 23 Jan 2019 04:14:49 -0800 (PST) Received: from localhost ([127.0.0.1]:33342 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gmHQZ-0003on-Fu for importer@patchew.org; Wed, 23 Jan 2019 07:14:43 -0500 Received: from eggs.gnu.org ([209.51.188.92]:38553) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gmHOR-0002UZ-PP for qemu-devel@nongnu.org; Wed, 23 Jan 2019 07:12:32 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gmHKg-0007BB-2Y for qemu-devel@nongnu.org; Wed, 23 Jan 2019 07:08:39 -0500 Received: from smtp56.i.mail.ru ([217.69.128.36]:38036) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gmHKf-00074c-Pr for qemu-devel@nongnu.org; Wed, 23 Jan 2019 07:08:37 -0500 Received: by smtp56.i.mail.ru with esmtpa (envelope-from ) id 1gmHKL-0003WT-2s; Wed, 23 Jan 2019 15:08:17 +0300 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mail.ru; s=mail2; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=5cwIC3QlsSt8YunUehNrJRU7VDOOU9dlcpHAvJgNTs0=; b=u5vt26EJW3014PIBigNi9Lj3CEvwqSEHSHy7g1OV0aohPj4xfhzYTNDwW3T1GNBhqHHKOYu8cFzYdFWvB4Hl8pir+xpOiHL7osZin4bR+pvxySUUb+baWelKGhX1Y42yIahJ4/ZzjJ8xQHZ6pJmZjkpy96GDmHxycf73LN2Fe9U=; To: qemu-devel@nongnu.org Date: Wed, 23 Jan 2019 15:07:57 +0300 Message-Id: <20190123120759.7162-2-jusual@mail.ru> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190123120759.7162-1-jusual@mail.ru> References: <20190123120759.7162-1-jusual@mail.ru> Authentication-Results: smtp56.i.mail.ru; auth=pass smtp.auth=jusual@mail.ru smtp.mailfrom=jusual@mail.ru X-77F55803: 257C4F86AB09C89C5A78504BD2AC2941988784FC6C4AE31FD1AC456597854A5D4FD8180628FFAC00C5A562B592A88AAE632A6FEBC0D23EEC X-7FA49CB5: 0D63561A33F958A5B0FDB41E7D3F0CF3A6CDEC89DAF0D716CE7BAE2148EA70B38941B15DA834481FA18204E546F3947CEDCF5861DED71B2F389733CBF5DBD5E9C8A9BA7A39EFB7666BA297DBC24807EA117882F44604297287769387670735209ECD01F8117BC8BEA471835C12D1D977C4224003CC8364767815B9869FA544D8D32BA5DBAC0009BE9E8FC8737B5C2249B1BF8B3EEAB4192B3AA81AA40904B5D9CF19DD082D7633A0E7DDDDC251EA7DABD81D268191BDAD3D78DA827A17800CE74A4E7D6706BFD61ECD04E86FAF290E2D40A5AABA2AD3711975ECD9A6C639B01B78DA827A17800CE7B1AEE7E0193F113CD623B8EECA14F8ED75ECD9A6C639B01B4E70A05D1297E1BBC6867C52282FAC8518D57E64F6AADFC527F269C8F02392CD5571747095F342E88FB05168BE4CE3AF X-Mailru-Sender: 3BB5BBD9428867232EC7569405B9EAD3B25844DD6B548CE54FD8180628FFAC0015634F2D3208598D7C4160E8B47E48163DDE9B364B0DF2898CB68AF7A628805D594FB4C9F0DBF412AE208404248635DF X-Mras: OK X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 217.69.128.36 Subject: [Qemu-devel] [PATCH v5 1/3] tests/libqtest: Introduce qtest_init_with_serial() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Julia Suvorova via Qemu-devel Reply-To: Julia Suvorova Cc: Peter Maydell , Thomas Huth , Julia Suvorova , =?UTF-8?q?Steffen=20G=C3=B6rtz?= , Jim Mussared , Joel Stanley , Stefan Hajnoczi , Paolo Bonzini , =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Run qtest with a socket that connects QEMU chardev and test code. Signed-off-by: Julia Suvorova Reviewed-by: Stefan Hajnoczi Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Thomas Huth --- tests/libqtest.c | 25 +++++++++++++++++++++++++ tests/libqtest.h | 11 +++++++++++ 2 files changed, 36 insertions(+) diff --git a/tests/libqtest.c b/tests/libqtest.c index 55750dd68d..6fb30855fa 100644 --- a/tests/libqtest.c +++ b/tests/libqtest.c @@ -315,6 +315,31 @@ QTestState *qtest_initf(const char *fmt, ...) return s; } =20 +QTestState *qtest_init_with_serial(const char *extra_args, int *sock_fd) +{ + int sock_fd_init; + char *sock_path, sock_dir[] =3D "/tmp/qtest-serial-XXXXXX"; + QTestState *qts; + + g_assert_true(mkdtemp(sock_dir) !=3D NULL); + sock_path =3D g_strdup_printf("%s/sock", sock_dir); + + sock_fd_init =3D init_socket(sock_path); + + qts =3D qtest_initf("-chardev socket,id=3Ds0,path=3D%s -serial chardev= :s0 %s", + sock_path, extra_args); + + *sock_fd =3D socket_accept(sock_fd_init); + + unlink(sock_path); + g_free(sock_path); + rmdir(sock_dir); + + g_assert_true(*sock_fd >=3D 0); + + return qts; +} + void qtest_quit(QTestState *s) { g_hook_destroy_link(&abrt_hooks, g_hook_find_data(&abrt_hooks, TRUE, s= )); diff --git a/tests/libqtest.h b/tests/libqtest.h index 7ea94139b0..5937f91912 100644 --- a/tests/libqtest.h +++ b/tests/libqtest.h @@ -62,6 +62,17 @@ QTestState *qtest_init(const char *extra_args); */ QTestState *qtest_init_without_qmp_handshake(const char *extra_args); =20 +/** + * qtest_init_with_serial: + * @extra_args: other arguments to pass to QEMU. CAUTION: these + * arguments are subject to word splitting and shell evaluation. + * @sock_fd: pointer to store the socket file descriptor for + * connection with serial. + * + * Returns: #QTestState instance. + */ +QTestState *qtest_init_with_serial(const char *extra_args, int *sock_fd); + /** * qtest_quit: * @s: #QTestState instance to operate on. --=20 2.17.1 From nobody Fri Nov 7 09:08:04 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1548245689949206.16511533812331; Wed, 23 Jan 2019 04:14:49 -0800 (PST) Received: from localhost ([127.0.0.1]:33344 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gmHQb-0003sT-JQ for importer@patchew.org; Wed, 23 Jan 2019 07:14:45 -0500 Received: from eggs.gnu.org ([209.51.188.92]:38555) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gmHOQ-0002Ua-Nm for qemu-devel@nongnu.org; Wed, 23 Jan 2019 07:12:32 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gmHKf-0007B3-VM for qemu-devel@nongnu.org; Wed, 23 Jan 2019 07:08:39 -0500 Received: from smtp56.i.mail.ru ([217.69.128.36]:46812) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gmHKf-00075j-If for qemu-devel@nongnu.org; Wed, 23 Jan 2019 07:08:37 -0500 Received: by smtp56.i.mail.ru with esmtpa (envelope-from ) id 1gmHKP-0003WT-JB; Wed, 23 Jan 2019 15:08:21 +0300 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mail.ru; s=mail2; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=u2srCLGY2gN6jwKPj96fozh8/3mjJpR++st3Y0DF0tY=; b=pBT+HzZgqqPReJxpDoR5ieVDnD1yrBmfXXEdMqSJYOtu2F4dgbeBxiVjZDzjIQIRECX7jvcd1QqHsohhVOs6ukqFXxjd3T5+JY1RR2jiXbZBv4SqiHw1ecDuUPO6e/D8nK3SmrI32mFEqZNCMGYGPt5QNqHk9yc3jMxb3tkRKfk=; To: qemu-devel@nongnu.org Date: Wed, 23 Jan 2019 15:07:58 +0300 Message-Id: <20190123120759.7162-3-jusual@mail.ru> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190123120759.7162-1-jusual@mail.ru> References: <20190123120759.7162-1-jusual@mail.ru> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Authentication-Results: smtp56.i.mail.ru; auth=pass smtp.auth=jusual@mail.ru smtp.mailfrom=jusual@mail.ru X-77F55803: CF41D5CA8C6D3C0C7F9F52485CB584D75945EECDF71DA5B3B28271E1E3DA513B887500A285E4AF6F95474605FE238773ADAB024B4846C063 X-7FA49CB5: 0D63561A33F958A5E6BCBC3F68355B56A6CDEC89DAF0D716A024C96525DE86728941B15DA834481FA18204E546F3947CEDCF5861DED71B2F389733CBF5DBD5E9C8A9BA7A39EFB7666BA297DBC24807EA117882F44604297287769387670735209ECD01F8117BC8BEA471835C12D1D977C4224003CC8364767815B9869FA544D8D32BA5DBAC0009BE9E8FC8737B5C2249BAEE21E69E3F105C3AA81AA40904B5D9CF19DD082D7633A0E7DDDDC251EA7DABD81D268191BDAD3D78DA827A17800CE7D0A1451CBA4A2173CD04E86FAF290E2D40A5AABA2AD3711975ECD9A6C639B01B78DA827A17800CE701850A59EC186E982158F2F41F5F868F75ECD9A6C639B01B4E70A05D1297E1BBC6867C52282FAC8518D57E64F6AADFC527F269C8F02392CD5571747095F342E88FB05168BE4CE3AF X-Mailru-Sender: 3BB5BBD9428867232EC7569405B9EAD34AF5F88DAC1D4A2902A527B435441C6564F72039A0FE7D747C4160E8B47E48163DDE9B364B0DF2898CB68AF7A628805D594FB4C9F0DBF412AE208404248635DF X-Mras: OK X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 217.69.128.36 Subject: [Qemu-devel] [PATCH v5 2/3] tests/microbit-test: Make test independent of global_qtest X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Julia Suvorova via Qemu-devel Reply-To: Julia Suvorova Cc: Peter Maydell , Thomas Huth , Julia Suvorova , =?UTF-8?q?Steffen=20G=C3=B6rtz?= , Jim Mussared , Joel Stanley , Stefan Hajnoczi , Paolo Bonzini , =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Using of global_qtest is not required here. Let's replace functions like readl() with the corresponding qtest_* counterparts. Signed-off-by: Julia Suvorova Reviewed-by: Philippe Mathieu-Daud=C3=A9 Acked-by: Thomas Huth Reviewed-by: Stefan Hajnoczi --- tests/microbit-test.c | 247 ++++++++++++++++++++++-------------------- 1 file changed, 129 insertions(+), 118 deletions(-) diff --git a/tests/microbit-test.c b/tests/microbit-test.c index dcdc0cd41a..afeb6b082a 100644 --- a/tests/microbit-test.c +++ b/tests/microbit-test.c @@ -24,22 +24,22 @@ #include "hw/i2c/microbit_i2c.h" =20 /* Read a byte from I2C device at @addr from register @reg */ -static uint32_t i2c_read_byte(uint32_t addr, uint32_t reg) +static uint32_t i2c_read_byte(QTestState *qts, uint32_t addr, uint32_t reg) { uint32_t val; =20 - writel(NRF51_TWI_BASE + NRF51_TWI_REG_ADDRESS, addr); - writel(NRF51_TWI_BASE + NRF51_TWI_TASK_STARTTX, 1); - writel(NRF51_TWI_BASE + NRF51_TWI_REG_TXD, reg); - val =3D readl(NRF51_TWI_BASE + NRF51_TWI_EVENT_TXDSENT); + qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_REG_ADDRESS, addr); + qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_TASK_STARTTX, 1); + qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_REG_TXD, reg); + val =3D qtest_readl(qts, NRF51_TWI_BASE + NRF51_TWI_EVENT_TXDSENT); g_assert_cmpuint(val, =3D=3D, 1); - writel(NRF51_TWI_BASE + NRF51_TWI_TASK_STOP, 1); + qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_TASK_STOP, 1); =20 - writel(NRF51_TWI_BASE + NRF51_TWI_TASK_STARTRX, 1); - val =3D readl(NRF51_TWI_BASE + NRF51_TWI_EVENT_RXDREADY); + qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_TASK_STARTRX, 1); + val =3D qtest_readl(qts, NRF51_TWI_BASE + NRF51_TWI_EVENT_RXDREADY); g_assert_cmpuint(val, =3D=3D, 1); - val =3D readl(NRF51_TWI_BASE + NRF51_TWI_REG_RXD); - writel(NRF51_TWI_BASE + NRF51_TWI_TASK_STOP, 1); + val =3D qtest_readl(qts, NRF51_TWI_BASE + NRF51_TWI_REG_RXD); + qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_TASK_STOP, 1); =20 return val; } @@ -47,22 +47,25 @@ static uint32_t i2c_read_byte(uint32_t addr, uint32_t r= eg) static void test_microbit_i2c(void) { uint32_t val; + QTestState *qts =3D qtest_init("-M microbit"); =20 /* We don't program pins/irqs but at least enable the device */ - writel(NRF51_TWI_BASE + NRF51_TWI_REG_ENABLE, 5); + qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_REG_ENABLE, 5); =20 /* MMA8653 magnetometer detection */ - val =3D i2c_read_byte(0x3A, 0x0D); + val =3D i2c_read_byte(qts, 0x3A, 0x0D); g_assert_cmpuint(val, =3D=3D, 0x5A); =20 - val =3D i2c_read_byte(0x3A, 0x0D); + val =3D i2c_read_byte(qts, 0x3A, 0x0D); g_assert_cmpuint(val, =3D=3D, 0x5A); =20 /* LSM303 accelerometer detection */ - val =3D i2c_read_byte(0x3C, 0x4F); + val =3D i2c_read_byte(qts, 0x3C, 0x4F); g_assert_cmpuint(val, =3D=3D, 0x40); =20 - writel(NRF51_TWI_BASE + NRF51_TWI_REG_ENABLE, 0); + qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_REG_ENABLE, 0); + + qtest_quit(qts); } =20 static void test_nrf51_gpio(void) @@ -80,220 +83,228 @@ static void test_nrf51_gpio(void) {NRF51_GPIO_REG_DIRCLR, 0x00000000} }; =20 + QTestState *qts =3D qtest_init("-M microbit"); + /* Check reset state */ for (i =3D 0; i < ARRAY_SIZE(reset_state); i++) { expected =3D reset_state[i].expected; - actual =3D readl(NRF51_GPIO_BASE + reset_state[i].addr); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + reset_state[i].addr); g_assert_cmpuint(actual, =3D=3D, expected); } =20 for (i =3D 0; i < NRF51_GPIO_PINS; i++) { expected =3D 0x00000002; - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START + i * = 4); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + + NRF51_GPIO_REG_CNF_START + i * 4); g_assert_cmpuint(actual, =3D=3D, expected); } =20 /* Check dir bit consistency between dir and cnf */ /* Check set via DIRSET */ expected =3D 0x80000001; - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIRSET, expected); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIRSET, expected); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR); g_assert_cmpuint(actual, =3D=3D, expected); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) & 0x01; + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) + & 0x01; g_assert_cmpuint(actual, =3D=3D, 0x01); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01; + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) = & 0x01; g_assert_cmpuint(actual, =3D=3D, 0x01); =20 /* Check clear via DIRCLR */ - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIRCLR, 0x80000001); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIRCLR, 0x80000001); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR); g_assert_cmpuint(actual, =3D=3D, 0x00000000); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) & 0x01; + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) + & 0x01; g_assert_cmpuint(actual, =3D=3D, 0x00); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01; + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) = & 0x01; g_assert_cmpuint(actual, =3D=3D, 0x00); =20 /* Check set via DIR */ expected =3D 0x80000001; - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR, expected); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR, expected); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR); g_assert_cmpuint(actual, =3D=3D, expected); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) & 0x01; + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) + & 0x01; g_assert_cmpuint(actual, =3D=3D, 0x01); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01; + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) = & 0x01; g_assert_cmpuint(actual, =3D=3D, 0x01); =20 /* Reset DIR */ - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR, 0x00000000); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR, 0x00000000); =20 /* Check Input propagates */ - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x00); - qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0,= 0); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x00); + qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, 0); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x0= 1; g_assert_cmpuint(actual, =3D=3D, 0x00); - qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0,= 1); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, 1); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x0= 1; g_assert_cmpuint(actual, =3D=3D, 0x01); - qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0,= -1); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, -1); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x0= 1; g_assert_cmpuint(actual, =3D=3D, 0x01); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02); =20 /* Check pull-up working */ - qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0,= 0); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0000); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, 0); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0000); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x0= 1; g_assert_cmpuint(actual, =3D=3D, 0x00); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b1110); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b1110); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x0= 1; g_assert_cmpuint(actual, =3D=3D, 0x01); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02); =20 /* Check pull-down working */ - qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0,= 1); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0000); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, 1); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0000); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x0= 1; g_assert_cmpuint(actual, =3D=3D, 0x01); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0110); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0110); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x0= 1; g_assert_cmpuint(actual, =3D=3D, 0x00); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02); - qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0,= -1); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02); + qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, -1); =20 /* Check Output propagates */ - irq_intercept_out("/machine/nrf51"); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0011); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01); - g_assert_true(get_irq(0)); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTCLR, 0x01); - g_assert_false(get_irq(0)); + qtest_irq_intercept_out(qts, "/machine/nrf51"); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0011); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01); + g_assert_true(qtest_get_irq(qts, 0)); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTCLR, 0x01); + g_assert_false(qtest_get_irq(qts, 0)); =20 /* Check self-stimulation */ - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b01); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b01); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x0= 1; g_assert_cmpuint(actual, =3D=3D, 0x01); =20 - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTCLR, 0x01); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTCLR, 0x01); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x0= 1; g_assert_cmpuint(actual, =3D=3D, 0x00); =20 /* * Check short-circuit - generates an guest_error which must be checked * manually as long as qtest can not scan qemu_log messages */ - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b01); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01); - qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0,= 0); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b01); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01); + qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, 0); + + qtest_quit(qts); } =20 -static void timer_task(hwaddr task) +static void timer_task(QTestState *qts, hwaddr task) { - writel(NRF51_TIMER_BASE + task, NRF51_TRIGGER_TASK); + qtest_writel(qts, NRF51_TIMER_BASE + task, NRF51_TRIGGER_TASK); } =20 -static void timer_clear_event(hwaddr event) +static void timer_clear_event(QTestState *qts, hwaddr event) { - writel(NRF51_TIMER_BASE + event, NRF51_EVENT_CLEAR); + qtest_writel(qts, NRF51_TIMER_BASE + event, NRF51_EVENT_CLEAR); } =20 -static void timer_set_bitmode(uint8_t mode) +static void timer_set_bitmode(QTestState *qts, uint8_t mode) { - writel(NRF51_TIMER_BASE + NRF51_TIMER_REG_BITMODE, mode); + qtest_writel(qts, NRF51_TIMER_BASE + NRF51_TIMER_REG_BITMODE, mode); } =20 -static void timer_set_prescaler(uint8_t prescaler) +static void timer_set_prescaler(QTestState *qts, uint8_t prescaler) { - writel(NRF51_TIMER_BASE + NRF51_TIMER_REG_PRESCALER, prescaler); + qtest_writel(qts, NRF51_TIMER_BASE + NRF51_TIMER_REG_PRESCALER, presca= ler); } =20 -static void timer_set_cc(size_t idx, uint32_t value) +static void timer_set_cc(QTestState *qts, size_t idx, uint32_t value) { - writel(NRF51_TIMER_BASE + NRF51_TIMER_REG_CC0 + idx * 4, value); + qtest_writel(qts, NRF51_TIMER_BASE + NRF51_TIMER_REG_CC0 + idx * 4, va= lue); } =20 -static void timer_assert_events(uint32_t ev0, uint32_t ev1, uint32_t ev2, - uint32_t ev3) +static void timer_assert_events(QTestState *qts, uint32_t ev0, uint32_t ev= 1, + uint32_t ev2, uint32_t ev3) { - g_assert(readl(NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_0) =3D=3D = ev0); - g_assert(readl(NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_1) =3D=3D = ev1); - g_assert(readl(NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_2) =3D=3D = ev2); - g_assert(readl(NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_3) =3D=3D = ev3); + g_assert(qtest_readl(qts, NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE= _0) + =3D=3D ev0); + g_assert(qtest_readl(qts, NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE= _1) + =3D=3D ev1); + g_assert(qtest_readl(qts, NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE= _2) + =3D=3D ev2); + g_assert(qtest_readl(qts, NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE= _3) + =3D=3D ev3); } =20 static void test_nrf51_timer(void) { uint32_t steps_to_overflow =3D 408; + QTestState *qts =3D qtest_init("-M microbit"); =20 /* Compare Match */ - timer_task(NRF51_TIMER_TASK_STOP); - timer_task(NRF51_TIMER_TASK_CLEAR); + timer_task(qts, NRF51_TIMER_TASK_STOP); + timer_task(qts, NRF51_TIMER_TASK_CLEAR); =20 - timer_clear_event(NRF51_TIMER_EVENT_COMPARE_0); - timer_clear_event(NRF51_TIMER_EVENT_COMPARE_1); - timer_clear_event(NRF51_TIMER_EVENT_COMPARE_2); - timer_clear_event(NRF51_TIMER_EVENT_COMPARE_3); + timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_0); + timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_1); + timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_2); + timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_3); =20 - timer_set_bitmode(NRF51_TIMER_WIDTH_16); /* 16 MHz Timer */ - timer_set_prescaler(0); + timer_set_bitmode(qts, NRF51_TIMER_WIDTH_16); /* 16 MHz Timer */ + timer_set_prescaler(qts, 0); /* Swept over in first step */ - timer_set_cc(0, 2); + timer_set_cc(qts, 0, 2); /* Barely miss on first step */ - timer_set_cc(1, 162); + timer_set_cc(qts, 1, 162); /* Spot on on third step */ - timer_set_cc(2, 480); + timer_set_cc(qts, 2, 480); =20 - timer_assert_events(0, 0, 0, 0); + timer_assert_events(qts, 0, 0, 0, 0); =20 - timer_task(NRF51_TIMER_TASK_START); - clock_step(10000); - timer_assert_events(1, 0, 0, 0); + timer_task(qts, NRF51_TIMER_TASK_START); + qtest_clock_step(qts, 10000); + timer_assert_events(qts, 1, 0, 0, 0); =20 /* Swept over on first overflow */ - timer_set_cc(3, 114); + timer_set_cc(qts, 3, 114); =20 - clock_step(10000); - timer_assert_events(1, 1, 0, 0); + qtest_clock_step(qts, 10000); + timer_assert_events(qts, 1, 1, 0, 0); =20 - clock_step(10000); - timer_assert_events(1, 1, 1, 0); + qtest_clock_step(qts, 10000); + timer_assert_events(qts, 1, 1, 1, 0); =20 /* Wrap time until internal counter overflows */ while (steps_to_overflow--) { - timer_assert_events(1, 1, 1, 0); - clock_step(10000); + timer_assert_events(qts, 1, 1, 1, 0); + qtest_clock_step(qts, 10000); } =20 - timer_assert_events(1, 1, 1, 1); + timer_assert_events(qts, 1, 1, 1, 1); =20 - timer_clear_event(NRF51_TIMER_EVENT_COMPARE_0); - timer_clear_event(NRF51_TIMER_EVENT_COMPARE_1); - timer_clear_event(NRF51_TIMER_EVENT_COMPARE_2); - timer_clear_event(NRF51_TIMER_EVENT_COMPARE_3); - timer_assert_events(0, 0, 0, 0); + timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_0); + timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_1); + timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_2); + timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_3); + timer_assert_events(qts, 0, 0, 0, 0); =20 - timer_task(NRF51_TIMER_TASK_STOP); + timer_task(qts, NRF51_TIMER_TASK_STOP); =20 /* Test Proposal: Stop/Shutdown */ /* Test Proposal: Shortcut Compare -> Clear */ /* Test Proposal: Shortcut Compare -> Stop */ /* Test Proposal: Counter Mode */ + + qtest_quit(qts); } =20 int main(int argc, char **argv) { - int ret; - g_test_init(&argc, &argv, NULL); =20 - global_qtest =3D qtest_initf("-machine microbit"); - qtest_add_func("/microbit/nrf51/gpio", test_nrf51_gpio); qtest_add_func("/microbit/nrf51/timer", test_nrf51_timer); qtest_add_func("/microbit/microbit/i2c", test_microbit_i2c); =20 - ret =3D g_test_run(); - - qtest_quit(global_qtest); - return ret; + return g_test_run(); } --=20 2.17.1 From nobody Fri Nov 7 09:08:04 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1548245704504481.38065903162476; Wed, 23 Jan 2019 04:15:04 -0800 (PST) Received: from localhost ([127.0.0.1]:33349 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gmHQt-00047r-Dy for importer@patchew.org; Wed, 23 Jan 2019 07:15:03 -0500 Received: from eggs.gnu.org ([209.51.188.92]:38555) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gmHOT-0002Ua-H0 for qemu-devel@nongnu.org; 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X-Received-From: 217.69.128.36 Subject: [Qemu-devel] [PATCH v5 3/3] tests/microbit-test: Check nRF51 UART functionality X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Julia Suvorova via Qemu-devel Reply-To: Julia Suvorova Cc: Peter Maydell , Thomas Huth , Julia Suvorova , =?UTF-8?q?Steffen=20G=C3=B6rtz?= , Jim Mussared , Joel Stanley , Stefan Hajnoczi , Paolo Bonzini , =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Some functional tests for: Basic reception/transmittion Suspending INTEN* registers Signed-off-by: Julia Suvorova Acked-by: Thomas Huth Reviewed-by: Stefan Hajnoczi --- tests/microbit-test.c | 89 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 89 insertions(+) diff --git a/tests/microbit-test.c b/tests/microbit-test.c index afeb6b082a..fe0f2979f8 100644 --- a/tests/microbit-test.c +++ b/tests/microbit-test.c @@ -19,10 +19,98 @@ #include "libqtest.h" =20 #include "hw/arm/nrf51.h" +#include "hw/char/nrf51_uart.h" #include "hw/gpio/nrf51_gpio.h" #include "hw/timer/nrf51_timer.h" #include "hw/i2c/microbit_i2c.h" =20 +static bool uart_wait_for_event(QTestState *qts, uint32_t event_addr) +{ + time_t now, start =3D time(NULL); + + while (true) { + if (qtest_readl(qts, event_addr) =3D=3D 1) { + qtest_writel(qts, event_addr, 0x00); + return true; + } + + /* Wait at most 10 minutes */ + now =3D time(NULL); + if (now - start > 600) { + break; + } + g_usleep(10000); + } + + return false; +} + +static void uart_rw_to_rxd(QTestState *qts, int sock_fd, const char *in, + char *out) +{ + int i, in_len =3D strlen(in); + + g_assert_true(write(sock_fd, in, in_len) =3D=3D in_len); + for (i =3D 0; i < in_len; i++) { + g_assert_true(uart_wait_for_event(qts, NRF51_UART_BASE + + A_UART_RXDRDY)); + out[i] =3D qtest_readl(qts, NRF51_UART_BASE + A_UART_RXD); + } + out[i] =3D '\0'; +} + +static void uart_w_to_txd(QTestState *qts, const char *in) +{ + int i, in_len =3D strlen(in); + + for (i =3D 0; i < in_len; i++) { + qtest_writel(qts, NRF51_UART_BASE + A_UART_TXD, in[i]); + g_assert_true(uart_wait_for_event(qts, NRF51_UART_BASE + + A_UART_TXDRDY)); + } +} + +static void test_nrf51_uart(void) +{ + int sock_fd; + char s[10]; + QTestState *qts =3D qtest_init_with_serial("-M microbit", &sock_fd); + + g_assert_true(write(sock_fd, "c", 1) =3D=3D 1); + g_assert_cmphex(qtest_readl(qts, NRF51_UART_BASE + A_UART_RXD), =3D=3D= , 0x00); + + qtest_writel(qts, NRF51_UART_BASE + A_UART_ENABLE, 0x04); + qtest_writel(qts, NRF51_UART_BASE + A_UART_STARTRX, 0x01); + + g_assert_true(uart_wait_for_event(qts, NRF51_UART_BASE + A_UART_RXDRDY= )); + qtest_writel(qts, NRF51_UART_BASE + A_UART_RXDRDY, 0x00); + g_assert_cmphex(qtest_readl(qts, NRF51_UART_BASE + A_UART_RXD), =3D=3D= , 'c'); + + qtest_writel(qts, NRF51_UART_BASE + A_UART_INTENSET, 0x04); + g_assert_cmphex(qtest_readl(qts, NRF51_UART_BASE + A_UART_INTEN), =3D= =3D, 0x04); + qtest_writel(qts, NRF51_UART_BASE + A_UART_INTENCLR, 0x04); + g_assert_cmphex(qtest_readl(qts, NRF51_UART_BASE + A_UART_INTEN), =3D= =3D, 0x00); + + uart_rw_to_rxd(qts, sock_fd, "hello", s); + g_assert_true(memcmp(s, "hello", 5) =3D=3D 0); + + qtest_writel(qts, NRF51_UART_BASE + A_UART_STARTTX, 0x01); + uart_w_to_txd(qts, "d"); + g_assert_true(read(sock_fd, s, 10) =3D=3D 1); + g_assert_cmphex(s[0], =3D=3D, 'd'); + + qtest_writel(qts, NRF51_UART_BASE + A_UART_SUSPEND, 0x01); + qtest_writel(qts, NRF51_UART_BASE + A_UART_TXD, 'h'); + qtest_writel(qts, NRF51_UART_BASE + A_UART_STARTTX, 0x01); + uart_w_to_txd(qts, "world"); + g_assert_true(read(sock_fd, s, 10) =3D=3D 5); + g_assert_true(memcmp(s, "world", 5) =3D=3D 0); + + close(sock_fd); + + qtest_quit(qts); +} + /* Read a byte from I2C device at @addr from register @reg */ static uint32_t i2c_read_byte(QTestState *qts, uint32_t addr, uint32_t reg) { @@ -302,6 +390,7 @@ int main(int argc, char **argv) { g_test_init(&argc, &argv, NULL); =20 + qtest_add_func("/microbit/nrf51/uart", test_nrf51_uart); qtest_add_func("/microbit/nrf51/gpio", test_nrf51_gpio); qtest_add_func("/microbit/nrf51/timer", test_nrf51_timer); qtest_add_func("/microbit/microbit/i2c", test_microbit_i2c); --=20 2.17.1