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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id e27sm92094561wra.67.2019.01.18.06.58.54 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 18 Jan 2019 06:58:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=5GU6DboPVPudgrIicZCjDjGGAIumdKJRMCgR/qE9/EY=; b=RL41xpv6uiF6sgfQkpjm6L54mk9OIr6VFe8iKrF9QMgcNEWFVNGImKArq/TTJ3aJJD G2TFZ/NtNLnGY6Aut3MPvHAnO0QJtgM9S6pig+dKshAno9pQ6J1gl6IqnAgxuhHLkN6V nbkK05wwV6GJg66WSI8pfXxHVa+dCaNjECplI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5GU6DboPVPudgrIicZCjDjGGAIumdKJRMCgR/qE9/EY=; b=JRpGpquts/zydQVlc+0YFoZCSa0DqKA7X08Vi4x1NCy5xUdRWS+TGHBxQLBt/AcTo4 s28w4Ny4HTBF73mjqlRlSqbz61Aa2ifnWnqAgSMgUyae8lHDduK0J0DqEV47RvGS26HQ 2Xc+TGWzD4YYwg0aUFDacukcLUqifZhh+9rXzDoywMnFIfWStatHo8YQRfAAO81BT3aG 1k8xk6TQqFnvZAR6NsJbPlXPZhtvPpn9iS/d/8pC2QAQo9nZEVUZSoO+8DBXprXxo/3f YcdNGeiBtAEpVVxXxAGsStUfs/a0z0+6CIvMMtolkjG6WvmayDhziVmENcPZHPS4+/E3 C2JA== X-Gm-Message-State: AJcUukc1l4/duHTbJvh5/V6NpmsIZ8Ai5H0LQ43v0MT2yd3QCpGt+tm+ U/AJFM5fqB7RpiW3Ocg9bmYDxo0eJJyuog== X-Google-Smtp-Source: ALg8bN696B9Spm+hTeBt7hDefkpD5skp6+LR1RPDGsaWDG3/8lqHfLRYZ69WvcP+z+YiULlYOs49+A== X-Received: by 2002:adf:e7d0:: with SMTP id e16mr17757296wrn.142.1547823535208; Fri, 18 Jan 2019 06:58:55 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Date: Fri, 18 Jan 2019 14:57:58 +0000 Message-Id: <20190118145805.6852-43-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190118145805.6852-1-peter.maydell@linaro.org> References: <20190118145805.6852-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::442 Subject: [Qemu-devel] [PULL 42/49] target/arm: Define FIELDs for ID_DFR0 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" From: Aaron Lindsay This is immediately necessary for the PMUv3 implementation to check ID_DFR0.PerfMon to enable/disable specific features, but defines the full complement of fields for possible future use elsewhere. Signed-off-by: Aaron Lindsay Reviewed-by: Peter Maydell Message-id: 20181211151945.29137-8-aaron@os.amperecomputing.com Signed-off-by: Peter Maydell --- target/arm/cpu.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 964487d6863..79378df96e6 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1681,6 +1681,15 @@ FIELD(ID_AA64MMFR1, PAN, 20, 4) FIELD(ID_AA64MMFR1, SPECSEI, 24, 4) FIELD(ID_AA64MMFR1, XNX, 28, 4) =20 +FIELD(ID_DFR0, COPDBG, 0, 4) +FIELD(ID_DFR0, COPSDBG, 4, 4) +FIELD(ID_DFR0, MMAPDBG, 8, 4) +FIELD(ID_DFR0, COPTRC, 12, 4) +FIELD(ID_DFR0, MMAPTRC, 16, 4) +FIELD(ID_DFR0, MPROFDBG, 20, 4) +FIELD(ID_DFR0, PERFMON, 24, 4) +FIELD(ID_DFR0, TRACEFILT, 28, 4) + QEMU_BUILD_BUG_ON(ARRAY_SIZE(((ARMCPU *)0)->ccsidr) <=3D R_V7M_CSSELR_INDE= X_MASK); =20 /* If adding a feature bit which corresponds to a Linux ELF --=20 2.20.1