From nobody Fri Nov 7 12:20:08 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=intel.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1547812003306670.1379290052992; Fri, 18 Jan 2019 03:46:43 -0800 (PST) Received: from localhost ([127.0.0.1]:36923 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gkSba-00008l-Lu for importer@patchew.org; Fri, 18 Jan 2019 06:46:34 -0500 Received: from eggs.gnu.org ([209.51.188.92]:36118) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gkSHR-0000ZN-LE for qemu-devel@nongnu.org; Fri, 18 Jan 2019 06:25:49 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gkSHP-0006aS-Ru for qemu-devel@nongnu.org; Fri, 18 Jan 2019 06:25:44 -0500 Received: from mga06.intel.com ([134.134.136.31]:47041) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gkSHN-0005r5-Td for qemu-devel@nongnu.org; Fri, 18 Jan 2019 06:25:43 -0500 Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 18 Jan 2019 03:25:04 -0800 Received: from he.bj.intel.com ([10.238.157.85]) by orsmga005.jf.intel.com with ESMTP; 18 Jan 2019 03:25:02 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,491,1539673200"; d="scan'208";a="292570714" From: Yang Zhong To: qemu-devel@nongnu.org Date: Fri, 18 Jan 2019 19:23:40 +0800 Message-Id: <20190118112410.3010-14-yang.zhong@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190118112410.3010-1-yang.zhong@intel.com> References: <20190118112410.3010-1-yang.zhong@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.31 Subject: [Qemu-devel] [RFC PATCH v3 13/43] hw/riscv/Makefile.objs: Create CONFIG_* for riscv boards X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yang.zhong@intel.com, peter.maydell@linaro.org, thuth@redhat.com, sameo@linux.intel.com, pbonzini@redhat.com, ehabkost@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add the new configs to default-configs/riscv*-sofmmu.mak. Signed-off-by: Yang Zhong --- default-configs/riscv32-softmmu.mak | 7 +++++++ default-configs/riscv64-softmmu.mak | 7 +++++++ hw/riscv/Makefile.objs | 22 +++++++++++----------- 3 files changed, 25 insertions(+), 11 deletions(-) diff --git a/default-configs/riscv32-softmmu.mak b/default-configs/riscv32-= softmmu.mak index c9c5971409..2dccd512d2 100644 --- a/default-configs/riscv32-softmmu.mak +++ b/default-configs/riscv32-softmmu.mak @@ -12,3 +12,10 @@ CONFIG_PCI_GENERIC=3Dy =20 CONFIG_VGA=3Dy CONFIG_VGA_PCI=3Dy + +CONFIG_SPIKE=3Dy +CONFIG_HART=3Dy +CONFIG_SIFIVE_E=3Dy +CONFIG_SIFIVE=3Dy +CONFIG_SIFIVE_U=3Dy +CONFIG_RISCV_VIRT=3Dy diff --git a/default-configs/riscv64-softmmu.mak b/default-configs/riscv64-= softmmu.mak index c9c5971409..2dccd512d2 100644 --- a/default-configs/riscv64-softmmu.mak +++ b/default-configs/riscv64-softmmu.mak @@ -12,3 +12,10 @@ CONFIG_PCI_GENERIC=3Dy =20 CONFIG_VGA=3Dy CONFIG_VGA_PCI=3Dy + +CONFIG_SPIKE=3Dy +CONFIG_HART=3Dy +CONFIG_SIFIVE_E=3Dy +CONFIG_SIFIVE=3Dy +CONFIG_SIFIVE_U=3Dy +CONFIG_RISCV_VIRT=3Dy diff --git a/hw/riscv/Makefile.objs b/hw/riscv/Makefile.objs index 1dde01d39d..79bfb3abf9 100644 --- a/hw/riscv/Makefile.objs +++ b/hw/riscv/Makefile.objs @@ -1,11 +1,11 @@ -obj-y +=3D riscv_htif.o -obj-y +=3D riscv_hart.o -obj-y +=3D sifive_e.o -obj-y +=3D sifive_clint.o -obj-y +=3D sifive_prci.o -obj-y +=3D sifive_plic.o -obj-y +=3D sifive_test.o -obj-y +=3D sifive_u.o -obj-y +=3D sifive_uart.o -obj-y +=3D spike.o -obj-y +=3D virt.o +obj-$(CONFIG_SPIKE) +=3D riscv_htif.o +obj-$(CONFIG_HART) +=3D riscv_hart.o +obj-$(CONFIG_SIFIVE_E) +=3D sifive_e.o +obj-$(CONFIG_SIFIVE) +=3D sifive_clint.o +obj-$(CONFIG_SIFIVE) +=3D sifive_prci.o +obj-$(CONFIG_SIFIVE) +=3D sifive_plic.o +obj-$(CONFIG_SIFIVE) +=3D sifive_test.o +obj-$(CONFIG_SIFIVE_U) +=3D sifive_u.o +obj-$(CONFIG_SIFIVE) +=3D sifive_uart.o +obj-$(CONFIG_SPIKE) +=3D spike.o +obj-$(CONFIG_RISCV_VIRT) +=3D virt.o --=20 2.17.1