From nobody Fri Nov 7 09:08:06 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1547742098033859.5370810249459; Thu, 17 Jan 2019 08:21:38 -0800 (PST) Received: from localhost ([127.0.0.1]:47557 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gkAQD-00072w-24 for importer@patchew.org; Thu, 17 Jan 2019 11:21:37 -0500 Received: from eggs.gnu.org ([209.51.188.92]:52110) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gkAM5-0004Jm-Kb for qemu-devel@nongnu.org; Thu, 17 Jan 2019 11:17:22 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gkAM4-0000ej-OA for qemu-devel@nongnu.org; Thu, 17 Jan 2019 11:17:21 -0500 Received: from smtp45.i.mail.ru ([94.100.177.105]:37110) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gkAM2-0000Y1-C9 for qemu-devel@nongnu.org; Thu, 17 Jan 2019 11:17:20 -0500 Received: by smtp45.i.mail.ru with esmtpa (envelope-from ) id 1gkALy-00010B-Pz; Thu, 17 Jan 2019 19:17:15 +0300 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mail.ru; s=mail2; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=MhunBn6a8V93LgE0K39gLSzpMeZQEsEPLgPs8u4aXBU=; b=X8VWtMrnxOgoi21E0p1/5cOzIUhongccS3g/eS5+U9vQJ68U5Q/v7IYaxRqGKVhJx23d7DJmpi01Cz7TJrXIfxSt7ACzAc3d3YpymrsOtWKI36TwByG5wncBqurFhcAdgPJd4FLGpAJkGwhMurS0vgqx4onx9oYX9qVvmrmfBLI=; To: qemu-devel@nongnu.org Date: Thu, 17 Jan 2019 19:16:38 +0300 Message-Id: <20190117161640.5496-2-jusual@mail.ru> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190117161640.5496-1-jusual@mail.ru> References: <20190117161640.5496-1-jusual@mail.ru> Authentication-Results: smtp45.i.mail.ru; auth=pass smtp.auth=jusual@mail.ru smtp.mailfrom=jusual@mail.ru X-77F55803: 689590B63E0A4B015A78504BD2AC29415C48BF52803089A4A7F0BE0FDA2E50BC0FEB0270D4DE844AD5397098F9212A2C X-7FA49CB5: 0D63561A33F958A5AF3F7AB10DA298A1A7984E25C514B54C820498A25F97EBA38941B15DA834481FA18204E546F3947CEDCF5861DED71B2F389733CBF5DBD5E9C8A9BA7A39EFB7666BA297DBC24807EA117882F44604297287769387670735209ECD01F8117BC8BEA471835C12D1D977C4224003CC8364767815B9869FA544D8D32BA5DBAC0009BE9E8FC8737B5C2249EF2C73A33A032E663AA81AA40904B5D9CF19DD082D7633A0E7DDDDC251EA7DABD81D268191BDAD3D78DA827A17800CE79DD14948C6BCD3BACD04E86FAF290E2D40A5AABA2AD3711975ECD9A6C639B01B78DA827A17800CE7809F63FFBEF9D673BCA89A3F6031D346EFF80C71ABB335746BA297DBC24807EA27F269C8F02392CDBB05166615B404773C9F3DD0FB1AF5EB4E70A05D1297E1BBCB5012B2E24CD356 X-Mailru-Sender: 805131ABF43B5F09656281C20F8AEBE22E0B3CD650BCC20484585EA7DB7AD91CA0A75FDC5059D49DBCD5BA2C93075E1EC77752E0C033A69E882C431543FD75E20226C39053983FF03453F38A29522196 X-Mras: OK X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 94.100.177.105 Subject: [Qemu-devel] [PATCH v4 1/3] tests/libqtest: Introduce qtest_init_with_serial() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Julia Suvorova via Qemu-devel Reply-To: Julia Suvorova Cc: Laurent Vivier , Peter Maydell , Thomas Huth , =?UTF-8?q?Steffen=20G=C3=B6rtz?= , Jim Mussared , Joel Stanley , Stefan Hajnoczi , Paolo Bonzini , Julia Suvorova Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Run qtest with a socket that connects QEMU chardev and test code. Signed-off-by: Julia Suvorova Reviewed-by: Stefan Hajnoczi --- tests/libqtest.c | 26 ++++++++++++++++++++++++++ tests/libqtest.h | 11 +++++++++++ 2 files changed, 37 insertions(+) diff --git a/tests/libqtest.c b/tests/libqtest.c index 55750dd68d..3a015cfe13 100644 --- a/tests/libqtest.c +++ b/tests/libqtest.c @@ -315,6 +315,32 @@ QTestState *qtest_initf(const char *fmt, ...) return s; } =20 +QTestState *qtest_init_with_serial(const char *extra_args, int *sock_fd) +{ + int sock_fd_init; + char *sock_path, sock_dir[] =3D "/tmp/qtest-serial-XXXXXX"; + QTestState *qts; + + g_assert(mkdtemp(sock_dir)); + sock_path =3D g_strdup_printf("%s/sock", sock_dir); + + sock_fd_init =3D init_socket(sock_path); + + qts =3D qtest_initf("-chardev socket,id=3Ds0,path=3D%s,nowait " + "-serial chardev:s0 %s", + sock_path, extra_args); + + *sock_fd =3D socket_accept(sock_fd_init); + + unlink(sock_path); + g_free(sock_path); + rmdir(sock_dir); + + g_assert(*sock_fd >=3D 0); + + return qts; +} + void qtest_quit(QTestState *s) { g_hook_destroy_link(&abrt_hooks, g_hook_find_data(&abrt_hooks, TRUE, s= )); diff --git a/tests/libqtest.h b/tests/libqtest.h index 7ea94139b0..5937f91912 100644 --- a/tests/libqtest.h +++ b/tests/libqtest.h @@ -62,6 +62,17 @@ QTestState *qtest_init(const char *extra_args); */ QTestState *qtest_init_without_qmp_handshake(const char *extra_args); =20 +/** + * qtest_init_with_serial: + * @extra_args: other arguments to pass to QEMU. CAUTION: these + * arguments are subject to word splitting and shell evaluation. + * @sock_fd: pointer to store the socket file descriptor for + * connection with serial. + * + * Returns: #QTestState instance. + */ +QTestState *qtest_init_with_serial(const char *extra_args, int *sock_fd); + /** * qtest_quit: * @s: #QTestState instance to operate on. --=20 2.17.1 From nobody Fri Nov 7 09:08:06 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1547742136227635.4688942002094; Thu, 17 Jan 2019 08:22:16 -0800 (PST) Received: from localhost ([127.0.0.1]:47559 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gkAQo-0007OW-VN for importer@patchew.org; Thu, 17 Jan 2019 11:22:15 -0500 Received: from eggs.gnu.org ([209.51.188.92]:52148) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gkAMG-0004R8-Ha for qemu-devel@nongnu.org; Thu, 17 Jan 2019 11:17:34 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gkAM5-0000gG-Ln for qemu-devel@nongnu.org; Thu, 17 Jan 2019 11:17:25 -0500 Received: from smtp45.i.mail.ru ([94.100.177.105]:44944) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gkAM5-0000d4-1D for qemu-devel@nongnu.org; Thu, 17 Jan 2019 11:17:21 -0500 Received: by smtp45.i.mail.ru with esmtpa (envelope-from ) id 1gkAM3-00010B-1q; Thu, 17 Jan 2019 19:17:19 +0300 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mail.ru; s=mail2; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=rn4G02DiHqX+8tsGx7cnXvC2Y2iJX6l7w/3OzhaMi/A=; b=agIjkwoeNPazuYlfQV44wSdJp/wipckpTcDF4wBUKXzLCOzXHpfWjBSMwO9AQOVDyMRwUDlr+OB7gSFZqI5iC/quabJC4D7FODwfuDjwKv/CufR2ijFvAGtVUdXNi2mibacNyaWNzym3D2bD6xM/Wym/ywOgQDwmqndcnlYl+Oc=; To: qemu-devel@nongnu.org Date: Thu, 17 Jan 2019 19:16:39 +0300 Message-Id: <20190117161640.5496-3-jusual@mail.ru> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190117161640.5496-1-jusual@mail.ru> References: <20190117161640.5496-1-jusual@mail.ru> Authentication-Results: smtp45.i.mail.ru; auth=pass smtp.auth=jusual@mail.ru smtp.mailfrom=jusual@mail.ru X-77F55803: 257C4F86AB09C89C5A78504BD2AC2941988784FC6C4AE31F990912A82048828BFC93238B3EBCD9DE5748CEF250A72E22A418832021A05E8E X-7FA49CB5: 0D63561A33F958A5EFF7795C65A27EEFA7984E25C514B54CF6F3A359C358D63A8941B15DA834481FA18204E546F3947CEDCF5861DED71B2F389733CBF5DBD5E9C8A9BA7A39EFB7666BA297DBC24807EA117882F44604297287769387670735209ECD01F8117BC8BEA471835C12D1D977C4224003CC8364767815B9869FA544D8D32BA5DBAC0009BE9E8FC8737B5C2249309DFB797F6729CB3AA81AA40904B5D9CF19DD082D7633A0E7DDDDC251EA7DABD81D268191BDAD3D78DA827A17800CE7FBC5FED0552DA851CD04E86FAF290E2D40A5AABA2AD3711975ECD9A6C639B01B78DA827A17800CE76A876AB25EABD8CC2823493848E77F0D75ECD9A6C639B01B4E70A05D1297E1BBC6867C52282FAC85084A3168D6E26DF927F269C8F02392CD5571747095F342E88FB05168BE4CE3AF X-Mailru-Sender: 805131ABF43B5F09656281C20F8AEBE2D409D01192F627DF84585EA7DB7AD91C2D849A27F4FF3497BCD5BA2C93075E1EC77752E0C033A69E882C431543FD75E20226C39053983FF03453F38A29522196 X-Mras: OK X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 94.100.177.105 Subject: [Qemu-devel] [PATCH v4 2/3] tests/microbit-test: Make test independent of global_qtest X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Julia Suvorova via Qemu-devel Reply-To: Julia Suvorova Cc: Laurent Vivier , Peter Maydell , Thomas Huth , =?UTF-8?q?Steffen=20G=C3=B6rtz?= , Jim Mussared , Joel Stanley , Stefan Hajnoczi , Paolo Bonzini , Julia Suvorova Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Using of global_qtest is not required here. Let's replace functions like readl() with the corresponding qtest_* counterparts. Signed-off-by: Julia Suvorova Acked-by: Thomas Huth Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Stefan Hajnoczi --- tests/microbit-test.c | 247 ++++++++++++++++++++++-------------------- 1 file changed, 129 insertions(+), 118 deletions(-) diff --git a/tests/microbit-test.c b/tests/microbit-test.c index dcdc0cd41a..afeb6b082a 100644 --- a/tests/microbit-test.c +++ b/tests/microbit-test.c @@ -24,22 +24,22 @@ #include "hw/i2c/microbit_i2c.h" =20 /* Read a byte from I2C device at @addr from register @reg */ -static uint32_t i2c_read_byte(uint32_t addr, uint32_t reg) +static uint32_t i2c_read_byte(QTestState *qts, uint32_t addr, uint32_t reg) { uint32_t val; =20 - writel(NRF51_TWI_BASE + NRF51_TWI_REG_ADDRESS, addr); - writel(NRF51_TWI_BASE + NRF51_TWI_TASK_STARTTX, 1); - writel(NRF51_TWI_BASE + NRF51_TWI_REG_TXD, reg); - val =3D readl(NRF51_TWI_BASE + NRF51_TWI_EVENT_TXDSENT); + qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_REG_ADDRESS, addr); + qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_TASK_STARTTX, 1); + qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_REG_TXD, reg); + val =3D qtest_readl(qts, NRF51_TWI_BASE + NRF51_TWI_EVENT_TXDSENT); g_assert_cmpuint(val, =3D=3D, 1); - writel(NRF51_TWI_BASE + NRF51_TWI_TASK_STOP, 1); + qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_TASK_STOP, 1); =20 - writel(NRF51_TWI_BASE + NRF51_TWI_TASK_STARTRX, 1); - val =3D readl(NRF51_TWI_BASE + NRF51_TWI_EVENT_RXDREADY); + qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_TASK_STARTRX, 1); + val =3D qtest_readl(qts, NRF51_TWI_BASE + NRF51_TWI_EVENT_RXDREADY); g_assert_cmpuint(val, =3D=3D, 1); - val =3D readl(NRF51_TWI_BASE + NRF51_TWI_REG_RXD); - writel(NRF51_TWI_BASE + NRF51_TWI_TASK_STOP, 1); + val =3D qtest_readl(qts, NRF51_TWI_BASE + NRF51_TWI_REG_RXD); + qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_TASK_STOP, 1); =20 return val; } @@ -47,22 +47,25 @@ static uint32_t i2c_read_byte(uint32_t addr, uint32_t r= eg) static void test_microbit_i2c(void) { uint32_t val; + QTestState *qts =3D qtest_init("-M microbit"); =20 /* We don't program pins/irqs but at least enable the device */ - writel(NRF51_TWI_BASE + NRF51_TWI_REG_ENABLE, 5); + qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_REG_ENABLE, 5); =20 /* MMA8653 magnetometer detection */ - val =3D i2c_read_byte(0x3A, 0x0D); + val =3D i2c_read_byte(qts, 0x3A, 0x0D); g_assert_cmpuint(val, =3D=3D, 0x5A); =20 - val =3D i2c_read_byte(0x3A, 0x0D); + val =3D i2c_read_byte(qts, 0x3A, 0x0D); g_assert_cmpuint(val, =3D=3D, 0x5A); =20 /* LSM303 accelerometer detection */ - val =3D i2c_read_byte(0x3C, 0x4F); + val =3D i2c_read_byte(qts, 0x3C, 0x4F); g_assert_cmpuint(val, =3D=3D, 0x40); =20 - writel(NRF51_TWI_BASE + NRF51_TWI_REG_ENABLE, 0); + qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_REG_ENABLE, 0); + + qtest_quit(qts); } =20 static void test_nrf51_gpio(void) @@ -80,220 +83,228 @@ static void test_nrf51_gpio(void) {NRF51_GPIO_REG_DIRCLR, 0x00000000} }; =20 + QTestState *qts =3D qtest_init("-M microbit"); + /* Check reset state */ for (i =3D 0; i < ARRAY_SIZE(reset_state); i++) { expected =3D reset_state[i].expected; - actual =3D readl(NRF51_GPIO_BASE + reset_state[i].addr); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + reset_state[i].addr); g_assert_cmpuint(actual, =3D=3D, expected); } =20 for (i =3D 0; i < NRF51_GPIO_PINS; i++) { expected =3D 0x00000002; - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START + i * = 4); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + + NRF51_GPIO_REG_CNF_START + i * 4); g_assert_cmpuint(actual, =3D=3D, expected); } =20 /* Check dir bit consistency between dir and cnf */ /* Check set via DIRSET */ expected =3D 0x80000001; - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIRSET, expected); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIRSET, expected); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR); g_assert_cmpuint(actual, =3D=3D, expected); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) & 0x01; + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) + & 0x01; g_assert_cmpuint(actual, =3D=3D, 0x01); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01; + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) = & 0x01; g_assert_cmpuint(actual, =3D=3D, 0x01); =20 /* Check clear via DIRCLR */ - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIRCLR, 0x80000001); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIRCLR, 0x80000001); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR); g_assert_cmpuint(actual, =3D=3D, 0x00000000); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) & 0x01; + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) + & 0x01; g_assert_cmpuint(actual, =3D=3D, 0x00); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01; + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) = & 0x01; g_assert_cmpuint(actual, =3D=3D, 0x00); =20 /* Check set via DIR */ expected =3D 0x80000001; - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR, expected); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR, expected); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR); g_assert_cmpuint(actual, =3D=3D, expected); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) & 0x01; + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) + & 0x01; g_assert_cmpuint(actual, =3D=3D, 0x01); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01; + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) = & 0x01; g_assert_cmpuint(actual, =3D=3D, 0x01); =20 /* Reset DIR */ - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR, 0x00000000); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR, 0x00000000); =20 /* Check Input propagates */ - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x00); - qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0,= 0); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x00); + qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, 0); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x0= 1; g_assert_cmpuint(actual, =3D=3D, 0x00); - qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0,= 1); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, 1); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x0= 1; g_assert_cmpuint(actual, =3D=3D, 0x01); - qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0,= -1); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, -1); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x0= 1; g_assert_cmpuint(actual, =3D=3D, 0x01); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02); =20 /* Check pull-up working */ - qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0,= 0); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0000); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, 0); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0000); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x0= 1; g_assert_cmpuint(actual, =3D=3D, 0x00); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b1110); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b1110); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x0= 1; g_assert_cmpuint(actual, =3D=3D, 0x01); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02); =20 /* Check pull-down working */ - qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0,= 1); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0000); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, 1); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0000); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x0= 1; g_assert_cmpuint(actual, =3D=3D, 0x01); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0110); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0110); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x0= 1; g_assert_cmpuint(actual, =3D=3D, 0x00); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02); - qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0,= -1); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02); + qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, -1); =20 /* Check Output propagates */ - irq_intercept_out("/machine/nrf51"); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0011); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01); - g_assert_true(get_irq(0)); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTCLR, 0x01); - g_assert_false(get_irq(0)); + qtest_irq_intercept_out(qts, "/machine/nrf51"); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0011); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01); + g_assert_true(qtest_get_irq(qts, 0)); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTCLR, 0x01); + g_assert_false(qtest_get_irq(qts, 0)); =20 /* Check self-stimulation */ - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b01); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b01); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x0= 1; g_assert_cmpuint(actual, =3D=3D, 0x01); =20 - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTCLR, 0x01); - actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTCLR, 0x01); + actual =3D qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x0= 1; g_assert_cmpuint(actual, =3D=3D, 0x00); =20 /* * Check short-circuit - generates an guest_error which must be checked * manually as long as qtest can not scan qemu_log messages */ - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b01); - writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01); - qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0,= 0); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b01); + qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01); + qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, 0); + + qtest_quit(qts); } =20 -static void timer_task(hwaddr task) +static void timer_task(QTestState *qts, hwaddr task) { - writel(NRF51_TIMER_BASE + task, NRF51_TRIGGER_TASK); + qtest_writel(qts, NRF51_TIMER_BASE + task, NRF51_TRIGGER_TASK); } =20 -static void timer_clear_event(hwaddr event) +static void timer_clear_event(QTestState *qts, hwaddr event) { - writel(NRF51_TIMER_BASE + event, NRF51_EVENT_CLEAR); + qtest_writel(qts, NRF51_TIMER_BASE + event, NRF51_EVENT_CLEAR); } =20 -static void timer_set_bitmode(uint8_t mode) +static void timer_set_bitmode(QTestState *qts, uint8_t mode) { - writel(NRF51_TIMER_BASE + NRF51_TIMER_REG_BITMODE, mode); + qtest_writel(qts, NRF51_TIMER_BASE + NRF51_TIMER_REG_BITMODE, mode); } =20 -static void timer_set_prescaler(uint8_t prescaler) +static void timer_set_prescaler(QTestState *qts, uint8_t prescaler) { - writel(NRF51_TIMER_BASE + NRF51_TIMER_REG_PRESCALER, prescaler); + qtest_writel(qts, NRF51_TIMER_BASE + NRF51_TIMER_REG_PRESCALER, presca= ler); } =20 -static void timer_set_cc(size_t idx, uint32_t value) +static void timer_set_cc(QTestState *qts, size_t idx, uint32_t value) { - writel(NRF51_TIMER_BASE + NRF51_TIMER_REG_CC0 + idx * 4, value); + qtest_writel(qts, NRF51_TIMER_BASE + NRF51_TIMER_REG_CC0 + idx * 4, va= lue); } =20 -static void timer_assert_events(uint32_t ev0, uint32_t ev1, uint32_t ev2, - uint32_t ev3) +static void timer_assert_events(QTestState *qts, uint32_t ev0, uint32_t ev= 1, + uint32_t ev2, uint32_t ev3) { - g_assert(readl(NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_0) =3D=3D = ev0); - g_assert(readl(NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_1) =3D=3D = ev1); - g_assert(readl(NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_2) =3D=3D = ev2); - g_assert(readl(NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_3) =3D=3D = ev3); + g_assert(qtest_readl(qts, NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE= _0) + =3D=3D ev0); + g_assert(qtest_readl(qts, NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE= _1) + =3D=3D ev1); + g_assert(qtest_readl(qts, NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE= _2) + =3D=3D ev2); + g_assert(qtest_readl(qts, NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE= _3) + =3D=3D ev3); } =20 static void test_nrf51_timer(void) { uint32_t steps_to_overflow =3D 408; + QTestState *qts =3D qtest_init("-M microbit"); =20 /* Compare Match */ - timer_task(NRF51_TIMER_TASK_STOP); - timer_task(NRF51_TIMER_TASK_CLEAR); + timer_task(qts, NRF51_TIMER_TASK_STOP); + timer_task(qts, NRF51_TIMER_TASK_CLEAR); =20 - timer_clear_event(NRF51_TIMER_EVENT_COMPARE_0); - timer_clear_event(NRF51_TIMER_EVENT_COMPARE_1); - timer_clear_event(NRF51_TIMER_EVENT_COMPARE_2); - timer_clear_event(NRF51_TIMER_EVENT_COMPARE_3); + timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_0); + timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_1); + timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_2); + timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_3); =20 - timer_set_bitmode(NRF51_TIMER_WIDTH_16); /* 16 MHz Timer */ - timer_set_prescaler(0); + timer_set_bitmode(qts, NRF51_TIMER_WIDTH_16); /* 16 MHz Timer */ + timer_set_prescaler(qts, 0); /* Swept over in first step */ - timer_set_cc(0, 2); + timer_set_cc(qts, 0, 2); /* Barely miss on first step */ - timer_set_cc(1, 162); + timer_set_cc(qts, 1, 162); /* Spot on on third step */ - timer_set_cc(2, 480); + timer_set_cc(qts, 2, 480); =20 - timer_assert_events(0, 0, 0, 0); + timer_assert_events(qts, 0, 0, 0, 0); =20 - timer_task(NRF51_TIMER_TASK_START); - clock_step(10000); - timer_assert_events(1, 0, 0, 0); + timer_task(qts, NRF51_TIMER_TASK_START); + qtest_clock_step(qts, 10000); + timer_assert_events(qts, 1, 0, 0, 0); =20 /* Swept over on first overflow */ - timer_set_cc(3, 114); + timer_set_cc(qts, 3, 114); =20 - clock_step(10000); - timer_assert_events(1, 1, 0, 0); + qtest_clock_step(qts, 10000); + timer_assert_events(qts, 1, 1, 0, 0); =20 - clock_step(10000); - timer_assert_events(1, 1, 1, 0); + qtest_clock_step(qts, 10000); + timer_assert_events(qts, 1, 1, 1, 0); =20 /* Wrap time until internal counter overflows */ while (steps_to_overflow--) { - timer_assert_events(1, 1, 1, 0); - clock_step(10000); + timer_assert_events(qts, 1, 1, 1, 0); + qtest_clock_step(qts, 10000); } =20 - timer_assert_events(1, 1, 1, 1); + timer_assert_events(qts, 1, 1, 1, 1); =20 - timer_clear_event(NRF51_TIMER_EVENT_COMPARE_0); - timer_clear_event(NRF51_TIMER_EVENT_COMPARE_1); - timer_clear_event(NRF51_TIMER_EVENT_COMPARE_2); - timer_clear_event(NRF51_TIMER_EVENT_COMPARE_3); - timer_assert_events(0, 0, 0, 0); + timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_0); + timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_1); + timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_2); + timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_3); + timer_assert_events(qts, 0, 0, 0, 0); =20 - timer_task(NRF51_TIMER_TASK_STOP); + timer_task(qts, NRF51_TIMER_TASK_STOP); =20 /* Test Proposal: Stop/Shutdown */ /* Test Proposal: Shortcut Compare -> Clear */ /* Test Proposal: Shortcut Compare -> Stop */ /* Test Proposal: Counter Mode */ + + qtest_quit(qts); } =20 int main(int argc, char **argv) { - int ret; - g_test_init(&argc, &argv, NULL); =20 - global_qtest =3D qtest_initf("-machine microbit"); - qtest_add_func("/microbit/nrf51/gpio", test_nrf51_gpio); qtest_add_func("/microbit/nrf51/timer", test_nrf51_timer); qtest_add_func("/microbit/microbit/i2c", test_microbit_i2c); =20 - ret =3D g_test_run(); - - qtest_quit(global_qtest); - return ret; + return g_test_run(); } --=20 2.17.1 From nobody Fri Nov 7 09:08:06 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1547741974862559.4619514625431; Thu, 17 Jan 2019 08:19:34 -0800 (PST) Received: from localhost ([127.0.0.1]:47510 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gkAOD-0005SX-P7 for importer@patchew.org; Thu, 17 Jan 2019 11:19:33 -0500 Received: from eggs.gnu.org ([209.51.188.92]:52198) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gkAMQ-0004Vk-KW for qemu-devel@nongnu.org; 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X-Received-From: 94.100.177.105 Subject: [Qemu-devel] [PATCH v4 3/3] tests/microbit-test: Check nRF51 UART functionality X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Julia Suvorova via Qemu-devel Reply-To: Julia Suvorova Cc: Laurent Vivier , Peter Maydell , Thomas Huth , =?UTF-8?q?Steffen=20G=C3=B6rtz?= , Jim Mussared , Joel Stanley , Stefan Hajnoczi , Paolo Bonzini , Julia Suvorova Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Some functional tests for: Basic reception/transmittion Suspending INTEN* registers Signed-off-by: Julia Suvorova Reviewed-by: Stefan Hajnoczi --- tests/microbit-test.c | 84 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 84 insertions(+) diff --git a/tests/microbit-test.c b/tests/microbit-test.c index afeb6b082a..3da6d9529f 100644 --- a/tests/microbit-test.c +++ b/tests/microbit-test.c @@ -19,10 +19,93 @@ #include "libqtest.h" =20 #include "hw/arm/nrf51.h" +#include "hw/char/nrf51_uart.h" #include "hw/gpio/nrf51_gpio.h" #include "hw/timer/nrf51_timer.h" #include "hw/i2c/microbit_i2c.h" =20 +#include +#include + +static bool uart_wait_for_event(QTestState *qts, uint32_t event_addr) +{ + int i; + + for (i =3D 0; i < 1000; i++) { + if (qtest_readl(qts, event_addr) =3D=3D 1) { + qtest_writel(qts, event_addr, 0x00); + return true; + } + g_usleep(10000); + } + + return false; +} + +static void uart_rw_to_rxd(QTestState *qts, int sock_fd, const char *in, + char *out) +{ + int i, in_len =3D strlen(in); + + g_assert(write(sock_fd, in, in_len) =3D=3D in_len); + for (i =3D 0; i < in_len; i++) { + g_assert(uart_wait_for_event(qts, NRF51_UART_BASE + A_UART_RXDRDY)= ); + out[i] =3D qtest_readl(qts, NRF51_UART_BASE + A_UART_RXD); + } + out[i] =3D '\0'; +} + +static void uart_w_to_txd(QTestState *qts, const char *in) +{ + int i, in_len =3D strlen(in); + + for (i =3D 0; i < in_len; i++) { + qtest_writel(qts, NRF51_UART_BASE + A_UART_TXD, in[i]); + g_assert(uart_wait_for_event(qts, NRF51_UART_BASE + A_UART_TXDRDY)= ); + } +} + +static void test_nrf51_uart(void) +{ + int sock_fd; + char s[10]; + QTestState *qts =3D qtest_init_with_serial("-M microbit", &sock_fd); + + g_assert(write(sock_fd, "c", 1) =3D=3D 1); + g_assert(qtest_readl(qts, NRF51_UART_BASE + A_UART_RXD) =3D=3D 0); + + qtest_writel(qts, NRF51_UART_BASE + A_UART_ENABLE, 0x04); + qtest_writel(qts, NRF51_UART_BASE + A_UART_STARTRX, 0x01); + + g_assert(uart_wait_for_event(qts, NRF51_UART_BASE + A_UART_RXDRDY)); + qtest_writel(qts, NRF51_UART_BASE + A_UART_RXDRDY, 0x00); + g_assert(qtest_readl(qts, NRF51_UART_BASE + A_UART_RXD) =3D=3D 'c'); + + qtest_writel(qts, NRF51_UART_BASE + A_UART_INTENSET, 0x04); + g_assert(qtest_readl(qts, NRF51_UART_BASE + A_UART_INTEN) =3D=3D 0x04); + qtest_writel(qts, NRF51_UART_BASE + A_UART_INTENCLR, 0x04); + g_assert(qtest_readl(qts, NRF51_UART_BASE + A_UART_INTEN) =3D=3D 0x00); + + uart_rw_to_rxd(qts, sock_fd, "hello", s); + g_assert(memcmp(s, "hello", 5) =3D=3D 0); + + qtest_writel(qts, NRF51_UART_BASE + A_UART_STARTTX, 0x01); + uart_w_to_txd(qts, "d"); + g_assert(read(sock_fd, s, 10) =3D=3D 1); + g_assert(s[0] =3D=3D 'd'); + + qtest_writel(qts, NRF51_UART_BASE + A_UART_SUSPEND, 0x01); + qtest_writel(qts, NRF51_UART_BASE + A_UART_TXD, 'h'); + qtest_writel(qts, NRF51_UART_BASE + A_UART_STARTTX, 0x01); + uart_w_to_txd(qts, "world"); + g_assert(read(sock_fd, s, 10) =3D=3D 5); + g_assert(memcmp(s, "world", 5) =3D=3D 0); + + close(sock_fd); + + qtest_quit(qts); +} + /* Read a byte from I2C device at @addr from register @reg */ static uint32_t i2c_read_byte(QTestState *qts, uint32_t addr, uint32_t reg) { @@ -302,6 +385,7 @@ int main(int argc, char **argv) { g_test_init(&argc, &argv, NULL); =20 + qtest_add_func("/microbit/nrf51/uart", test_nrf51_uart); qtest_add_func("/microbit/nrf51/gpio", test_nrf51_gpio); qtest_add_func("/microbit/nrf51/timer", test_nrf51_timer); qtest_add_func("/microbit/microbit/i2c", test_microbit_i2c); --=20 2.17.1