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Thu, 17 Jan 2019 08:53:32 +0100 (CET) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: David Gibson Date: Thu, 17 Jan 2019 08:53:26 +0100 X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190117075327.22194-1-clg@kaod.org> References: <20190117075327.22194-1-clg@kaod.org> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19011707-0020-0000-0000-000003079B46 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19011707-0021-0000-0000-00002158BB29 Message-Id: <20190117075327.22194-4-clg@kaod.org> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-01-17_03:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=2 phishscore=0 bulkscore=0 spamscore=0 clxscore=1034 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1901170059 Content-Transfer-Encoding: quoted-printable X-MIME-Autoconverted: from 8bit to quoted-printable by mx0b-001b2d01.pphosted.com id x0H7rdol049118 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 3/4] spapr: move the interrupt presenters under machine_data X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , qemu-ppc@nongnu.org, Greg Kurz , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Next step is to remove them from under the PowerPCCPU Signed-off-by: C=C3=A9dric Le Goater Reviewed-by: Greg Kurz --- include/hw/ppc/spapr_cpu_core.h | 2 ++ hw/intc/spapr_xive.c | 3 ++- hw/intc/xics_spapr.c | 11 ++++++----- hw/ppc/spapr.c | 2 +- hw/ppc/spapr_cpu_core.c | 8 ++++---- hw/ppc/spapr_irq.c | 17 ++++++++++------- 6 files changed, 25 insertions(+), 18 deletions(-) diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_cor= e.h index 9e2821e4b31f..d64f86bc284e 100644 --- a/include/hw/ppc/spapr_cpu_core.h +++ b/include/hw/ppc/spapr_cpu_core.h @@ -46,6 +46,8 @@ typedef struct sPAPRCPUState { uint64_t vpa_addr; uint64_t slb_shadow_addr, slb_shadow_size; uint64_t dtl_addr, dtl_size; + struct ICPState *icp; + struct XiveTCTX *tctx; } sPAPRCPUState; =20 static inline sPAPRCPUState *spapr_cpu_state(PowerPCCPU *cpu) diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index 136d872f16bc..a0f5ff929447 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -16,6 +16,7 @@ #include "monitor/monitor.h" #include "hw/ppc/fdt.h" #include "hw/ppc/spapr.h" +#include "hw/ppc/spapr_cpu_core.h" #include "hw/ppc/spapr_xive.h" #include "hw/ppc/xive.h" #include "hw/ppc/xive_regs.h" @@ -394,7 +395,7 @@ static XiveTCTX *spapr_xive_get_tctx(XiveRouter *xrtr, = CPUState *cs) { PowerPCCPU *cpu =3D POWERPC_CPU(cs); =20 - return cpu->tctx; + return spapr_cpu_state(cpu)->tctx; } =20 static const VMStateDescription vmstate_spapr_xive_end =3D { diff --git a/hw/intc/xics_spapr.c b/hw/intc/xics_spapr.c index de6cc15b6474..e2d8b3818336 100644 --- a/hw/intc/xics_spapr.c +++ b/hw/intc/xics_spapr.c @@ -31,6 +31,7 @@ #include "trace.h" #include "qemu/timer.h" #include "hw/ppc/spapr.h" +#include "hw/ppc/spapr_cpu_core.h" #include "hw/ppc/xics.h" #include "hw/ppc/xics_spapr.h" #include "hw/ppc/fdt.h" @@ -45,7 +46,7 @@ static target_ulong h_cppr(PowerPCCPU *cpu, sPAPRMachineS= tate *spapr, { target_ulong cppr =3D args[0]; =20 - icp_set_cppr(cpu->icp, cppr); + icp_set_cppr(spapr_cpu_state(cpu)->icp, cppr); return H_SUCCESS; } =20 @@ -66,7 +67,7 @@ static target_ulong h_ipi(PowerPCCPU *cpu, sPAPRMachineSt= ate *spapr, static target_ulong h_xirr(PowerPCCPU *cpu, sPAPRMachineState *spapr, target_ulong opcode, target_ulong *args) { - uint32_t xirr =3D icp_accept(cpu->icp); + uint32_t xirr =3D icp_accept(spapr_cpu_state(cpu)->icp); =20 args[0] =3D xirr; return H_SUCCESS; @@ -75,7 +76,7 @@ static target_ulong h_xirr(PowerPCCPU *cpu, sPAPRMachineS= tate *spapr, static target_ulong h_xirr_x(PowerPCCPU *cpu, sPAPRMachineState *spapr, target_ulong opcode, target_ulong *args) { - uint32_t xirr =3D icp_accept(cpu->icp); + uint32_t xirr =3D icp_accept(spapr_cpu_state(cpu)->icp); =20 args[0] =3D xirr; args[1] =3D cpu_get_host_ticks(); @@ -87,7 +88,7 @@ static target_ulong h_eoi(PowerPCCPU *cpu, sPAPRMachineSt= ate *spapr, { target_ulong xirr =3D args[0]; =20 - icp_eoi(cpu->icp, xirr); + icp_eoi(spapr_cpu_state(cpu)->icp, xirr); return H_SUCCESS; } =20 @@ -95,7 +96,7 @@ static target_ulong h_ipoll(PowerPCCPU *cpu, sPAPRMachine= State *spapr, target_ulong opcode, target_ulong *args) { uint32_t mfrr; - uint32_t xirr =3D icp_ipoll(cpu->icp, &mfrr); + uint32_t xirr =3D icp_ipoll(spapr_cpu_state(cpu)->icp, &mfrr); =20 args[0] =3D xirr; args[1] =3D mfrr; diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 83081defde4e..181f994c87a7 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -3896,7 +3896,7 @@ static ICPState *spapr_icp_get(XICSFabric *xi, int vc= pu_id) { PowerPCCPU *cpu =3D spapr_find_cpu(vcpu_id); =20 - return cpu ? cpu->icp : NULL; + return cpu ? spapr_cpu_state(cpu)->icp : NULL; } =20 static void spapr_pic_print_info(InterruptStatsProvider *obj, diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 0405306d1e59..ef6cbb9c2943 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -194,11 +194,11 @@ static void spapr_unrealize_vcpu(PowerPCCPU *cpu, sPA= PRCPUCore *sc) vmstate_unregister(NULL, &vmstate_spapr_cpu_state, cpu->machine_da= ta); } qemu_unregister_reset(spapr_cpu_reset, cpu); - if (cpu->icp) { - object_unparent(OBJECT(cpu->icp)); + if (spapr_cpu_state(cpu)->icp) { + object_unparent(OBJECT(spapr_cpu_state(cpu)->icp)); } - if (cpu->tctx) { - object_unparent(OBJECT(cpu->tctx)); + if (spapr_cpu_state(cpu)->tctx) { + object_unparent(OBJECT(spapr_cpu_state(cpu)->tctx)); } cpu_remove_sync(CPU(cpu)); object_unparent(OBJECT(cpu)); diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c index 1da7a32348fc..2d7a7c163876 100644 --- a/hw/ppc/spapr_irq.c +++ b/hw/ppc/spapr_irq.c @@ -12,6 +12,7 @@ #include "qemu/error-report.h" #include "qapi/error.h" #include "hw/ppc/spapr.h" +#include "hw/ppc/spapr_cpu_core.h" #include "hw/ppc/spapr_xive.h" #include "hw/ppc/xics.h" #include "hw/ppc/xics_spapr.h" @@ -185,7 +186,7 @@ static void spapr_irq_print_info_xics(sPAPRMachineState= *spapr, Monitor *mon) CPU_FOREACH(cs) { PowerPCCPU *cpu =3D POWERPC_CPU(cs); =20 - icp_pic_print_info(cpu->icp, mon); + icp_pic_print_info(spapr_cpu_state(cpu)->icp, mon); } =20 ics_pic_print_info(spapr->ics, mon); @@ -196,6 +197,7 @@ static void spapr_irq_cpu_intc_create_xics(sPAPRMachine= State *spapr, { Error *local_err =3D NULL; Object *obj; + sPAPRCPUState *spapr_cpu =3D spapr_cpu_state(cpu); =20 obj =3D icp_create(OBJECT(cpu), spapr->icp_type, XICS_FABRIC(spapr), &local_err); @@ -204,7 +206,7 @@ static void spapr_irq_cpu_intc_create_xics(sPAPRMachine= State *spapr, return; } =20 - cpu->icp =3D ICP(obj); + spapr_cpu->icp =3D ICP(obj); } =20 static int spapr_irq_post_load_xics(sPAPRMachineState *spapr, int version_= id) @@ -213,7 +215,7 @@ static int spapr_irq_post_load_xics(sPAPRMachineState *= spapr, int version_id) CPUState *cs; CPU_FOREACH(cs) { PowerPCCPU *cpu =3D POWERPC_CPU(cs); - icp_resend(cpu->icp); + icp_resend(spapr_cpu_state(cpu)->icp); } } return 0; @@ -334,7 +336,7 @@ static void spapr_irq_print_info_xive(sPAPRMachineState= *spapr, CPU_FOREACH(cs) { PowerPCCPU *cpu =3D POWERPC_CPU(cs); =20 - xive_tctx_pic_print_info(cpu->tctx, mon); + xive_tctx_pic_print_info(spapr_cpu_state(cpu)->tctx, mon); } =20 spapr_xive_pic_print_info(spapr->xive, mon); @@ -345,6 +347,7 @@ static void spapr_irq_cpu_intc_create_xive(sPAPRMachine= State *spapr, { Error *local_err =3D NULL; Object *obj; + sPAPRCPUState *spapr_cpu =3D spapr_cpu_state(cpu); =20 obj =3D xive_tctx_create(OBJECT(cpu), XIVE_ROUTER(spapr->xive), &local= _err); if (local_err) { @@ -352,13 +355,13 @@ static void spapr_irq_cpu_intc_create_xive(sPAPRMachi= neState *spapr, return; } =20 - cpu->tctx =3D XIVE_TCTX(obj); + spapr_cpu->tctx =3D XIVE_TCTX(obj); =20 /* * (TCG) Early setting the OS CAM line for hotplugged CPUs as they * don't beneficiate from the reset of the XIVE IRQ backend */ - spapr_xive_set_tctx_os_cam(cpu->tctx); + spapr_xive_set_tctx_os_cam(spapr_cpu->tctx); } =20 static int spapr_irq_post_load_xive(sPAPRMachineState *spapr, int version_= id) @@ -374,7 +377,7 @@ static void spapr_irq_reset_xive(sPAPRMachineState *spa= pr, Error **errp) PowerPCCPU *cpu =3D POWERPC_CPU(cs); =20 /* (TCG) Set the OS CAM line of the thread interrupt context. */ - spapr_xive_set_tctx_os_cam(cpu->tctx); + spapr_xive_set_tctx_os_cam(spapr_cpu_state(cpu)->tctx); } =20 /* Activate the XIVE MMIOs */ --=20 2.20.1