From nobody Fri Nov 7 10:27:12 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1547694434342474.9158032660516; Wed, 16 Jan 2019 19:07:14 -0800 (PST) Received: from localhost ([127.0.0.1]:58816 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gjy1Q-0003TC-UG for importer@patchew.org; Wed, 16 Jan 2019 22:07:12 -0500 Received: from eggs.gnu.org ([209.51.188.92]:42955) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gjxwx-0007zz-2K for qemu-devel@nongnu.org; Wed, 16 Jan 2019 22:02:37 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gjxmc-0005xZ-ST for qemu-devel@nongnu.org; Wed, 16 Jan 2019 21:51:56 -0500 Received: from ozlabs.ru ([107.173.13.209]:53396) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gjxmc-0005wN-Kk; Wed, 16 Jan 2019 21:51:54 -0500 Received: from fstn1-p1.ozlabs.ibm.com (localhost [IPv6:::1]) by ozlabs.ru (Postfix) with ESMTP id 2ACFAAE801D8; Wed, 16 Jan 2019 21:51:21 -0500 (EST) From: Alexey Kardashevskiy To: qemu-devel@nongnu.org Date: Thu, 17 Jan 2019 13:51:13 +1100 Message-Id: <20190117025115.81178-2-aik@ozlabs.ru> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190117025115.81178-1-aik@ozlabs.ru> References: <20190117025115.81178-1-aik@ozlabs.ru> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 107.173.13.209 Subject: [Qemu-devel] [PATCH qemu 1/3] vfio/spapr: Fix indirect levels calculation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jose Ricardo Ziviani , Alexey Kardashevskiy , Daniel Henrique Barboza , Alex Williamson , Piotr Jaroszynski , qemu-ppc@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The current code assumes that we can address more bits on a PCI bus for DMA than we really can but there is no way knowing the actual limit. This makes a better guess for the number of levels and if the kernel fails to allocate that, this increases the level numbers till succeeded or reached the 64bit limit. This adds levels to the trace point. This may cause the kernel to warn about failed allocation: [65122.837458] Failed to allocate a TCE memory, level shift=3D28 which might happen if MAX_ORDER is not large enough as it can vary: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arc= h/powerpc/Kconfig?h=3Dv5.0-rc2#n727 Signed-off-by: Alexey Kardashevskiy --- hw/vfio/spapr.c | 38 +++++++++++++++++++++++++++++--------- hw/vfio/trace-events | 2 +- 2 files changed, 30 insertions(+), 10 deletions(-) diff --git a/hw/vfio/spapr.c b/hw/vfio/spapr.c index becf71a..2675bf5 100644 --- a/hw/vfio/spapr.c +++ b/hw/vfio/spapr.c @@ -146,7 +146,7 @@ int vfio_spapr_create_window(VFIOContainer *container, int ret; IOMMUMemoryRegion *iommu_mr =3D IOMMU_MEMORY_REGION(section->mr); uint64_t pagesize =3D memory_region_iommu_get_min_page_size(iommu_mr); - unsigned entries, pages; + unsigned entries, bits_total, bits_per_level, max_levels; struct vfio_iommu_spapr_tce_create create =3D { .argsz =3D sizeof(crea= te) }; long systempagesize =3D qemu_getrampagesize(); =20 @@ -176,16 +176,35 @@ int vfio_spapr_create_window(VFIOContainer *container, create.window_size =3D int128_get64(section->size); create.page_shift =3D ctz64(pagesize); /* - * SPAPR host supports multilevel TCE tables, there is some - * heuristic to decide how many levels we want for our table: - * 0..64 =3D 1; 65..4096 =3D 2; 4097..262144 =3D 3; 262145.. =3D 4 + * SPAPR host supports multilevel TCE tables. We try to guess optimal + * levels number and if this fails (for example due to the host memory + * fragmentation), we increase levels. The DMA address structure is: + * rrrrrrrr rxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx iii= iiiii + * where: + * r =3D reserved (bits >=3D 55 are reserved in the existing hardwar= e) + * i =3D IOMMU page offset (64K in this example) + * x =3D bits to index a TCE which can be split to equal chunks to i= ndex + * within the level. + * The aim is to split "x" to smaller possible number of levels. */ entries =3D create.window_size >> create.page_shift; - pages =3D MAX((entries * sizeof(uint64_t)) / getpagesize(), 1); - pages =3D MAX(pow2ceil(pages), 1); /* Round up */ - create.levels =3D ctz64(pages) / 6 + 1; - - ret =3D ioctl(container->fd, VFIO_IOMMU_SPAPR_TCE_CREATE, &create); + /* bits_total is number of "x" needed */ + bits_total =3D ctz64((entries * sizeof(uint64_t))); + /* + * bits_per_level is a safe guess of how much we can allocate per leve= l: + * 8 is the current minimum for CONFIG_FORCE_MAX_ZONEORDER and MAX_ORD= ER + * is usually bigger than that. + */ + bits_per_level =3D ctz64(systempagesize) + 8; + create.levels =3D bits_total / bits_per_level; + create.levels =3D MAX(1, create.levels); + max_levels =3D (64 - create.page_shift) / ctz64(systempagesize); + for ( ; create.levels <=3D max_levels; ++create.levels) { + ret =3D ioctl(container->fd, VFIO_IOMMU_SPAPR_TCE_CREATE, &create); + if (!ret) { + break; + } + } if (ret) { error_report("Failed to create a window, ret =3D %d (%m)", ret); return -errno; @@ -200,6 +219,7 @@ int vfio_spapr_create_window(VFIOContainer *container, return -EINVAL; } trace_vfio_spapr_create_window(create.page_shift, + create.levels, create.window_size, create.start_addr); *pgsize =3D pagesize; diff --git a/hw/vfio/trace-events b/hw/vfio/trace-events index 0f9f810..adfa75e 100644 --- a/hw/vfio/trace-events +++ b/hw/vfio/trace-events @@ -129,6 +129,6 @@ vfio_prereg_listener_region_add_skip(uint64_t start, ui= nt64_t end) "0x%"PRIx64" vfio_prereg_listener_region_del_skip(uint64_t start, uint64_t end) "0x%"PR= Ix64" - 0x%"PRIx64 vfio_prereg_register(uint64_t va, uint64_t size, int ret) "va=3D0x%"PRIx64= " size=3D0x%"PRIx64" ret=3D%d" vfio_prereg_unregister(uint64_t va, uint64_t size, int ret) "va=3D0x%"PRIx= 64" size=3D0x%"PRIx64" ret=3D%d" -vfio_spapr_create_window(int ps, uint64_t ws, uint64_t off) "pageshift=3D0= x%x winsize=3D0x%"PRIx64" offset=3D0x%"PRIx64 +vfio_spapr_create_window(int ps, unsigned int levels, uint64_t ws, uint64_= t off) "pageshift=3D0x%x levels=3D%u winsize=3D0x%"PRIx64" offset=3D0x%"PRI= x64 vfio_spapr_remove_window(uint64_t off) "offset=3D0x%"PRIx64 vfio_spapr_group_attach(int groupfd, int tablefd) "Attached groupfd %d to = liobn fd %d" --=20 2.17.1