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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id 125sm47835842wmm.26.2019.01.14.03.56.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 14 Jan 2019 03:56:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=I8BvMLz1v72BoXMnzdr5sWeD9HZE5rwvOIP96mH0G5U=; b=feHMsEEaPULmfBkM9G8mYah7kiWDdXIsZCGGXpuuz0i4TKBIJeL+z1/x880CnUzH3u ro+y30hYdrh9TRoVEFKlVrC8Dpn8NjZzgzskY8f1pHDEtK99LinH/Yodxa/1Zcwmmw5x BgSc8J6GOR55DGrUJfD2djkoxC49CZiY/bqNY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=I8BvMLz1v72BoXMnzdr5sWeD9HZE5rwvOIP96mH0G5U=; b=bmezBhBmknDkg1DgIj52Yuiiwpm3hRN5O+GFxx8+DQ1Fyao/rLzkfIbFIdeKpKpq1c H2YWgbHMvYKk33lmTqVwfXkpBpUMLpRRDwk7UI82lcgUK+uK+9COwcZ6lsXmsA2wJTpF eD1bqXmwSDWSty+mn3cVVeYw6JeYeKOwSkUTNV9vNet5qaVFXCrU3Z/zGp7uz7xhZmU3 7oIO6mSt50/f4JMj+jeiaQAzx3BlZ4mpRmj12zyhsfJVCpPzT1usgLMFO/ORLlcns5OE dkS2dna2crCf7s10FTLXiQLpkyoltiuaiEWDqYk1yA4n+LWY1QcDOJ5405p1N0UA7QWa f09w== X-Gm-Message-State: AJcUukdDD0qgSjZ0aWkSXeK4BTXkkC95K8M1n0YgMFP0ZvhqjRfy7BKi Atb4jnATULdTokkhJJD4GZrkLQ== X-Google-Smtp-Source: ALg8bN5AfKoa5xHJCVmgG/pnBafRE4Y6dLi61gJvFyRkQvZL5M64UnJzJXbpeyfUg75Jv0N/27+aBQ== X-Received: by 2002:adf:a743:: with SMTP id e3mr23024597wrd.56.1547467002004; Mon, 14 Jan 2019 03:56:42 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Mon, 14 Jan 2019 11:56:34 +0000 Message-Id: <20190114115637.6335-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190114115637.6335-1-peter.maydell@linaro.org> References: <20190114115637.6335-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::442 Subject: [Qemu-devel] [PATCH v2 1/4] hw/arm/xlx-zynqmp: Realize cluster after putting RPUs in it X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , Peter Crosthwaite , Alistair Francis , Richard Henderson , "Emilio G . Cota" , "Edgar E. Iglesias" , Paolo Bonzini , Aleksandar Markovic Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Currently the cluster implementation doesn't have any constraints on the ordering of realizing the TYPE_CPU_CLUSTER and populating it with child objects. We want to impose a constraint that realize must happen only after all the child objects are added, so move the realize of rpu_cluster. (The apu_cluster is already realized after child population.) Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Reviewed-by: Luc Michel Reviewed-by: Alistair Francis --- hw/arm/xlnx-zynqmp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index c67ac2e64ac..370b0e44a38 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -183,8 +183,6 @@ static void xlnx_zynqmp_create_rpu(XlnxZynqMPState *s, = const char *boot_cpu, &error_abort, NULL); qdev_prop_set_uint32(DEVICE(&s->rpu_cluster), "cluster-id", 1); =20 - qdev_init_nofail(DEVICE(&s->rpu_cluster)); - for (i =3D 0; i < num_rpus; i++) { char *name; =20 @@ -212,6 +210,8 @@ static void xlnx_zynqmp_create_rpu(XlnxZynqMPState *s, = const char *boot_cpu, return; } } + + qdev_init_nofail(DEVICE(&s->rpu_cluster)); } =20 static void xlnx_zynqmp_init(Object *obj) --=20 2.20.1 From nobody Mon Feb 9 08:07:46 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 1547467279077387.29032252749255; Mon, 14 Jan 2019 04:01:19 -0800 (PST) Received: from localhost ([127.0.0.1]:58518 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gj0vY-0001Iq-9h for importer@patchew.org; Mon, 14 Jan 2019 07:01:12 -0500 Received: from eggs.gnu.org ([209.51.188.92]:47202) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gj0rI-0006Y7-L4 for qemu-devel@nongnu.org; Mon, 14 Jan 2019 06:56:50 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gj0rG-0005rk-Q8 for qemu-devel@nongnu.org; Mon, 14 Jan 2019 06:56:48 -0500 Received: from mail-wr1-x444.google.com ([2a00:1450:4864:20::444]:37366) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gj0rE-0005pz-Oa for qemu-devel@nongnu.org; Mon, 14 Jan 2019 06:56:46 -0500 Received: by mail-wr1-x444.google.com with SMTP id s12so22515650wrt.4 for ; Mon, 14 Jan 2019 03:56:44 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id 125sm47835842wmm.26.2019.01.14.03.56.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 14 Jan 2019 03:56:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kBvSXrDaVNbHgyLrktW8tQ0AJ0MM4jIMZHDOYQRgy5w=; b=eDzbeB6JKcos+axA+8vYHVV+EpMCB7bksyYAQsEGYe/PewNzDGdlTZidxoT1ezC+Kr SEFoMgDjUecJjdkst2dBSuWgfNhEla4nQzOuvNE/kyksxOKB4iOPleRmXpfAnBfXMnfz 8dzq2ohI/MbggbWpbRsfFNFcMo14uRu0xZkOE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kBvSXrDaVNbHgyLrktW8tQ0AJ0MM4jIMZHDOYQRgy5w=; b=HMSd+63m72RLG8FnGhMsjoJgkxafqmMdxR5u9xAOeMNzHL0ZIUCLolYhAOQrDXUBlW t9ZOF+eOGD1OVtD5C9/4SNOj98ygVrfojV6Rffb/TQbcBXTWHckiMQYfwbGXaM+w/Y0a GTrWZipS/uKC5Qc8fvs0yoD/Jn2ERnlZJzJrCfFYuX38TT3R3M+xhfO4IRSqYTeN5Q1X wxaqOVlm+Pp/rGicNhouBz/r9GcKejP9CxWfK2Gkrz0njAnv5o6Hj+KqEyR52CQU6ZMW hFcEcsFm5ieMfAFe3sgWvuYbSwfHBOgafm3pBYLkIFlwNdPi/eLrGPNlpKZ1Bqt4Uc29 w57g== X-Gm-Message-State: AJcUukcWbGMM/w6CkyL0/PxkcK66QdglvWJDbp9sHJ2rWoGQh+53WbO/ XYtVeqBRmBhSVHsYBkbsyQZZuGOiPehTmg== X-Google-Smtp-Source: ALg8bN6MV4mWJH5gNLMluZjEB6R1sReWgDVA2/BWb1rp8PQUFbh0N7TPtRwh1Hnic0T3PyS4QR6+Yg== X-Received: by 2002:adf:f149:: with SMTP id y9mr25684348wro.284.1547467003494; Mon, 14 Jan 2019 03:56:43 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Mon, 14 Jan 2019 11:56:35 +0000 Message-Id: <20190114115637.6335-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190114115637.6335-1-peter.maydell@linaro.org> References: <20190114115637.6335-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::444 Subject: [Qemu-devel] [PATCH v2 2/4] qom/cpu: Add cluster_index to CPUState X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , Peter Crosthwaite , Alistair Francis , Richard Henderson , "Emilio G . Cota" , "Edgar E. Iglesias" , Paolo Bonzini , Aleksandar Markovic Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" For TCG we want to distinguish which cluster a CPU is in, and we need to do it quickly. Cache the cluster index in the CPUState struct, by having the cluster object set cpu->cluster_index for each CPU child when it is realized. This means that board/SoC code must add all CPUs to the cluster before realizing the cluster object. Regrettably QOM provides no way to prevent adding children to a realized object and no way for the parent to be notified when a new child is added to it, so we don't have any way to enforce/assert this constraint; all we can do is document it in a comment. The restriction on how many clusters can exist in the system is imposed by TCG code which will be added in a subsequent commit, but the check to enforce it in cluster.c fits better in this one. Signed-off-by: Peter Maydell Reviewed-by: Luc Michel --- include/hw/cpu/cluster.h | 19 +++++++++++++++++++ include/qom/cpu.h | 7 +++++++ hw/cpu/cluster.c | 33 +++++++++++++++++++++++++++++++++ qom/cpu.c | 1 + 4 files changed, 60 insertions(+) diff --git a/include/hw/cpu/cluster.h b/include/hw/cpu/cluster.h index 73818232437..d1bef315d10 100644 --- a/include/hw/cpu/cluster.h +++ b/include/hw/cpu/cluster.h @@ -34,12 +34,31 @@ * Arm big.LITTLE system) they should be in different clusters. If the CPU= s do * not have the same view of memory (for example the main CPU and a manage= ment * controller processor) they should be in different clusters. + * + * A cluster is created by creating an object of TYPE_CPU_CLUSTER, and then + * adding the CPUs to it as QOM child objects (e.g. using the + * object_initialize_child() or object_property_add_child() functions). + * All CPUs must be added as children before the cluster is realized. + * (Regrettably QOM provides no way to prevent adding children to a realiz= ed + * object and no way for the parent to be notified when a new child is add= ed + * to it, so this restriction is not checked for, but the system will not + * behave correctly if it is not adhered to.) + * + * A CPU which is not put into any cluster will be considered implicitly + * to be in a cluster with all the other "loose" CPUs, so all CPUs that are + * not assigned to clusters must be identical. */ =20 #define TYPE_CPU_CLUSTER "cpu-cluster" #define CPU_CLUSTER(obj) \ OBJECT_CHECK(CPUClusterState, (obj), TYPE_CPU_CLUSTER) =20 +/* + * This limit is imposed by TCG, which puts the cluster ID into an + * 8 bit field (and uses all-1s for the default "not in any cluster"). + */ +#define MAX_CLUSTERS 255 + /** * CPUClusterState: * @cluster_id: The cluster ID. This value is for internal use only and sh= ould diff --git a/include/qom/cpu.h b/include/qom/cpu.h index 1396f53e5b5..844becbcedc 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -279,6 +279,11 @@ struct qemu_work_item; /** * CPUState: * @cpu_index: CPU index (informative). + * @cluster_index: Identifies which cluster this CPU is in. + * For boards which don't define clusters or for "loose" CPUs not assign= ed + * to a cluster this will be UNASSIGNED_CLUSTER_INDEX; otherwise it will + * be the same as the cluster-id property of the CPU object's TYPE_CPU_C= LUSTER + * QOM parent. * @nr_cores: Number of cores within this CPU package. * @nr_threads: Number of threads within this CPU. * @running: #true if CPU is currently running (lockless). @@ -404,6 +409,7 @@ struct CPUState { =20 /* TODO Move common fields from CPUArchState here. */ int cpu_index; + int cluster_index; uint32_t halted; uint32_t can_do_io; int32_t exception_index; @@ -1109,5 +1115,6 @@ extern const struct VMStateDescription vmstate_cpu_co= mmon; #endif /* NEED_CPU_H */ =20 #define UNASSIGNED_CPU_INDEX -1 +#define UNASSIGNED_CLUSTER_INDEX -1 =20 #endif diff --git a/hw/cpu/cluster.c b/hw/cpu/cluster.c index 9d50a235d5c..d672f54a620 100644 --- a/hw/cpu/cluster.c +++ b/hw/cpu/cluster.c @@ -20,19 +20,52 @@ =20 #include "qemu/osdep.h" #include "hw/cpu/cluster.h" +#include "qom/cpu.h" #include "qapi/error.h" #include "qemu/module.h" +#include "qemu/cutils.h" =20 static Property cpu_cluster_properties[] =3D { DEFINE_PROP_UINT32("cluster-id", CPUClusterState, cluster_id, 0), DEFINE_PROP_END_OF_LIST() }; =20 +static void cpu_cluster_realize(DeviceState *dev, Error **errp) +{ + /* Iterate through all our CPU children and set their cluster_index */ + CPUClusterState *cluster =3D CPU_CLUSTER(dev); + ObjectPropertyIterator iter; + ObjectProperty *prop; + Object *cluster_obj =3D OBJECT(dev); + + if (cluster->cluster_id >=3D MAX_CLUSTERS) { + error_setg(errp, "cluster-id must be less than %d", MAX_CLUSTERS); + return; + } + + object_property_iter_init(&iter, cluster_obj); + while ((prop =3D object_property_iter_next(&iter))) { + Object *cpu_obj; + CPUState *cpu; + + if (!strstart(prop->type, "child<", NULL)) { + continue; + } + cpu_obj =3D object_property_get_link(cluster_obj, prop->name, NULL= ); + cpu =3D (CPUState *)object_dynamic_cast(cpu_obj, TYPE_CPU); + if (!cpu) { + continue; + } + cpu->cluster_index =3D cluster->cluster_id; + } +} + static void cpu_cluster_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); =20 dc->props =3D cpu_cluster_properties; + dc->realize =3D cpu_cluster_realize; } =20 static const TypeInfo cpu_cluster_type_info =3D { diff --git a/qom/cpu.c b/qom/cpu.c index 5442a7323be..f5579b1cd50 100644 --- a/qom/cpu.c +++ b/qom/cpu.c @@ -364,6 +364,7 @@ static void cpu_common_initfn(Object *obj) CPUClass *cc =3D CPU_GET_CLASS(obj); =20 cpu->cpu_index =3D UNASSIGNED_CPU_INDEX; + cpu->cluster_index =3D UNASSIGNED_CLUSTER_INDEX; cpu->gdb_num_regs =3D cpu->gdb_num_g_regs =3D cc->gdb_num_core_regs; /* *-user doesn't have configurable SMP topology */ /* the default value is changed by qemu_init_vcpu() for softmmu */ --=20 2.20.1 From nobody Mon Feb 9 08:07:46 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1547467365037905.0696248973828; Mon, 14 Jan 2019 04:02:45 -0800 (PST) Received: from localhost ([127.0.0.1]:58829 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gj0x2-0002Y2-3H for importer@patchew.org; Mon, 14 Jan 2019 07:02:44 -0500 Received: from eggs.gnu.org ([209.51.188.92]:47209) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gj0rI-0006YC-MC for qemu-devel@nongnu.org; Mon, 14 Jan 2019 06:56:49 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gj0rH-0005s1-7C for qemu-devel@nongnu.org; Mon, 14 Jan 2019 06:56:48 -0500 Received: from mail-wm1-x343.google.com ([2a00:1450:4864:20::343]:37276) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gj0rH-0005qk-0K for qemu-devel@nongnu.org; Mon, 14 Jan 2019 06:56:47 -0500 Received: by mail-wm1-x343.google.com with SMTP id g67so8532022wmd.2 for ; Mon, 14 Jan 2019 03:56:45 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id 125sm47835842wmm.26.2019.01.14.03.56.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 14 Jan 2019 03:56:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=oqRnIlXxwg2YvWcpXWnxVXBNj6TKwPF8KWOfQK0VbWs=; b=WFDQnSPKYzeEbOmwnvYye+A7r2uqk5tjXldKXZFbRYMO2q7u8U4Rx6W/qKcbFR6gyK tV2uxgTA4nHVETH2W0hUFfLMAak1oqSJKysy3foVeJkMQv9JiicRE9Tma2vIQae38ENf 9Hl1qXrFxjH+HfTB44tJFIdH4bS4XI3W9mH3Y= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=oqRnIlXxwg2YvWcpXWnxVXBNj6TKwPF8KWOfQK0VbWs=; b=CT1hep7Nno4RW1IRPryfqORuMhbeR7VhMnEbwwzgu22TB5h37ocXRHk/J3AVCk74hx qcC+FLEXuCOLYYepbkoZiIM7CUtSZG5RymgO+nQA+8YI/5+c+J1bdF19csVeeYF0DXj7 id2LnRF9v1vInYPF7Gf7lV3bp9bZq79rD1R+gxWayaUUqmELvt50ae7T1kJkR3KqX3yk VNbSUfxCAHpJDPVRSzdUVSRRAPodc8enJKY5HX4di0zBlwyQhejWUd10SnbOlpr6JCKT YtF/7yILfaa5pSY9AUkT0I+B+3LvEhlazVT8dbM9v4/Wjz3st4P9FnlYzf6qptywHfeV +XRQ== X-Gm-Message-State: AJcUukdr0LSPhD4j0DWAB9si7v64DzlExJAOreVjgyu9hEaGyDIbZ961 /17XHdCJllKg9DqxHIEjccZSAg== X-Google-Smtp-Source: ALg8bN4rStjsyEFx6hgdR3pJD8e2Do++3IXVZwwyYD312FwVzrD1T6h9Jt/4IT+xKyveVudkifkdlg== X-Received: by 2002:a1c:570d:: with SMTP id l13mr11869347wmb.139.1547467004848; Mon, 14 Jan 2019 03:56:44 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Mon, 14 Jan 2019 11:56:36 +0000 Message-Id: <20190114115637.6335-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190114115637.6335-1-peter.maydell@linaro.org> References: <20190114115637.6335-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::343 Subject: [Qemu-devel] [PATCH v2 3/4] accel/tcg: Add cluster number to TCG TB hash X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , Peter Crosthwaite , Alistair Francis , Richard Henderson , "Emilio G . Cota" , "Edgar E. Iglesias" , Paolo Bonzini , Aleksandar Markovic Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Include the cluster number in the hash we use to look up TBs. This is important because a TB that is valid for one cluster at a given physical address and set of CPU flags is not necessarily valid for another: the two clusters may have different views of physical memory, or may have different CPU features (eg FPU present or absent). We put the cluster number in the high 8 bits of the TB cflags. This gives us up to 256 clusters, which should be enough for anybody. If we ever need more, or need more bits in cflags for other purposes, we could make tb_hash_func() take more data (and expand qemu_xxhash7() to qemu_xxhash8()). Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- v1->v2: move the setting of the cluster index in cf_mask in tb_htable_lookup() up to before we set desc.cf_mask from it... --- include/exec/exec-all.h | 4 +++- accel/tcg/cpu-exec.c | 3 +++ accel/tcg/translate-all.c | 3 +++ 3 files changed, 9 insertions(+), 1 deletion(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 815e5b1e838..aa7b81aaf01 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -351,9 +351,11 @@ struct TranslationBlock { #define CF_USE_ICOUNT 0x00020000 #define CF_INVALID 0x00040000 /* TB is stale. Set with @jmp_lock held = */ #define CF_PARALLEL 0x00080000 /* Generate code for a parallel context = */ +#define CF_CLUSTER_MASK 0xff000000 /* Top 8 bits are cluster ID */ +#define CF_CLUSTER_SHIFT 24 /* cflags' mask for hashing/comparison */ #define CF_HASH_MASK \ - (CF_COUNT_MASK | CF_LAST_IO | CF_USE_ICOUNT | CF_PARALLEL) + (CF_COUNT_MASK | CF_LAST_IO | CF_USE_ICOUNT | CF_PARALLEL | CF_CLUSTER= _MASK) =20 /* Per-vCPU dynamic tracing state used to generate this TB */ uint32_t trace_vcpu_dstate; diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 870027d4359..6c4a33262f5 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -325,6 +325,9 @@ TranslationBlock *tb_htable_lookup(CPUState *cpu, targe= t_ulong pc, struct tb_desc desc; uint32_t h; =20 + cf_mask &=3D ~CF_CLUSTER_MASK; + cf_mask |=3D cpu->cluster_index << CF_CLUSTER_SHIFT; + desc.env =3D (CPUArchState *)cpu->env_ptr; desc.cs_base =3D cs_base; desc.flags =3D flags; diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 639f0b27287..ba27f5acc8c 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -1692,6 +1692,9 @@ TranslationBlock *tb_gen_code(CPUState *cpu, cflags |=3D CF_NOCACHE | 1; } =20 + cflags &=3D ~CF_CLUSTER_MASK; + cflags |=3D cpu->cluster_index << CF_CLUSTER_SHIFT; + buffer_overflow: tb =3D tb_alloc(pc); if (unlikely(!tb)) { --=20 2.20.1 From nobody Mon Feb 9 08:07:46 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 154746712191989.12143009410727; Mon, 14 Jan 2019 03:58:41 -0800 (PST) Received: from localhost ([127.0.0.1]:57929 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gj0t6-0007eH-Rp for importer@patchew.org; Mon, 14 Jan 2019 06:58:40 -0500 Received: from eggs.gnu.org ([209.51.188.92]:47208) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gj0rI-0006YB-MA for qemu-devel@nongnu.org; Mon, 14 Jan 2019 06:56:49 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gj0rH-0005sE-9R for qemu-devel@nongnu.org; Mon, 14 Jan 2019 06:56:48 -0500 Received: from mail-wr1-x441.google.com ([2a00:1450:4864:20::441]:42483) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gj0rH-0005rM-12 for qemu-devel@nongnu.org; Mon, 14 Jan 2019 06:56:47 -0500 Received: by mail-wr1-x441.google.com with SMTP id q18so22473904wrx.9 for ; Mon, 14 Jan 2019 03:56:46 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id 125sm47835842wmm.26.2019.01.14.03.56.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 14 Jan 2019 03:56:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=z6np4aEV6kepum56jAKTLhBF7tWQywONgDj9IEtWngY=; b=j/ASMQEzYA/KqX2bLdRQVPbBv5RgluLJ+2ygfaJhmGoHogIMOg4Y25Pp5MjLwO3sng 1dF+C4IF5MrWuPRCt6O/E2RRlpwIt75HmsU8ZI/Q5q5rlD1dMM4qmteBypTCLWMWncfz q/WTpTODNVY1AeHH6b+DuGEdnJoWPJtnDW/v0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=z6np4aEV6kepum56jAKTLhBF7tWQywONgDj9IEtWngY=; b=AMtzHWL/JeTj6Nibi+hfyssFWFhpBebtMqC1eIWhbG3SqqdC5LG1QhOIB9uye76ImB FZFUZgQYXpYczwyD8d8JAWj0iFppzytJTgd0hAFsAI+SRaUQwH6RWsq53x1VgtzcR9XM 3aOGHx4OGifJTGIgszEFL0puYl2g/pmDG+a5Ob+v6WhN34lRgL6j1j65PAa7564i83y0 km/0D2LuFzk/U/MEzyOfxW95yVnfzFuB3RL29+7sS2hLc1SffUe1tQLVWlO6WxylNwdi FLXN+qAJ2YMW0vSrfM8xQ+A/JjXr1eVIADP50dlHA7BCWTQty8Q/A1Ri49vq62nScn7g fWcg== X-Gm-Message-State: AJcUukc0E8hRol9LEyLIrF2+OXAUwOQm0Vxub5duNlpkpkdt5tHiIaVh IJHVspuNX1d2cbCgpTA0bsZGsX14SY2Kwg== X-Google-Smtp-Source: ALg8bN7FRXqygkdsb5DMj9eJUCkVMcFU6raPLzB30OfqlPW4C5AYqetc2FBjnqzwv604MIrWkfBTBw== X-Received: by 2002:adf:8464:: with SMTP id 91mr25199030wrf.251.1547467006185; Mon, 14 Jan 2019 03:56:46 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Mon, 14 Jan 2019 11:56:37 +0000 Message-Id: <20190114115637.6335-5-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190114115637.6335-1-peter.maydell@linaro.org> References: <20190114115637.6335-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::441 Subject: [Qemu-devel] [PATCH v2 4/4] gdbstub: Simplify gdb_get_cpu_pid() to use cpu->cluster_index X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , Peter Crosthwaite , Alistair Francis , Richard Henderson , "Emilio G . Cota" , "Edgar E. Iglesias" , Paolo Bonzini , Aleksandar Markovic Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Now we're keeping the cluster index in the CPUState, we don't need to jump through hoops in gdb_get_cpu_pid() to find the associated cluster object. Signed-off-by: Peter Maydell Reviewed-by: Luc Michel --- gdbstub.c | 48 +++++------------------------------------------- 1 file changed, 5 insertions(+), 43 deletions(-) diff --git a/gdbstub.c b/gdbstub.c index bfc7afb5096..5d6cbea9d35 100644 --- a/gdbstub.c +++ b/gdbstub.c @@ -644,50 +644,12 @@ static int memtox(char *buf, const char *mem, int len) =20 static uint32_t gdb_get_cpu_pid(const GDBState *s, CPUState *cpu) { -#ifndef CONFIG_USER_ONLY - gchar *path, *name =3D NULL; - Object *obj; - CPUClusterState *cluster; - uint32_t ret; - - path =3D object_get_canonical_path(OBJECT(cpu)); - - if (path =3D=3D NULL) { - /* Return the default process' PID */ - ret =3D s->processes[s->process_num - 1].pid; - goto out; - } - - name =3D object_get_canonical_path_component(OBJECT(cpu)); - assert(name !=3D NULL); - - /* - * Retrieve the CPU parent path by removing the last '/' and the CPU n= ame - * from the CPU canonical path. - */ - path[strlen(path) - strlen(name) - 1] =3D '\0'; - - obj =3D object_resolve_path_type(path, TYPE_CPU_CLUSTER, NULL); - - if (obj =3D=3D NULL) { - /* Return the default process' PID */ - ret =3D s->processes[s->process_num - 1].pid; - goto out; - } - - cluster =3D CPU_CLUSTER(obj); - ret =3D cluster->cluster_id + 1; - -out: - g_free(name); - g_free(path); - - return ret; - -#else /* TODO: In user mode, we should use the task state PID */ - return s->processes[s->process_num - 1].pid; -#endif + if (cpu->cluster_index =3D=3D UNASSIGNED_CLUSTER_INDEX) { + /* Return the default process' PID */ + return s->processes[s->process_num - 1].pid; + } + return cpu->cluster_index + 1; } =20 static GDBProcess *gdb_get_process(const GDBState *s, uint32_t pid) --=20 2.20.1