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[2001:470:27:1fa::2]) by smtp.gmail.com with ESMTPSA id g17sm16181570lfg.78.2019.01.13.23.49.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 13 Jan 2019 23:49:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=7o2+rPl5Z70qU5QXfhteUVbbnuxK3zpYF6FYfiInFgk=; b=ph2d3zTxeKuRzgyBHEf+IcOI2UJ1OK3XkmN/gsFV13ZJnEcFvy4bmpv7fhJQhQUulN 5xOVYbcFqzb+1XAQq8QtP1oGmV+Wig5uARNodRis+OsMVHNB4Y8BrlkoEymJjh0ytmJz /19loMbJvcsv1LpX9rrE1Ty6xWGgqI46bZI0X7WW8ZDXPK+vSPhAz+7/rD06r38e6iGg Iw84kdd+ugYY0x/6xdR+VxtLSNyd8rWK7gBma88f3ZKERIMBZ1MX8AAWpPE4qu6qYyta 22q2jk3l214P13hdboGtrPzQ/0jLvh0HIq4p8ZdgoFROuZhbDbtEPYoiWmgDF0rmoVXC 4vDQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=7o2+rPl5Z70qU5QXfhteUVbbnuxK3zpYF6FYfiInFgk=; b=aeWxMqYGa8QITU+I0OOtD6KLtet3a1GMcxI+FNxIS0j02kLcBbwnDhUmwLk/quXkir ZbZCrfmtX5LzBsPItbsCBMPZVtw7m+nXZS7bzvI7Fb9BMm0gZePejGh0kjUEiZq9d4ps aFsVUi3M5O9DLbE411LrtwhM14/axKK54oDgSSCC7nhGkT5YejvILSDvlpo+Qy84R5OK 7vKevJSZsueuXPMEDcHA7ucDXH4um/6xCTMfTbyGxyy6yGlJMPEAMmX1X01oZOUn18lP tCAvc0O7wZs+bRHhN7XITvpEnduyl5N8aOB0+FVvWHFQQrNGhNQ2mTeQHQYIgxRG8d7a k49w== X-Gm-Message-State: AJcUukeBIQ4DhRG+7W0bQ4rIi6hcG3cYepNzMHfSuJXEzc8h1Oi4bTmk 9sKEDhRq5nWPG98Mkpv6gtoScEHpJLM= X-Google-Smtp-Source: ALg8bN6mOsVQB/8/X/b0ZpTI4Rvh1OjVumzMkhVNY0f3rBMt7QXM8T/e1Kv7hQc0izmivXDqQrsp1g== X-Received: by 2002:a19:d04d:: with SMTP id h74mr12108378lfg.52.1547452166895; Sun, 13 Jan 2019 23:49:26 -0800 (PST) From: Max Filippov To: qemu-devel@nongnu.org Date: Sun, 13 Jan 2019 23:48:52 -0800 Message-Id: <20190114074855.16891-5-jcmvbkbc@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190114074855.16891-1-jcmvbkbc@gmail.com> References: <20190114074855.16891-1-jcmvbkbc@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::12c Subject: [Qemu-devel] [PATCH 4/7] target/xtensa: extract debug helpers X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Max Filippov Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Move HELPER functions related to native debugging from op_helper.c to dbg_helper.c. No functional changes. Signed-off-by: Max Filippov --- target/xtensa/Makefile.objs | 1 + target/xtensa/dbg_helper.c | 129 ++++++++++++++++++++++++++++++++++++++++= ++++ target/xtensa/op_helper.c | 92 ------------------------------- 3 files changed, 130 insertions(+), 92 deletions(-) create mode 100644 target/xtensa/dbg_helper.c diff --git a/target/xtensa/Makefile.objs b/target/xtensa/Makefile.objs index b2c720b2df9b..cfd33ba1d951 100644 --- a/target/xtensa/Makefile.objs +++ b/target/xtensa/Makefile.objs @@ -7,6 +7,7 @@ obj-y +=3D core-test_kc705_be.o obj-$(CONFIG_SOFTMMU) +=3D monitor.o xtensa-semi.o obj-y +=3D xtensa-isa.o obj-y +=3D translate.o op_helper.o helper.o cpu.o +obj-$(CONFIG_SOFTMMU) +=3D dbg_helper.o obj-y +=3D fpu_helper.o obj-y +=3D gdbstub.o obj-$(CONFIG_SOFTMMU) +=3D mmu_helper.o diff --git a/target/xtensa/dbg_helper.c b/target/xtensa/dbg_helper.c new file mode 100644 index 000000000000..cd8fbd653a1a --- /dev/null +++ b/target/xtensa/dbg_helper.c @@ -0,0 +1,129 @@ +/* + * Copyright (c) 2011 - 2019, Max Filippov, Open Source and Linux Lab. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are = met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in t= he + * documentation and/or other materials provided with the distributi= on. + * * Neither the name of the Open Source and Linux Lab nor the + * names of its contributors may be used to endorse or promote produ= cts + * derived from this software without specific prior written permiss= ion. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS= IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, T= HE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP= OSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMA= GES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERV= ICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED= AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR T= ORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE O= F THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "qemu/osdep.h" +#include "qemu/main-loop.h" +#include "cpu.h" +#include "exec/helper-proto.h" +#include "qemu/host-utils.h" +#include "exec/exec-all.h" +#include "exec/address-spaces.h" + +static void tb_invalidate_virtual_addr(CPUXtensaState *env, uint32_t vaddr) +{ + uint32_t paddr; + uint32_t page_size; + unsigned access; + int ret =3D xtensa_get_physical_addr(env, false, vaddr, 2, 0, + &paddr, &page_size, &access); + if (ret =3D=3D 0) { + tb_invalidate_phys_addr(&address_space_memory, paddr, + MEMTXATTRS_UNSPECIFIED); + } +} + +void HELPER(wsr_ibreakenable)(CPUXtensaState *env, uint32_t v) +{ + uint32_t change =3D v ^ env->sregs[IBREAKENABLE]; + unsigned i; + + for (i =3D 0; i < env->config->nibreak; ++i) { + if (change & (1 << i)) { + tb_invalidate_virtual_addr(env, env->sregs[IBREAKA + i]); + } + } + env->sregs[IBREAKENABLE] =3D v & ((1 << env->config->nibreak) - 1); +} + +void HELPER(wsr_ibreaka)(CPUXtensaState *env, uint32_t i, uint32_t v) +{ + if (env->sregs[IBREAKENABLE] & (1 << i) && env->sregs[IBREAKA + i] != =3D v) { + tb_invalidate_virtual_addr(env, env->sregs[IBREAKA + i]); + tb_invalidate_virtual_addr(env, v); + } + env->sregs[IBREAKA + i] =3D v; +} + +static void set_dbreak(CPUXtensaState *env, unsigned i, uint32_t dbreaka, + uint32_t dbreakc) +{ + CPUState *cs =3D CPU(xtensa_env_get_cpu(env)); + int flags =3D BP_CPU | BP_STOP_BEFORE_ACCESS; + uint32_t mask =3D dbreakc | ~DBREAKC_MASK; + + if (env->cpu_watchpoint[i]) { + cpu_watchpoint_remove_by_ref(cs, env->cpu_watchpoint[i]); + } + if (dbreakc & DBREAKC_SB) { + flags |=3D BP_MEM_WRITE; + } + if (dbreakc & DBREAKC_LB) { + flags |=3D BP_MEM_READ; + } + /* contiguous mask after inversion is one less than some power of 2 */ + if ((~mask + 1) & ~mask) { + qemu_log_mask(LOG_GUEST_ERROR, + "DBREAKC mask is not contiguous: 0x%08x\n", dbreakc); + /* cut mask after the first zero bit */ + mask =3D 0xffffffff << (32 - clo32(mask)); + } + if (cpu_watchpoint_insert(cs, dbreaka & mask, ~mask + 1, + flags, &env->cpu_watchpoint[i])) { + env->cpu_watchpoint[i] =3D NULL; + qemu_log_mask(LOG_GUEST_ERROR, + "Failed to set data breakpoint at 0x%08x/%d\n", + dbreaka & mask, ~mask + 1); + } +} + +void HELPER(wsr_dbreaka)(CPUXtensaState *env, uint32_t i, uint32_t v) +{ + uint32_t dbreakc =3D env->sregs[DBREAKC + i]; + + if ((dbreakc & DBREAKC_SB_LB) && + env->sregs[DBREAKA + i] !=3D v) { + set_dbreak(env, i, v, dbreakc); + } + env->sregs[DBREAKA + i] =3D v; +} + +void HELPER(wsr_dbreakc)(CPUXtensaState *env, uint32_t i, uint32_t v) +{ + if ((env->sregs[DBREAKC + i] ^ v) & (DBREAKC_SB_LB | DBREAKC_MASK)) { + if (v & DBREAKC_SB_LB) { + set_dbreak(env, i, env->sregs[DBREAKA + i], v); + } else { + if (env->cpu_watchpoint[i]) { + CPUState *cs =3D CPU(xtensa_env_get_cpu(env)); + + cpu_watchpoint_remove_by_ref(cs, env->cpu_watchpoint[i]); + env->cpu_watchpoint[i] =3D NULL; + } + } + } + env->sregs[DBREAKC + i] =3D v; +} diff --git a/target/xtensa/op_helper.c b/target/xtensa/op_helper.c index 1d3d87012c4a..e13e686479db 100644 --- a/target/xtensa/op_helper.c +++ b/target/xtensa/op_helper.c @@ -93,19 +93,6 @@ void xtensa_cpu_do_transaction_failed(CPUState *cs, hwad= dr physaddr, vaddr addr, addr); } =20 -static void tb_invalidate_virtual_addr(CPUXtensaState *env, uint32_t vaddr) -{ - uint32_t paddr; - uint32_t page_size; - unsigned access; - int ret =3D xtensa_get_physical_addr(env, false, vaddr, 2, 0, - &paddr, &page_size, &access); - if (ret =3D=3D 0) { - tb_invalidate_phys_addr(&address_space_memory, paddr, - MEMTXATTRS_UNSPECIFIED); - } -} - #endif =20 void HELPER(exception)(CPUXtensaState *env, uint32_t excp) @@ -325,85 +312,6 @@ void HELPER(wsr_memctl)(CPUXtensaState *env, uint32_t = v) env->sregs[MEMCTL] =3D v & env->config->memctl_mask; } =20 -void HELPER(wsr_ibreakenable)(CPUXtensaState *env, uint32_t v) -{ - uint32_t change =3D v ^ env->sregs[IBREAKENABLE]; - unsigned i; - - for (i =3D 0; i < env->config->nibreak; ++i) { - if (change & (1 << i)) { - tb_invalidate_virtual_addr(env, env->sregs[IBREAKA + i]); - } - } - env->sregs[IBREAKENABLE] =3D v & ((1 << env->config->nibreak) - 1); -} - -void HELPER(wsr_ibreaka)(CPUXtensaState *env, uint32_t i, uint32_t v) -{ - if (env->sregs[IBREAKENABLE] & (1 << i) && env->sregs[IBREAKA + i] != =3D v) { - tb_invalidate_virtual_addr(env, env->sregs[IBREAKA + i]); - tb_invalidate_virtual_addr(env, v); - } - env->sregs[IBREAKA + i] =3D v; -} - -static void set_dbreak(CPUXtensaState *env, unsigned i, uint32_t dbreaka, - uint32_t dbreakc) -{ - CPUState *cs =3D CPU(xtensa_env_get_cpu(env)); - int flags =3D BP_CPU | BP_STOP_BEFORE_ACCESS; - uint32_t mask =3D dbreakc | ~DBREAKC_MASK; - - if (env->cpu_watchpoint[i]) { - cpu_watchpoint_remove_by_ref(cs, env->cpu_watchpoint[i]); - } - if (dbreakc & DBREAKC_SB) { - flags |=3D BP_MEM_WRITE; - } - if (dbreakc & DBREAKC_LB) { - flags |=3D BP_MEM_READ; - } - /* contiguous mask after inversion is one less than some power of 2 */ - if ((~mask + 1) & ~mask) { - qemu_log_mask(LOG_GUEST_ERROR, "DBREAKC mask is not contiguous: 0x= %08x\n", dbreakc); - /* cut mask after the first zero bit */ - mask =3D 0xffffffff << (32 - clo32(mask)); - } - if (cpu_watchpoint_insert(cs, dbreaka & mask, ~mask + 1, - flags, &env->cpu_watchpoint[i])) { - env->cpu_watchpoint[i] =3D NULL; - qemu_log_mask(LOG_GUEST_ERROR, "Failed to set data breakpoint at 0= x%08x/%d\n", - dbreaka & mask, ~mask + 1); - } -} - -void HELPER(wsr_dbreaka)(CPUXtensaState *env, uint32_t i, uint32_t v) -{ - uint32_t dbreakc =3D env->sregs[DBREAKC + i]; - - if ((dbreakc & DBREAKC_SB_LB) && - env->sregs[DBREAKA + i] !=3D v) { - set_dbreak(env, i, v, dbreakc); - } - env->sregs[DBREAKA + i] =3D v; -} - -void HELPER(wsr_dbreakc)(CPUXtensaState *env, uint32_t i, uint32_t v) -{ - if ((env->sregs[DBREAKC + i] ^ v) & (DBREAKC_SB_LB | DBREAKC_MASK)) { - if (v & DBREAKC_SB_LB) { - set_dbreak(env, i, env->sregs[DBREAKA + i], v); - } else { - if (env->cpu_watchpoint[i]) { - CPUState *cs =3D CPU(xtensa_env_get_cpu(env)); - - cpu_watchpoint_remove_by_ref(cs, env->cpu_watchpoint[i]); - env->cpu_watchpoint[i] =3D NULL; - } - } - } - env->sregs[DBREAKC + i] =3D v; -} #endif =20 uint32_t HELPER(rer)(CPUXtensaState *env, uint32_t addr) --=20 2.11.0