From nobody Sat May 4 14:58:33 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=oracle.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1547062999491108.20793005360315; Wed, 9 Jan 2019 11:43:19 -0800 (PST) Received: from localhost ([127.0.0.1]:54712 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ghJkz-000769-Sb for importer@patchew.org; Wed, 09 Jan 2019 14:43:17 -0500 Received: from eggs.gnu.org ([209.51.188.92]:40248) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ghJjj-0006Q0-J0 for qemu-devel@nongnu.org; Wed, 09 Jan 2019 14:42:01 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ghJjh-0003OL-7S for qemu-devel@nongnu.org; Wed, 09 Jan 2019 14:41:59 -0500 Received: from userp2120.oracle.com ([156.151.31.85]:60604) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ghJjd-0003BJ-Nq for qemu-devel@nongnu.org; Wed, 09 Jan 2019 14:41:53 -0500 Received: from pps.filterd (userp2120.oracle.com [127.0.0.1]) by userp2120.oracle.com (8.16.0.22/8.16.0.22) with SMTP id x09JdONu191670; Wed, 9 Jan 2019 19:41:45 GMT Received: from userv0022.oracle.com (userv0022.oracle.com [156.151.31.74]) by userp2120.oracle.com with ESMTP id 2ptn7r36v5-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 09 Jan 2019 19:41:45 +0000 Received: from userv0122.oracle.com (userv0122.oracle.com [156.151.31.75]) by userv0022.oracle.com (8.14.4/8.14.4) with ESMTP id x09JfiQ7022707 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 9 Jan 2019 19:41:44 GMT Received: from abhmp0010.oracle.com (abhmp0010.oracle.com [141.146.116.16]) by userv0122.oracle.com (8.14.4/8.14.4) with ESMTP id x09Jfig4016284; Wed, 9 Jan 2019 19:41:44 GMT Received: from localhost.localdomain (/77.138.186.148) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Wed, 09 Jan 2019 11:41:43 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=from : to : subject : date : message-id; s=corp-2018-07-02; bh=K0sNon+ZWbBqeOTb92HGoQGLQgKzycWBn+Ha5L/vG9k=; b=OmK1+rNyO9KYafO7jniP706c+K38BcJIUKCgW5AWWD3i8ZaOZnRynae+ROa2f2BR0x2J AgUF74TgIYdXngz40cs8IV3GuHT1HtDzfR6vCI/zEBJjnHNJYwnPyD9zZ98Sr03uA4i0 85x3evLiHlCqZGFT3j5BwbLxEenhh03UCWdkKKgrzIpRbNL3bTLB0uYNnr7NvlUgBk5L nMa0B3hD8jFlspEQMrR5Wc8ZkBk4XmkAMafTxXnzoWKOLz2Y/N7D+i0l4NekpVVc4bk5 kMGXE0YPbz2FQSAPlyn6NOA+VEeFxjf26frm/3qEE5S7nROo2NZZKZ04Zekn+P2bWrjd Bg== From: Yuval Shaia To: yuval.shaia@oracle.com, marcel.apfelbaum@gmail.com, qemu-devel@nongnu.org, saaramar5@gmail.com, pjp@fedoraproject.org Date: Wed, 9 Jan 2019 21:41:23 +0200 Message-Id: <20190109194123.3468-1-yuval.shaia@oracle.com> X-Mailer: git-send-email 2.17.2 X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=9131 signatures=668680 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=2 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1901090160 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 156.151.31.85 Subject: [Qemu-devel] [PATCH] hw/pvrdma: Remove max-sge command-line param X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This parameter has no effect, fix it. The function init_dev_caps sets the front-end's max-sge to MAX_SGE. Then it checks backend's max-sge and adjust it accordingly (we can't send more than what the device supports). On send and recv we need to make sure the num_sge in the WQE does not exceeds the backend device capability. This check is done in pvrdma level so check on rdma level is deleted. Signed-off-by: Yuval Shaia Reviewed-by: Marcel Apfelbaum --- docs/pvrdma.txt | 1 - hw/rdma/rdma_backend.c | 23 ++--------------------- hw/rdma/rdma_backend.h | 11 +++++++++++ hw/rdma/vmw/pvrdma_main.c | 10 +++++----- hw/rdma/vmw/pvrdma_qp_ops.c | 24 ++++++++++++++++++++++++ 5 files changed, 42 insertions(+), 27 deletions(-) diff --git a/docs/pvrdma.txt b/docs/pvrdma.txt index 5175251b47..5973c0c68b 100644 --- a/docs/pvrdma.txt +++ b/docs/pvrdma.txt @@ -153,7 +153,6 @@ Ethernet function can be used for other Ethernet purpos= es such as IP. specify the port to use. If not set 1 will be used. - dev-caps-max-mr-size: The maximum size of MR. - dev-caps-max-qp: Maximum number of QPs. -- dev-caps-max-sge: Maximum number of SGE elements in WR. - dev-caps-max-cq: Maximum number of CQs. - dev-caps-max-mr: Maximum number of MRs. - dev-caps-max-pd: Maximum number of PDs. diff --git a/hw/rdma/rdma_backend.c b/hw/rdma/rdma_backend.c index c28bfbd44d..16dca69ee9 100644 --- a/hw/rdma/rdma_backend.c +++ b/hw/rdma/rdma_backend.c @@ -32,17 +32,6 @@ #include "rdma_rm.h" #include "rdma_backend.h" =20 -/* Vendor Errors */ -#define VENDOR_ERR_FAIL_BACKEND 0x201 -#define VENDOR_ERR_TOO_MANY_SGES 0x202 -#define VENDOR_ERR_NOMEM 0x203 -#define VENDOR_ERR_QP0 0x204 -#define VENDOR_ERR_INV_NUM_SGE 0x205 -#define VENDOR_ERR_MAD_SEND 0x206 -#define VENDOR_ERR_INVLKEY 0x207 -#define VENDOR_ERR_MR_SMALL 0x208 -#define VENDOR_ERR_INV_MAD_BUFF 0x209 - #define THR_NAME_LEN 16 #define THR_POLL_TO 5000 =20 @@ -475,11 +464,6 @@ void rdma_backend_post_send(RdmaBackendDev *backend_de= v, } =20 pr_dbg("num_sge=3D%d\n", num_sge); - if (!num_sge || num_sge > MAX_SGE) { - pr_dbg("invalid num_sge=3D%d\n", num_sge); - complete_work(IBV_WC_GENERAL_ERR, VENDOR_ERR_INV_NUM_SGE, ctx); - return; - } =20 bctx =3D g_malloc0(sizeof(*bctx)); bctx->up_ctx =3D ctx; @@ -602,11 +586,6 @@ void rdma_backend_post_recv(RdmaBackendDev *backend_de= v, } =20 pr_dbg("num_sge=3D%d\n", num_sge); - if (!num_sge || num_sge > MAX_SGE) { - pr_dbg("invalid num_sge=3D%d\n", num_sge); - complete_work(IBV_WC_GENERAL_ERR, VENDOR_ERR_INV_NUM_SGE, ctx); - return; - } =20 bctx =3D g_malloc0(sizeof(*bctx)); bctx->up_ctx =3D ctx; @@ -942,6 +921,8 @@ static int init_device_caps(RdmaBackendDev *backend_dev, return -EIO; } =20 + dev_attr->max_sge =3D MAX_SGE; + CHK_ATTR(dev_attr, backend_dev->dev_attr, max_mr_size, "%" PRId64); CHK_ATTR(dev_attr, backend_dev->dev_attr, max_qp, "%d"); CHK_ATTR(dev_attr, backend_dev->dev_attr, max_sge, "%d"); diff --git a/hw/rdma/rdma_backend.h b/hw/rdma/rdma_backend.h index 8cae40f827..a9ba40ae48 100644 --- a/hw/rdma/rdma_backend.h +++ b/hw/rdma/rdma_backend.h @@ -22,6 +22,17 @@ #include "rdma_rm_defs.h" #include "rdma_backend_defs.h" =20 +/* Vendor Errors */ +#define VENDOR_ERR_FAIL_BACKEND 0x201 +#define VENDOR_ERR_TOO_MANY_SGES 0x202 +#define VENDOR_ERR_NOMEM 0x203 +#define VENDOR_ERR_QP0 0x204 +#define VENDOR_ERR_INV_NUM_SGE 0x205 +#define VENDOR_ERR_MAD_SEND 0x206 +#define VENDOR_ERR_INVLKEY 0x207 +#define VENDOR_ERR_MR_SMALL 0x208 +#define VENDOR_ERR_INV_MAD_BUFF 0x209 + /* Add definition for QP0 and QP1 as there is no userspace enums for them = */ enum ibv_special_qp_type { IBV_QPT_SMI =3D 0, diff --git a/hw/rdma/vmw/pvrdma_main.c b/hw/rdma/vmw/pvrdma_main.c index 838ad8a949..d2bdb5ba8c 100644 --- a/hw/rdma/vmw/pvrdma_main.c +++ b/hw/rdma/vmw/pvrdma_main.c @@ -43,7 +43,6 @@ static Property pvrdma_dev_properties[] =3D { DEFINE_PROP_UINT64("dev-caps-max-mr-size", PVRDMADev, dev_attr.max_mr_= size, MAX_MR_SIZE), DEFINE_PROP_INT32("dev-caps-max-qp", PVRDMADev, dev_attr.max_qp, MAX_Q= P), - DEFINE_PROP_INT32("dev-caps-max-sge", PVRDMADev, dev_attr.max_sge, MAX= _SGE), DEFINE_PROP_INT32("dev-caps-max-cq", PVRDMADev, dev_attr.max_cq, MAX_C= Q), DEFINE_PROP_INT32("dev-caps-max-mr", PVRDMADev, dev_attr.max_mr, MAX_M= R), DEFINE_PROP_INT32("dev-caps-max-pd", PVRDMADev, dev_attr.max_pd, MAX_P= D), @@ -549,8 +548,9 @@ static void init_dev_caps(PVRDMADev *dev) sizeof(struct pvrdma_rq_wqe_hdr)); =20 dev->dev_attr.max_qp_wr =3D pg_tbl_bytes / - (wr_sz + sizeof(struct pvrdma_sge) * MAX_SGE= ) - - TARGET_PAGE_SIZE; /* First page is ring stat= e */ + (wr_sz + sizeof(struct pvrdma_sge) * + dev->dev_attr.max_sge) - TARGET_PAGE_SIZE; + /* First page is ring state ^^^^ */ pr_dbg("max_qp_wr=3D%d\n", dev->dev_attr.max_qp_wr); =20 dev->dev_attr.max_cqe =3D pg_tbl_bytes / sizeof(struct pvrdma_cqe) - @@ -626,8 +626,6 @@ static void pvrdma_realize(PCIDevice *pdev, Error **err= p) =20 init_regs(pdev); =20 - init_dev_caps(dev); - rc =3D init_msix(pdev, errp); if (rc) { goto out; @@ -640,6 +638,8 @@ static void pvrdma_realize(PCIDevice *pdev, Error **err= p) goto out; } =20 + init_dev_caps(dev); + rc =3D rdma_rm_init(&dev->rdma_dev_res, &dev->dev_attr, errp); if (rc) { goto out; diff --git a/hw/rdma/vmw/pvrdma_qp_ops.c b/hw/rdma/vmw/pvrdma_qp_ops.c index 300471a4c9..465bee8641 100644 --- a/hw/rdma/vmw/pvrdma_qp_ops.c +++ b/hw/rdma/vmw/pvrdma_qp_ops.c @@ -121,6 +121,16 @@ static void pvrdma_qp_ops_comp_handler(void *ctx, stru= ct ibv_wc *wc) g_free(ctx); } =20 +static void complete_with_error(uint32_t vendor_err, void *ctx) +{ + struct ibv_wc wc =3D {0}; + + wc.status =3D IBV_WC_GENERAL_ERR; + wc.vendor_err =3D vendor_err; + + pvrdma_qp_ops_comp_handler(ctx, &wc); +} + void pvrdma_qp_ops_fini(void) { rdma_backend_unregister_comp_handler(); @@ -182,6 +192,13 @@ int pvrdma_qp_send(PVRDMADev *dev, uint32_t qp_handle) return -EIO; } =20 + if (wqe->hdr.num_sge > dev->dev_attr.max_sge) { + pr_dbg("Invalid num_sge=3D%d (max %d)\n", wqe->hdr.num_sge, + dev->dev_attr.max_sge); + complete_with_error(VENDOR_ERR_INV_NUM_SGE, comp_ctx); + continue; + } + rdma_backend_post_send(&dev->backend_dev, &qp->backend_qp, qp->qp_= type, (struct ibv_sge *)&wqe->sge[0], wqe->hdr.nu= m_sge, sgid_idx, sgid, @@ -227,6 +244,13 @@ int pvrdma_qp_recv(PVRDMADev *dev, uint32_t qp_handle) comp_ctx->cqe.qp =3D qp_handle; comp_ctx->cqe.opcode =3D IBV_WC_RECV; =20 + if (wqe->hdr.num_sge > dev->dev_attr.max_sge) { + pr_dbg("Invalid num_sge=3D%d (max %d)\n", wqe->hdr.num_sge, + dev->dev_attr.max_sge); + complete_with_error(VENDOR_ERR_INV_NUM_SGE, comp_ctx); + continue; + } + rdma_backend_post_recv(&dev->backend_dev, &dev->rdma_dev_res, &qp->backend_qp, qp->qp_type, (struct ibv_sge *)&wqe->sge[0], wqe->hdr.nu= m_sge, --=20 2.17.2