From nobody Tue Feb 10 00:27:27 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1546989722619204.86568171625981; Tue, 8 Jan 2019 15:22:02 -0800 (PST) Received: from localhost ([127.0.0.1]:52566 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gh0h6-00005E-LP for importer@patchew.org; Tue, 08 Jan 2019 18:22:00 -0500 Received: from eggs.gnu.org ([209.51.188.92]:58840) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gh09s-00074W-1x for qemu-devel@nongnu.org; Tue, 08 Jan 2019 17:47:41 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gh09r-0007lb-0f for qemu-devel@nongnu.org; Tue, 08 Jan 2019 17:47:39 -0500 Received: from ozlabs.org ([2401:3900:2:1::2]:55483) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gh09q-00079g-Fs; Tue, 08 Jan 2019 17:47:38 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 43Z6n12jkKz9sPd; Wed, 9 Jan 2019 09:46:10 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1546987573; bh=2yjlK/pIz4Ga5/g+oCr56/Ft9mJZ5frMjEF2dY+Fmrw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=G5NXK2nOrMVWednblEuz8oBG8SOdztrXGvPOW9xKda6fcDIQ97KDqfTvoZKytLn8H X3uh3KH/H6Y2Tu8sXmyy2tkQPz/Q645IevAZFsI2f7YpqleuN/7OeEsIiDhDMPUQrs 0u8216GkjthNiOCCwpZtQfw1sF1yCwgegTs1fKEc= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 9 Jan 2019 09:45:56 +1100 Message-Id: <20190108224600.23125-26-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190108224600.23125-1-david@gibson.dropbear.id.au> References: <20190108224600.23125-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 25/29] pnv/psi: move the ICSState qemu_irq array under the PSI device model X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, David Gibson , qemu-ppc@nongnu.org, groug@kaod.org, clg@kaod.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" From: C=C3=A9dric Le Goater Future changes of the ICSState object will remove the qemu_irq array from under the interrupt controller model. Prepare ground for the PSI interrupt sources and introduce a new one directly under the PSI device model. Signed-off-by: C=C3=A9dric Le Goater Signed-off-by: David Gibson --- hw/ppc/pnv_psi.c | 7 ++++--- include/hw/ppc/pnv_psi.h | 1 + 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c index 5b969127c3..8ced095063 100644 --- a/hw/ppc/pnv_psi.c +++ b/hw/ppc/pnv_psi.c @@ -207,7 +207,6 @@ static const uint64_t stat_bits[] =3D { =20 void pnv_psi_irq_set(PnvPsi *psi, PnvPsiIrq irq, bool state) { - ICSState *ics =3D &psi->ics; uint32_t xivr_reg; uint32_t stat_reg; uint32_t src; @@ -227,14 +226,14 @@ void pnv_psi_irq_set(PnvPsi *psi, PnvPsiIrq irq, bool= state) /* TODO: optimization, check mask here. That means * re-evaluating when unmasking */ - qemu_irq_raise(ics->qirqs[src]); + qemu_irq_raise(psi->qirqs[src]); } else { psi->regs[stat_reg] &=3D ~stat_bits[irq]; =20 /* FSP and PSI are muxed so don't lower if either is still set */ if (stat_reg !=3D PSIHB_XSCOM_CR || !(psi->regs[stat_reg] & (PSIHB_CR_PSI_IRQ | PSIHB_CR_FSP_IRQ))= ) { - qemu_irq_lower(ics->qirqs[src]); + qemu_irq_lower(psi->qirqs[src]); } else { state =3D true; } @@ -491,6 +490,8 @@ static void pnv_psi_realize(DeviceState *dev, Error **e= rrp) ics_set_irq_type(ics, i, true); } =20 + psi->qirqs =3D qemu_allocate_irqs(ics_simple_set_irq, ics, ics->nr_irq= s); + /* XSCOM region for PSI registers */ pnv_xscom_region_init(&psi->xscom_regs, OBJECT(dev), &pnv_psi_xscom_op= s, psi, "xscom-psi", PNV_XSCOM_PSIHB_SIZE); diff --git a/include/hw/ppc/pnv_psi.h b/include/hw/ppc/pnv_psi.h index f6af5eae1f..64ac73512e 100644 --- a/include/hw/ppc/pnv_psi.h +++ b/include/hw/ppc/pnv_psi.h @@ -40,6 +40,7 @@ typedef struct PnvPsi { =20 /* Interrupt generation */ ICSState ics; + qemu_irq *qirqs; =20 /* Registers */ uint64_t regs[PSIHB_XSCOM_MAX]; --=20 2.20.1