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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id x81sm11278839wmg.17.2019.01.08.08.30.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 08 Jan 2019 08:30:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=46ldnkoBNzwTQapSHqF1F5MiDCIH8/mF+o2srm542zA=; b=WaPUYokY5ErXyR7LdmjSESE3txFpKVAfb+jQ2XV7N7W9M0t5rQM1VHbbGd/DxJFHvy c2KlgQw3cYVn9DyvHT7AywpuGKLR5PYDtJM94fqzpk0NjQkrjJJpr5qmU2htXgy+QrRF bkSrPYTJhcV5FTnceKH76MBklxcmTejTqEW/w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=46ldnkoBNzwTQapSHqF1F5MiDCIH8/mF+o2srm542zA=; b=IN4xe1vEVKKwHa9zjzCgaTkI+nv7ib6EK7AMz8mpdIznqk918P7HMUqe33fO3D9bA/ GaXD7HPHuczpWWix4L32loZxTjuBAP/Z1HDLZCOFUvdsKiTvom1ES2+ko1gQ6s1TKqCE Ha8E9RzKnT41LyxJtwBYfQtAdNFX09mGHGD1OQrDKYcfYApKLNZRpNt2vhmqWDumRNaE 6qLkUfaOz7sAchiD/f+MT+5BstOQnRQDdVOdyAYPh5aVabsVfKC0geCEIJfX1hG9pMZp J3SORPWZpGnjKdreBosTy5awkylO8O1NR3oEjO1xmX6jS0VAupqYs2Ek+Si3pDblRlkK eMFA== X-Gm-Message-State: AJcUukfhPQ26yekWuL2Fncnrnrd58akVKmNYzQSGOm5vuNYUukIbc9Sd a3mJOEMR39Gtgt1snpf1uI/FJw== X-Google-Smtp-Source: ALg8bN74tF166Sq83/2IFptmgmnhGHhKb5TkeuvcFr88Irmh4Gm1DF4/Z21hHUYjWUDU4S1tNkBB9A== X-Received: by 2002:a1c:1b8d:: with SMTP id b135mr2312163wmb.115.1546965015380; Tue, 08 Jan 2019 08:30:15 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Tue, 8 Jan 2019 16:30:07 +0000 Message-Id: <20190108163008.7006-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20190108163008.7006-1-peter.maydell@linaro.org> References: <20190108163008.7006-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::344 Subject: [Qemu-devel] [PATCH 3/4] accel/tcg: Add cluster number to TCG TB hash X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , Peter Crosthwaite , Alistair Francis , Richard Henderson , "Emilio G . Cota" , patches@linaro.org, "Edgar E. Iglesias" , Paolo Bonzini Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Include the cluster number in the hash we use to look up TBs. This is important because a TB that is valid for one cluster at a given physical address and set of CPU flags is not necessarily valid for another: the two clusters may have different views of physical memory, or may have different CPU features (eg FPU present or absent). We put the cluster number in the high 8 bits of the TB cflags. This gives us up to 256 clusters, which should be enough for anybody. If we ever need more, or need more bits in cflags for other purposes, we could make tb_hash_func() take more data (and expand qemu_xxhash7() to qemu_xxhash8()). Signed-off-by: Peter Maydell --- include/exec/exec-all.h | 4 +++- accel/tcg/cpu-exec.c | 4 ++++ accel/tcg/translate-all.c | 3 +++ 3 files changed, 10 insertions(+), 1 deletion(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 815e5b1e838..aa7b81aaf01 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -351,9 +351,11 @@ struct TranslationBlock { #define CF_USE_ICOUNT 0x00020000 #define CF_INVALID 0x00040000 /* TB is stale. Set with @jmp_lock held = */ #define CF_PARALLEL 0x00080000 /* Generate code for a parallel context = */ +#define CF_CLUSTER_MASK 0xff000000 /* Top 8 bits are cluster ID */ +#define CF_CLUSTER_SHIFT 24 /* cflags' mask for hashing/comparison */ #define CF_HASH_MASK \ - (CF_COUNT_MASK | CF_LAST_IO | CF_USE_ICOUNT | CF_PARALLEL) + (CF_COUNT_MASK | CF_LAST_IO | CF_USE_ICOUNT | CF_PARALLEL | CF_CLUSTER= _MASK) =20 /* Per-vCPU dynamic tracing state used to generate this TB */ uint32_t trace_vcpu_dstate; diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 870027d4359..e578a1a3aee 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -336,6 +336,10 @@ TranslationBlock *tb_htable_lookup(CPUState *cpu, targ= et_ulong pc, return NULL; } desc.phys_page1 =3D phys_pc & TARGET_PAGE_MASK; + + cf_mask &=3D ~CF_CLUSTER_MASK; + cf_mask |=3D cpu->cluster_index << CF_CLUSTER_SHIFT; + h =3D tb_hash_func(phys_pc, pc, flags, cf_mask, *cpu->trace_dstate); return qht_lookup_custom(&tb_ctx.htable, &desc, h, tb_lookup_cmp); } diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 639f0b27287..ba27f5acc8c 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -1692,6 +1692,9 @@ TranslationBlock *tb_gen_code(CPUState *cpu, cflags |=3D CF_NOCACHE | 1; } =20 + cflags &=3D ~CF_CLUSTER_MASK; + cflags |=3D cpu->cluster_index << CF_CLUSTER_SHIFT; + buffer_overflow: tb =3D tb_alloc(pc); if (unlikely(!tb)) { --=20 2.19.2