From nobody Wed May 7 11:08:35 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: <qemu-devel-bounces+importer=patchew.org@nongnu.org> Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 1546880067278947.328746092431; Mon, 7 Jan 2019 08:54:27 -0800 (PST) Received: from localhost ([127.0.0.1]:47676 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from <qemu-devel-bounces+importer=patchew.org@nongnu.org>) id 1ggYAI-0005al-Cl for importer@patchew.org; Mon, 07 Jan 2019 11:54:14 -0500 Received: from eggs.gnu.org ([209.51.188.92]:46855) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from <peter.maydell@linaro.org>) id 1ggXpZ-0005qk-3g for qemu-devel@nongnu.org; Mon, 07 Jan 2019 11:32:49 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from <peter.maydell@linaro.org>) id 1ggXpV-0003QV-Vt for qemu-devel@nongnu.org; Mon, 07 Jan 2019 11:32:47 -0500 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]:52185) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from <peter.maydell@linaro.org>) id 1ggXpV-0002Vp-Ng for qemu-devel@nongnu.org; Mon, 07 Jan 2019 11:32:45 -0500 Received: by mail-wm1-x32f.google.com with SMTP id b11so1467332wmj.1 for <qemu-devel@nongnu.org>; Mon, 07 Jan 2019 08:32:03 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id j14sm46039759wrv.96.2019.01.07.08.32.01 for <qemu-devel@nongnu.org> (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 07 Jan 2019 08:32:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=4hneVY5bvDrk+gY/Cf1fDIxMbZ+fK4EQN84PywEKNfg=; b=bDwTanHiTO91EhSbmndRgY/mlaIuLOlFRNNGG/GJ/CfmzF7SqTkCML7B3MZsUtjLTe WY4HedlIdsFjArNxtzmDAYIOjYw4iV7bC0pid6ikm2uK4JdA7qdxFLCpHOf7e8oJY4dH pHJ7trxdZY+mpP70duGPPJVUJDiqR7lNk+OhY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=4hneVY5bvDrk+gY/Cf1fDIxMbZ+fK4EQN84PywEKNfg=; b=Iy5RGw4o6ZsArVod33H1qQZCuIh5SsRHJivryKXZCUBAjab/e1Ug3c/IXfFsUu0Ndh etuw21J7JeAZv8GOUer5GjXcsT9lBW9skLiP8R4VSZOWKN6l35sqsdDAdbAg1qa+IqNh CJVdB3L3/CARgKnYCGiqhTNk189yOgS7nDXd01fN7StLBJ8SxcwwIXXinpOAtHG2WpgN 17lhp9X+XuntDPo8Csmdm3irq6bDu0caQ973sgDPXBdtmbA3I6eSYvTDnvgbGcvJveni TFzr4ZTWdlQpvSIvLHZe9grMavuV/hA0WBdU+N0JBK4JwxUB7yGYMGhgZrmTD2gvIrDq GGeA== X-Gm-Message-State: AJcUukdMOM571Gte310M+q8PWHgy22udnhElaIhwul5LyMiWIeaTUSFt JF2QdQiruDgobnmCly/Ek0jY6exrVvrakQ== X-Google-Smtp-Source: ALg8bN5QL7OYBxUo5HdFipMNhiZu5dL1qihbOqCgvLguaozX/7YwoMuWkXu03dlXbhPBbL33GEoCBw== X-Received: by 2002:a1c:f319:: with SMTP id q25mr9446718wmq.151.1546878722571; Mon, 07 Jan 2019 08:32:02 -0800 (PST) From: Peter Maydell <peter.maydell@linaro.org> To: qemu-devel@nongnu.org Date: Mon, 7 Jan 2019 16:31:14 +0000 Message-Id: <20190107163117.16269-35-peter.maydell@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20190107163117.16269-1-peter.maydell@linaro.org> References: <20190107163117.16269-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32f Subject: [Qemu-devel] [PULL 34/37] arm: Add Clock peripheral stub to NRF51 SOC X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel/> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+importer=patchew.org@nongnu.org> X-ZohoMail-DKIM: fail (Header signature does not verify) From: Steffen G=C3=B6rtz <contrib@steffen-goertz.de> This stubs enables the microbit-micropython firmware to run on the microbit machine. Signed-off-by: Steffen G=C3=B6rtz <contrib@steffen-goertz.de> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 20190103091119.9367-12-stefanha@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- include/hw/arm/nrf51_soc.h | 1 + hw/arm/nrf51_soc.c | 26 ++++++++++++++++++++++++++ 2 files changed, 27 insertions(+) diff --git a/include/hw/arm/nrf51_soc.h b/include/hw/arm/nrf51_soc.h index 39e613e1c97..e06f0304b48 100644 --- a/include/hw/arm/nrf51_soc.h +++ b/include/hw/arm/nrf51_soc.h @@ -38,6 +38,7 @@ typedef struct NRF51State { MemoryRegion iomem; MemoryRegion sram; MemoryRegion flash; + MemoryRegion clock; =20 uint32_t sram_size; uint32_t flash_size; diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c index ef70bd62fa4..1630c275940 100644 --- a/hw/arm/nrf51_soc.c +++ b/hw/arm/nrf51_soc.c @@ -34,6 +34,26 @@ =20 #define BASE_TO_IRQ(base) ((base >> 12) & 0x1F) =20 +static uint64_t clock_read(void *opaque, hwaddr addr, unsigned int size) +{ + qemu_log_mask(LOG_UNIMP, "%s: 0x%" HWADDR_PRIx " [%u]\n", + __func__, addr, size); + return 1; +} + +static void clock_write(void *opaque, hwaddr addr, uint64_t data, + unsigned int size) +{ + qemu_log_mask(LOG_UNIMP, "%s: 0x%" HWADDR_PRIx " <- 0x%" PRIx64 " [%u]= \n", + __func__, addr, data, size); +} + +static const MemoryRegionOps clock_ops =3D { + .read =3D clock_read, + .write =3D clock_write +}; + + static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp) { NRF51State *s =3D NRF51_SOC(dev_soc); @@ -130,6 +150,12 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Er= ror **errp) BASE_TO_IRQ(base_addr))); } =20 + /* STUB Peripherals */ + memory_region_init_io(&s->clock, NULL, &clock_ops, NULL, + "nrf51_soc.clock", 0x1000); + memory_region_add_subregion_overlap(&s->container, + NRF51_IOMEM_BASE, &s->clock, -1); + create_unimplemented_device("nrf51_soc.io", NRF51_IOMEM_BASE, NRF51_IOMEM_SIZE); create_unimplemented_device("nrf51_soc.ficr", NRF51_FICR_BASE, --=20 2.19.2