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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id j14sm46039759wrv.96.2019.01.07.08.31.41 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 07 Jan 2019 08:31:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=1Nj4Qd8AQBRrQsNtstFrCaiBGY7evGJTMBUrYASOjQY=; b=Ql5qOs4lojalis6L7DCbJA0TKdb8Ur9pgqq4fABRylRsIRMKe8mNUcXWdzn15PhXsu 9CTOVhlLkIKQh0bq8ESKb0Cy3JGs+BYtDB6DnFN0HL3CQyul6RYia6d6dg/q/yW5i/MQ nuoekyqyhVayaIDffYZM5GVeuJVByVAYhs+NY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1Nj4Qd8AQBRrQsNtstFrCaiBGY7evGJTMBUrYASOjQY=; b=LtQlSAD1udoeM/q8HhwW0QYcvkOp8+bWWhNF9+ejgdEic89ltzkBkOXBx8+A1CiRdQ /YYE7J+VN0mpErTp3x+Pjh004n8Kf8G87v2H0QnmPbgfhZAWhIz31DLFZVdgr71XVfHc MLs2qjcK+Hih4+vyaGbWzkA1U8tQgKYHbwa2xWWi9RBarp9yhjCsosmzsXrrptpUFc+W 5ezPy7GieiZHAs1JrV2zursjfYTvDhyYIKmhA3yb1Tx2/ewUnEtb+e8+uASiHx10tkmM zTGY3QOabThQjvVgLnC1EbP95JxfoqxOsce/3CdO3GtrzcMUCVqctUigIIFYOiStDsnz XfBQ== X-Gm-Message-State: AJcUuketUT+S+svM+DLUG1+tpyBaOQRDF90Mck/cEaC8NBOr65MhLZBl JiJRAPDbjiRtcYWmmwH5HC5ZCX6TM8VkmQ== X-Google-Smtp-Source: ALg8bN4ZxRTUnDKsD/3QphYshDU0GdNnUswx+LeNrH8M50N96bMULu0pvTGynBgZHGOFGkD6V5dPfg== X-Received: by 2002:a5d:6244:: with SMTP id m4mr41723574wrv.314.1546878702505; Mon, 07 Jan 2019 08:31:42 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Date: Mon, 7 Jan 2019 16:30:58 +0000 Message-Id: <20190107163117.16269-19-peter.maydell@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20190107163117.16269-1-peter.maydell@linaro.org> References: <20190107163117.16269-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::436 Subject: [Qemu-devel] [PULL 18/37] arm/xlnx-zynqmp: put APUs and RPUs in separate CPU clusters X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: Luc Michel Create two separate CPU clusters for APUs and RPUs. Signed-off-by: Luc Michel Reviewed-by: Edgar E. Iglesias Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Message-id: 20181207090135.7651-17-luc.michel@greensocs.com Signed-off-by: Peter Maydell --- include/hw/arm/xlnx-zynqmp.h | 3 +++ hw/arm/xlnx-zynqmp.c | 23 +++++++++++++++++++---- 2 files changed, 22 insertions(+), 4 deletions(-) diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h index 98f925ab84a..591515c7600 100644 --- a/include/hw/arm/xlnx-zynqmp.h +++ b/include/hw/arm/xlnx-zynqmp.h @@ -31,6 +31,7 @@ #include "hw/display/xlnx_dp.h" #include "hw/intc/xlnx-zynqmp-ipi.h" #include "hw/timer/xlnx-zynqmp-rtc.h" +#include "hw/cpu/cluster.h" =20 #define TYPE_XLNX_ZYNQMP "xlnx,zynqmp" #define XLNX_ZYNQMP(obj) OBJECT_CHECK(XlnxZynqMPState, (obj), \ @@ -77,6 +78,8 @@ typedef struct XlnxZynqMPState { DeviceState parent_obj; =20 /*< public >*/ + CPUClusterState apu_cluster; + CPUClusterState rpu_cluster; ARMCPU apu_cpu[XLNX_ZYNQMP_NUM_APU_CPUS]; ARMCPU rpu_cpu[XLNX_ZYNQMP_NUM_RPU_CPUS]; GICState gic; diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index c1950403505..c67ac2e64ac 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -178,12 +178,19 @@ static void xlnx_zynqmp_create_rpu(XlnxZynqMPState *s= , const char *boot_cpu, int i; int num_rpus =3D MIN(smp_cpus - XLNX_ZYNQMP_NUM_APU_CPUS, XLNX_ZYNQMP_= NUM_RPU_CPUS); =20 + object_initialize_child(OBJECT(s), "rpu-cluster", &s->rpu_cluster, + sizeof(s->rpu_cluster), TYPE_CPU_CLUSTER, + &error_abort, NULL); + qdev_prop_set_uint32(DEVICE(&s->rpu_cluster), "cluster-id", 1); + + qdev_init_nofail(DEVICE(&s->rpu_cluster)); + for (i =3D 0; i < num_rpus; i++) { char *name; =20 object_initialize(&s->rpu_cpu[i], sizeof(s->rpu_cpu[i]), "cortex-r5f-" TYPE_ARM_CPU); - object_property_add_child(OBJECT(s), "rpu-cpu[*]", + object_property_add_child(OBJECT(&s->rpu_cluster), "rpu-cpu[*]", OBJECT(&s->rpu_cpu[i]), &error_abort); =20 name =3D object_get_canonical_path_component(OBJECT(&s->rpu_cpu[i]= )); @@ -213,10 +220,16 @@ static void xlnx_zynqmp_init(Object *obj) int i; int num_apus =3D MIN(smp_cpus, XLNX_ZYNQMP_NUM_APU_CPUS); =20 + object_initialize_child(obj, "apu-cluster", &s->apu_cluster, + sizeof(s->apu_cluster), TYPE_CPU_CLUSTER, + &error_abort, NULL); + qdev_prop_set_uint32(DEVICE(&s->apu_cluster), "cluster-id", 0); + for (i =3D 0; i < num_apus; i++) { - object_initialize_child(obj, "apu-cpu[*]", &s->apu_cpu[i], - sizeof(s->apu_cpu[i]), - "cortex-a53-" TYPE_ARM_CPU, &error_abort, = NULL); + object_initialize_child(OBJECT(&s->apu_cluster), "apu-cpu[*]", + &s->apu_cpu[i], sizeof(s->apu_cpu[i]), + "cortex-a53-" TYPE_ARM_CPU, &error_abort, + NULL); } =20 sysbus_init_child_obj(obj, "gic", &s->gic, sizeof(s->gic), @@ -333,6 +346,8 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error= **errp) qdev_prop_set_bit(DEVICE(&s->gic), "has-virtualization-extensions", s->virt); =20 + qdev_init_nofail(DEVICE(&s->apu_cluster)); + /* Realize APUs before realizing the GIC. KVM requires this. */ for (i =3D 0; i < num_apus; i++) { char *name; --=20 2.19.2