From nobody Fri Nov 7 04:02:14 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1546409030824721.7531433550123; Tue, 1 Jan 2019 22:03:50 -0800 (PST) Received: from localhost ([127.0.0.1]:42166 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1geZd7-00083X-9o for importer@patchew.org; Wed, 02 Jan 2019 01:03:49 -0500 Received: from eggs.gnu.org ([208.118.235.92]:48636) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1geZXj-0002id-Lg for qemu-devel@nongnu.org; Wed, 02 Jan 2019 00:58:18 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1geZXg-00060A-FO for qemu-devel@nongnu.org; Wed, 02 Jan 2019 00:58:15 -0500 Received: from 9.mo7.mail-out.ovh.net ([46.105.60.248]:38384) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1geZXg-0005zB-7n for qemu-devel@nongnu.org; Wed, 02 Jan 2019 00:58:12 -0500 Received: from player773.ha.ovh.net (unknown [10.109.160.62]) by mo7.mail-out.ovh.net (Postfix) with ESMTP id A50EDEFA7A for ; Wed, 2 Jan 2019 06:58:10 +0100 (CET) Received: from kaod.org (lfbn-1-10605-110.w90-89.abo.wanadoo.fr [90.89.196.110]) (Authenticated sender: clg@kaod.org) by player773.ha.ovh.net (Postfix) with ESMTPSA id DF76A13D1A76; Wed, 2 Jan 2019 05:58:01 +0000 (UTC) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: David Gibson Date: Wed, 2 Jan 2019 06:57:35 +0100 Message-Id: <20190102055743.5052-3-clg@kaod.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190102055743.5052-1-clg@kaod.org> References: <20190102055743.5052-1-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 5976839656280787942 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgedtledrudehgdeltdcutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemucehtddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 46.105.60.248 Subject: [Qemu-devel] [PATCH 02/10] ppc/xive: introduce a XiveTCTX pointer under PowerPCCPU X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" which will be used by the machine only when the XIVE interrupt mode is in use. Signed-off-by: C=C3=A9dric Le Goater --- target/ppc/cpu.h | 2 ++ hw/intc/xive.c | 6 +++--- hw/ppc/spapr_cpu_core.c | 7 ++++++- hw/ppc/spapr_irq.c | 8 ++++---- 4 files changed, 15 insertions(+), 8 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index d5f99f1fc7b9..c76036985623 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1177,6 +1177,7 @@ do { \ =20 typedef struct PPCVirtualHypervisor PPCVirtualHypervisor; typedef struct PPCVirtualHypervisorClass PPCVirtualHypervisorClass; +typedef struct XiveTCTX XiveTCTX; =20 /** * PowerPCCPU: @@ -1196,6 +1197,7 @@ struct PowerPCCPU { uint32_t compat_pvr; PPCVirtualHypervisor *vhyp; Object *intc; + XiveTCTX *tctx; void *machine_data; int32_t node_id; /* NUMA node this CPU belongs to */ PPCHash64Options *hash64_opts; diff --git a/hw/intc/xive.c b/hw/intc/xive.c index ea33494338dc..410c53278a11 100644 --- a/hw/intc/xive.c +++ b/hw/intc/xive.c @@ -321,7 +321,7 @@ static void xive_tm_write(void *opaque, hwaddr offset, uint64_t value, unsigned size) { PowerPCCPU *cpu =3D POWERPC_CPU(current_cpu); - XiveTCTX *tctx =3D XIVE_TCTX(cpu->intc); + XiveTCTX *tctx =3D cpu->tctx; const XiveTmOp *xto; =20 /* @@ -360,7 +360,7 @@ static void xive_tm_write(void *opaque, hwaddr offset, static uint64_t xive_tm_read(void *opaque, hwaddr offset, unsigned size) { PowerPCCPU *cpu =3D POWERPC_CPU(current_cpu); - XiveTCTX *tctx =3D XIVE_TCTX(cpu->intc); + XiveTCTX *tctx =3D cpu->tctx; const XiveTmOp *xto; =20 /* @@ -1186,7 +1186,7 @@ static bool xive_presenter_match(XiveRouter *xrtr, ui= nt8_t format, =20 CPU_FOREACH(cs) { PowerPCCPU *cpu =3D POWERPC_CPU(cs); - XiveTCTX *tctx =3D XIVE_TCTX(cpu->intc); + XiveTCTX *tctx =3D cpu->tctx; int ring; =20 /* diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 2739b2a4b818..1473ef853336 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -194,7 +194,12 @@ static void spapr_unrealize_vcpu(PowerPCCPU *cpu, sPAP= RCPUCore *sc) vmstate_unregister(NULL, &vmstate_spapr_cpu_state, cpu->machine_da= ta); } qemu_unregister_reset(spapr_cpu_reset, cpu); - object_unparent(cpu->intc); + if (cpu->intc) { + object_unparent(cpu->intc); + } + if (cpu->tctx) { + object_unparent(OBJECT(cpu->tctx)); + } cpu_remove_sync(CPU(cpu)); object_unparent(OBJECT(cpu)); } diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c index 2d2e17b66533..8d028db44ff4 100644 --- a/hw/ppc/spapr_irq.c +++ b/hw/ppc/spapr_irq.c @@ -305,7 +305,7 @@ static void spapr_irq_print_info_xive(sPAPRMachineState= *spapr, CPU_FOREACH(cs) { PowerPCCPU *cpu =3D POWERPC_CPU(cs); =20 - xive_tctx_pic_print_info(XIVE_TCTX(cpu->intc), mon); + xive_tctx_pic_print_info(cpu->tctx, mon); } =20 spapr_xive_pic_print_info(spapr->xive, mon); @@ -323,13 +323,13 @@ static void spapr_irq_cpu_intc_create_xive(sPAPRMachi= neState *spapr, return; } =20 - cpu->intc =3D obj; + cpu->tctx =3D XIVE_TCTX(obj); =20 /* * (TCG) Early setting the OS CAM line for hotplugged CPUs as they * don't beneficiate from the reset of the XIVE IRQ backend */ - spapr_xive_set_tctx_os_cam(XIVE_TCTX(obj)); + spapr_xive_set_tctx_os_cam(cpu->tctx); } =20 static int spapr_irq_post_load_xive(sPAPRMachineState *spapr, int version_= id) @@ -345,7 +345,7 @@ static void spapr_irq_reset_xive(sPAPRMachineState *spa= pr, Error **errp) PowerPCCPU *cpu =3D POWERPC_CPU(cs); =20 /* (TCG) Set the OS CAM line of the thread interrupt context. */ - spapr_xive_set_tctx_os_cam(XIVE_TCTX(cpu->intc)); + spapr_xive_set_tctx_os_cam(cpu->tctx); } } =20 --=20 2.20.1