From nobody Fri Nov 7 04:19:52 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=intel.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1545878886787704.2647699954056; Wed, 26 Dec 2018 18:48:06 -0800 (PST) Received: from localhost ([127.0.0.1]:49161 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gcLiP-00078z-Fr for importer@patchew.org; Wed, 26 Dec 2018 21:48:05 -0500 Received: from eggs.gnu.org ([208.118.235.92]:39486) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gcLfI-0004Ua-SE for qemu-devel@nongnu.org; Wed, 26 Dec 2018 21:44:57 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gcLfC-00049O-Jo for qemu-devel@nongnu.org; Wed, 26 Dec 2018 21:44:51 -0500 Received: from mga14.intel.com ([192.55.52.115]:35525) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gcLfC-0003v7-53 for qemu-devel@nongnu.org; Wed, 26 Dec 2018 21:44:46 -0500 Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Dec 2018 18:44:40 -0800 Received: from vmmtaopc.sh.intel.com ([10.239.13.92]) by orsmga005.jf.intel.com with ESMTP; 26 Dec 2018 18:44:38 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,403,1539673200"; d="scan'208";a="286869311" From: Tao Xu To: pbonzini@redhat.com, rth@twiddle.net, ehabkost@redhat.com Date: Thu, 27 Dec 2018 10:43:04 +0800 Message-Id: <20181227024304.12182-3-tao3.xu@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181227024304.12182-1-tao3.xu@intel.com> References: <20181227024304.12182-1-tao3.xu@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.115 Subject: [Qemu-devel] [PATCH 2/2] i386: Add some MSR based features on Cascadelake-Server CPU model X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tao3.xu@intel.com, qemu-devel@nongnu.org, robert.hu@linux.intel.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" As noted in http://lists.gnu.org/archive/html/qemu-devel/2018-09/msg02212.html Because MSR based feature has been supported by QEMU, we add CPUID_7_0_EDX_ARCH_CAPABILITIES on Cascadelake-Server CPU model, and add IA32_ARCH_CAPABILITIES MSR based features (RDCL_NO, IBRS_ALL and SKIP_L1DFL_VMENTRY). Note: RSBA and SSBD_NO are not supported by native machines on stepping 6 of Cascadelake-Server, so we will keep the CPU model updated. Signed-off-by: Tao Xu --- include/hw/i386/pc.h | 16 ++++++++++++++++ target/i386/cpu.c | 6 +++++- 2 files changed, 21 insertions(+), 1 deletion(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 95453968db..741ceefa5b 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -304,6 +304,22 @@ bool e820_get_entry(int, uint32_t, uint64_t *, uint64_= t *); .driver =3D "Cascadelake-Server" "-" TYPE_X86_CPU,\ .property =3D "stepping",\ .value =3D "5",\ + },{\ + .driver =3D "Cascadelake-Server" "-" TYPE_X86_CPU,\ + .property =3D "arch-capabilities",\ + .value =3D "off",\ + },{\ + .driver =3D "Cascadelake-Server" "-" TYPE_X86_CPU,\ + .property =3D "rdctl-no",\ + .value =3D "off",\ + },{\ + .driver =3D "Cascadelake-Server" "-" TYPE_X86_CPU,\ + .property =3D "ibrs-all",\ + .value =3D "off",\ + },{\ + .driver =3D "Cascadelake-Server" "-" TYPE_X86_CPU,\ + .property =3D "skip-l1dfl-vmentry",\ + .value =3D "off",\ }, =20 #define PC_COMPAT_3_0 \ diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 09706ad51a..5296c73cd5 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -2499,7 +2499,8 @@ static X86CPUDefinition builtin_x86_defs[] =3D { CPUID_7_0_ECX_PKU | CPUID_7_0_ECX_OSPKE | CPUID_7_0_ECX_AVX512VNNI, .features[FEAT_7_0_EDX] =3D - CPUID_7_0_EDX_SPEC_CTRL | CPUID_7_0_EDX_SPEC_CTRL_SSBD, + CPUID_7_0_EDX_SPEC_CTRL | CPUID_7_0_EDX_SPEC_CTRL_SSBD | + CPUID_7_0_EDX_ARCH_CAPABILITIES, /* Missing: XSAVES (not supported by some Linux versions, * including v4.1 to v4.12). * KVM doesn't yet expose any XSAVES state save component, @@ -2511,6 +2512,9 @@ static X86CPUDefinition builtin_x86_defs[] =3D { CPUID_XSAVE_XGETBV1, .features[FEAT_6_EAX] =3D CPUID_6_EAX_ARAT, + .features[FEAT_ARCH_CAPABILITIES] =3D + MSR_ARCH_CAP_RDCL_NO | MSR_ARCH_CAP_IBRS_ALL | + MSR_ARCH_CAP_SKIP_L1DFL_VMENTRY, .xlevel =3D 0x80000008, .model_id =3D "Intel Xeon Processor (Cascadelake)", }, --=20 2.17.1