From nobody Fri Nov 7 02:13:36 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=listsout.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from listsout.gnu.org (listsout.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1545851391088783.6014687861685; Wed, 26 Dec 2018 11:09:51 -0800 (PST) Received: from localhost ([127.0.0.1]:47906 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gcEYl-0004wS-K8 for importer@patchew.org; Wed, 26 Dec 2018 14:09:39 -0500 Received: from eggs.gnu.org ([208.118.235.92]:41050) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gcEXm-0004VN-Nh for qemu-devel@nongnu.org; Wed, 26 Dec 2018 14:08:40 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gcEXl-0000Et-An for qemu-devel@nongnu.org; Wed, 26 Dec 2018 14:08:38 -0500 Received: from plaes.org ([188.166.43.21]:42928) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gcEXe-0000Ac-AP; Wed, 26 Dec 2018 14:08:30 -0500 Received: from localhost (85.253.152.156.cable.starman.ee [85.253.152.156]) by plaes.org (Postfix) with ESMTPSA id ECC7440DE5; Wed, 26 Dec 2018 19:07:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=plaes.org; s=mail; t=1545851279; bh=UNoARyk9WUusxA3pVnd9f5PYCwojbra5kRBnkYFVHgI=; h=From:To:Cc:Subject:Date:From; b=gC5POIK9XJApSGxZeU7OocIZ1EsRrbdcXlye7EeEbIzXmrD+8u11GqEdRFsG8ZQoU 94XkSlSgbXsPmZnDk+4a5+Rzu+DrCVidKjNzuF/Y0Zveuq/W3VTO4pWPdu+bINI8yR AydM0vlpbVfOmiHx/E4soocWXMfNvKcp8YCs1o9pRj9MASd6namT+AiybXpAZ4TyiX Vrbbh69k9Bph3LLrei5oewK+VAHS/9eiq4skfqG0oOgh+LdYuz+8vXJnnLzOGJVW93 PwhIds9FHAqJctrZBrHyjk2VihjJPPgpzGTud1d+S7C35Js5MwD6BT3tOGmhVtxbxq DuAFOnVaFVsBw== From: Priit Laes To: Peter Maydell , Alistair Francis , qemu-devel@nongnu.org, qemu-arm@nongnu.org Date: Wed, 26 Dec 2018 21:07:02 +0200 Message-Id: <20181226190702.403-1-plaes@plaes.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 188.166.43.21 Subject: [Qemu-devel] [RFC PATCH] stm32f103: Add initial skeleton of STM32 F103 SoC X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Priit Laes Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Initial barebone SoC implementation for STM32F103 with "Blue Pill" board source for testing. Code is based on both nrf51/microbit and stm32f205. Although code loads and seems to be at the right addresses it does not yet run: ./arm-softmmu/qemu-system-arm -nographic \ -machine stm32bluepill \ -kernel \ libopencm3-miniblink/bin/stm32/bluepill.bin QEMU 3.1.50 monitor - type 'help' for more information (qemu) QEMU 3.1.50 monitor - type 'help' for more information (qemu) gdbserver Waiting for gdb connection on device 'tcp::1234' $ arm-none-eabi-gdb \ libopencm3-miniblink/bin/stm32/bluepill.elf (gdb) target remote tcp::1234 Remote debugging using tcp::1234 blocking_handler () at ../../cm3/vector.c:103 103 { (gdb) bt Backtrace stopped: previous frame identical to this frame (corrupt stack?) (gdb) info line Line 103 of "../../cm3/vector.c" starts at address 0x8000380 \ and ends at 0x8000382 . Any ideas? Signed-off-by: Priit Laes --- default-configs/arm-softmmu.mak | 1 + hw/arm/Makefile.objs | 1 + hw/arm/stm32f103_blue_pill.c | 78 ++++++++++++++++++++++++++++ hw/arm/stm32f103_soc.c | 92 +++++++++++++++++++++++++++++++++ include/hw/arm/stm32f103_soc.h | 54 +++++++++++++++++++ 5 files changed, 226 insertions(+) create mode 100644 hw/arm/stm32f103_blue_pill.c create mode 100644 hw/arm/stm32f103_soc.c create mode 100644 include/hw/arm/stm32f103_soc.h diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.= mak index 2420491aac..7a55e523e1 100644 --- a/default-configs/arm-softmmu.mak +++ b/default-configs/arm-softmmu.mak @@ -95,6 +95,7 @@ CONFIG_RASPI=3Dy CONFIG_REALVIEW=3Dy CONFIG_ZAURUS=3Dy CONFIG_ZYNQ=3Dy +CONFIG_STM32F103_SOC=3Dy CONFIG_STM32F2XX_TIMER=3Dy CONFIG_STM32F2XX_USART=3Dy CONFIG_STM32F2XX_SYSCFG=3Dy diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs index 50c7b4a927..7f59a9349d 100644 --- a/hw/arm/Makefile.objs +++ b/hw/arm/Makefile.objs @@ -24,6 +24,7 @@ obj-$(CONFIG_OMAP) +=3D omap1.o omap2.o obj-$(CONFIG_STRONGARM) +=3D strongarm.o obj-$(CONFIG_ALLWINNER_A10) +=3D allwinner-a10.o cubieboard.o obj-$(CONFIG_RASPI) +=3D bcm2835_peripherals.o bcm2836.o raspi.o +obj-$(CONFIG_STM32F103_SOC) +=3D stm32f103_soc.o stm32f103_blue_pill.o obj-$(CONFIG_STM32F205_SOC) +=3D stm32f205_soc.o obj-$(CONFIG_XLNX_ZYNQMP_ARM) +=3D xlnx-zynqmp.o xlnx-zcu102.o obj-$(CONFIG_XLNX_VERSAL) +=3D xlnx-versal.o xlnx-versal-virt.o diff --git a/hw/arm/stm32f103_blue_pill.c b/hw/arm/stm32f103_blue_pill.c new file mode 100644 index 0000000000..09dd69aa71 --- /dev/null +++ b/hw/arm/stm32f103_blue_pill.c @@ -0,0 +1,78 @@ +/* + * STM32F103C8 Blue Pill development board Machine Model + * + * Copyright (c) 2018 Priit Laes + * + * Permission is hereby granted, free of charge, to any person obtaining a= copy + * of this software and associated documentation files (the "Software"), t= o deal + * in the Software without restriction, including without limitation the r= ights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or se= ll + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included= in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS= OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OT= HER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING= FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS = IN + * THE SOFTWARE. + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/boards.h" +#include "hw/arm/arm.h" +#include "exec/address-spaces.h" + +#include "hw/arm/stm32f103_soc.h" + +typedef struct { + MachineState parent; + + STM32F103State stm32f103; +} STM32BluePillMachineState; + +#define TYPE_STM32BLUEPILL_MACHINE MACHINE_TYPE_NAME("stm32bluepill") + +#define STM32BLUEPILL_MACHINE(obj) \ + OBJECT_CHECK(STM32BluePillMachineState, obj, TYPE_STM32BLUEPILL_MACHIN= E) + +static void stm32bluepill_init(MachineState *machine) +{ + STM32BluePillMachineState *s =3D STM32BLUEPILL_MACHINE(machine); + Object *soc =3D OBJECT(&s->stm32f103); + + sysbus_init_child_obj(OBJECT(machine), "stm32f103-soc", soc, + sizeof(s->stm32f103), TYPE_STM32F103_SOC); + object_property_set_bool(soc, true, "realized", &error_fatal); + + armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename, + FLASH_SIZE); +} + +static void stm32bluepill_machine_class_init(ObjectClass *oc, void *data) +{ + MachineClass *mc =3D MACHINE_CLASS(oc); + + mc->desc =3D "STM32F103 Blue Pill development board"; + mc->init =3D stm32bluepill_init; + mc->max_cpus =3D 1; +} + +static const TypeInfo stm32bluepill_info =3D { + .name =3D TYPE_STM32BLUEPILL_MACHINE, + .parent =3D TYPE_MACHINE, + .instance_size =3D sizeof(STM32BluePillMachineState), + .class_init =3D stm32bluepill_machine_class_init, +}; + +static void stm32bluepill_machine_init(void) +{ + type_register_static(&stm32bluepill_info); +} + +type_init(stm32bluepill_machine_init); diff --git a/hw/arm/stm32f103_soc.c b/hw/arm/stm32f103_soc.c new file mode 100644 index 0000000000..3093bce4ea --- /dev/null +++ b/hw/arm/stm32f103_soc.c @@ -0,0 +1,92 @@ +/* + * STM32 F103 SoC (or MCU) + * + * Copyright 2018 Priit Laes + * + * This code is licensed under the GPL version 2 or later. See + * the COPYING file in the top-level directory. + */ +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/sysbus.h" +#include "exec/address-spaces.h" + +#include "hw/arm/stm32f103_soc.h" + +#define FLASH_BASE 0x08000000 +#define SRAM_BASE 0x20000000 + +static void stm32f103_soc_init(Object *obj) +{ + STM32F103State *s =3D STM32F103_SOC(obj); + + sysbus_init_child_obj(obj, "armv7m", &s->cpu, sizeof(s->cpu), + TYPE_ARMV7M); +} + +static void stm32f103_soc_realize(DeviceState *dev_soc, Error **errp) +{ + STM32F103State *s =3D STM32F103_SOC(dev_soc); + Error *err =3D NULL; + + /* + * XXX: Region 0x1FFF F000 - 0x1FFF F7FF is called "System Memory" + * containing boot loader used to reprogram flash by using USART1. + */ + MemoryRegion *system_memory =3D get_system_memory(); + + memory_region_init_rom(&s->flash, NULL, "stm32.flash", FLASH_SIZE, + &error_fatal); + memory_region_add_subregion(system_memory, FLASH_BASE, &s->flash); + /* + * TODO: based on BOOT pin, 0x00000000 - 0x0007FFFF is aliased to + * either Flash or system memory. We currently hardcode it to flash. + */ + memory_region_init_alias(&s->flash_alias, NULL, "stm32.flash_alias", + &s->flash, 0, FLASH_SIZE); + memory_region_add_subregion(system_memory, 0, &s->flash_alias); + + memory_region_init_ram(&s->sram, NULL, "stm32.sram", SRAM_SIZE, + &error_fatal); + memory_region_add_subregion(system_memory, SRAM_BASE, &s->sram); + + qdev_prop_set_bit(DEVICE(&s->cpu), "enable-bitband", true); + qdev_prop_set_uint32(DEVICE(&s->cpu), "num-irq", 80); + qdev_prop_set_string(DEVICE(&s->cpu), "cpu-type", ARM_CPU_TYPE_NAME("c= ortex-m3")); + + object_property_set_link(OBJECT(&s->cpu), OBJECT(system_memory), + "memory", &error_abort); + object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err); + if (err !=3D NULL) { + error_propagate(errp, err); + return; + } +} + +static Property stm32f103_soc_properties[] =3D { + DEFINE_PROP_UINT32("flash-size", STM32F103State, flash_size, FLASH_SIZ= E), + DEFINE_PROP_UINT32("sram-size", STM32F103State, sram_size, SRAM_SIZE), + DEFINE_PROP_END_OF_LIST(), +}; + +static void stm32f103_soc_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + + dc->props =3D stm32f103_soc_properties; + dc->realize =3D stm32f103_soc_realize; +} + +static const TypeInfo stm32f103_soc_info =3D { + .name =3D TYPE_STM32F103_SOC, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(STM32F103State), + .instance_init =3D stm32f103_soc_init, + .class_init =3D stm32f103_soc_class_init, +}; + +static void stm32f103_soc_types(void) +{ + type_register_static(&stm32f103_soc_info); +} +type_init(stm32f103_soc_types) diff --git a/include/hw/arm/stm32f103_soc.h b/include/hw/arm/stm32f103_soc.h new file mode 100644 index 0000000000..d6b2eb9c57 --- /dev/null +++ b/include/hw/arm/stm32f103_soc.h @@ -0,0 +1,54 @@ +/* + * STM32 F103 SoC (or MCU) + * + * Copyright (c) 2018 Priit Laes + * + * Permission is hereby granted, free of charge, to any person obtaining a= copy + * of this software and associated documentation files (the "Software"), t= o deal + * in the Software without restriction, including without limitation the r= ights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or se= ll + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included= in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS= OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OT= HER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING= FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS = IN + * THE SOFTWARE. + */ + +#ifndef HW_ARM_STM32F103_SOC_H +#define HW_ARM_STM32F103_SOC_H + +#include "hw/arm/armv7m.h" + +#define TYPE_STM32F103_SOC "stm32f103-soc" +#define STM32F103_SOC(obj) \ + OBJECT_CHECK(STM32F103State, (obj), TYPE_STM32F103_SOC) + +/* TODO: flash/sram sizes are for STM32F103C8 part. */ +#define FLASH_SIZE (64 * 1024) +#define SRAM_SIZE (20 * 1024) + +typedef struct STM32F103State { + SysBusDevice parent_obj; + + ARMv7MState cpu; + + uint32_t sram_size; + uint32_t flash_size; + MemoryRegion sram; + MemoryRegion flash; + /* XXX: find better name */ + MemoryRegion flash_alias; + + /* TODO: Peripherals */ + +} STM32F103State; + +#endif /* HW_ARM_STM32F103_SOC_H */ --=20 2.20.1