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[211.28.135.144]) by smtp.gmail.com with ESMTPSA id t21sm48501628pgg.24.2018.12.25.12.59.17 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 25 Dec 2018 12:59:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=r2I/9ChAl3XEIXJG3eEWF8YqYCOrRkM1UpTamxua9sY=; b=CrdlUQj/5Sfg8z6Y1uPSLnopXyLl/W/oFzaKExGm+wR3ATjGDMVV5Xqw3AsjEghaUT FpyCH1NXTvO/OicW00F6889gglCW+VxJm9y2wZ/afbpA9duPjecM3dPbnznE7b0hEs1z DcajqQVNIklfbec8aglaBWNyVscuo9mXRF8J4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=r2I/9ChAl3XEIXJG3eEWF8YqYCOrRkM1UpTamxua9sY=; b=K1Ooe4tE3hWRYhVyT36qP64QHVEtNk4ZKPef5QTDAaH2ebC4dO7CRKtnJa4eqiFa38 lQTjs+hPsd3HB1tjQEjiJzzxaXAxPjlLBJZ1o+eNDJt95GpSK1CSxDXNOLM2l6qDSH1t 1N0edzQ0bHSYBIg1l7jVago6sjU5bjSzrdGYFgyQJ9M8bkm5jOzwYC/zFa5oUr0+cCZU cvGcHA3NYl4PWnhJfbzMsVTyK3chIs64YLFd6fso5wOGQZ8Nf+rWWrAaPvLcAvc64Lwj LF2ZILixCkA3UZJY0WUws98pb1XjI0IZ4CVQhBzIvb1Ih4s6oEPsgO4b61szraU2a4rU NhyQ== X-Gm-Message-State: AJcUukdejxr9fXVNouJLZ1tl+H1YwTO+hvqgKnZg7pwiVaCDG+53BlX/ 3qv7qQT/ZVPNgYAmcVEh0xuozFKn5+w= X-Google-Smtp-Source: ALg8bN6SycsuES+XmtvAFzCniu+MPsT/Uto9Dde2qfL3ZJeWraP1YBkzTKcgSSPJmxO7vULEV9p4Ww== X-Received: by 2002:a63:295:: with SMTP id 143mr16198954pgc.362.1545771562527; Tue, 25 Dec 2018 12:59:22 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 26 Dec 2018 07:55:18 +1100 Message-Id: <20181225205529.10874-32-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181225205529.10874-1-richard.henderson@linaro.org> References: <20181225205529.10874-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::535 Subject: [Qemu-devel] [PULL 31/42] tcg: Add preferred_reg argument to temp_load X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Pass this through to tcg_reg_alloc. Reviewed-by: Emilio G. Cota Signed-off-by: Richard Henderson --- tcg/tcg.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index 210bd5c6b9..351d302a68 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -2837,7 +2837,7 @@ static void temp_allocate_frame(TCGContext *s, TCGTem= p *ts) s->current_frame_offset +=3D sizeof(tcg_target_long); } =20 -static void temp_load(TCGContext *, TCGTemp *, TCGRegSet, TCGRegSet); +static void temp_load(TCGContext *, TCGTemp *, TCGRegSet, TCGRegSet, TCGRe= gSet); =20 /* Mark a temporary as free or dead. If 'free_or_dead' is negative, mark it free; otherwise mark it dead. */ @@ -2886,7 +2886,7 @@ static void temp_sync(TCGContext *s, TCGTemp *ts, break; } temp_load(s, ts, tcg_target_available_regs[ts->type], - allocated_regs); + allocated_regs, 0); /* fallthrough */ =20 case TEMP_VAL_REG: @@ -2992,7 +2992,7 @@ static TCGReg tcg_reg_alloc(TCGContext *s, TCGRegSet = required_regs, /* Make sure the temporary is in a register. If needed, allocate the regi= ster from DESIRED while avoiding ALLOCATED. */ static void temp_load(TCGContext *s, TCGTemp *ts, TCGRegSet desired_regs, - TCGRegSet allocated_regs) + TCGRegSet allocated_regs, TCGRegSet preferred_regs) { TCGReg reg; =20 @@ -3001,13 +3001,13 @@ static void temp_load(TCGContext *s, TCGTemp *ts, T= CGRegSet desired_regs, return; case TEMP_VAL_CONST: reg =3D tcg_reg_alloc(s, desired_regs, allocated_regs, - 0, ts->indirect_base); + preferred_regs, ts->indirect_base); tcg_out_movi(s, ts->type, reg, ts->val); ts->mem_coherent =3D 0; break; case TEMP_VAL_MEM: reg =3D tcg_reg_alloc(s, desired_regs, allocated_regs, - 0, ts->indirect_base); + preferred_regs, ts->indirect_base); tcg_out_ld(s, ts->type, reg, ts->mem_base->reg, ts->mem_offset); ts->mem_coherent =3D 1; break; @@ -3137,7 +3137,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TC= GOp *op) the SOURCE value into its own register first, that way we don't have to reload SOURCE the next time it is used. */ if (ts->val_type =3D=3D TEMP_VAL_MEM) { - temp_load(s, ts, tcg_target_available_regs[itype], allocated_regs); + temp_load(s, ts, tcg_target_available_regs[itype], allocated_regs,= 0); } =20 tcg_debug_assert(ts->val_type =3D=3D TEMP_VAL_REG); @@ -3221,7 +3221,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCG= Op *op) goto iarg_end; } =20 - temp_load(s, ts, arg_ct->u.regs, i_allocated_regs); + temp_load(s, ts, arg_ct->u.regs, i_allocated_regs, 0); =20 if (arg_ct->ct & TCG_CT_IALIAS) { if (ts->fixed_reg) { @@ -3402,7 +3402,7 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *= op) if (arg !=3D TCG_CALL_DUMMY_ARG) { ts =3D arg_temp(arg); temp_load(s, ts, tcg_target_available_regs[ts->type], - s->reserved_regs); + s->reserved_regs, 0); tcg_out_st(s, ts->type, ts->reg, TCG_REG_CALL_STACK, stack_off= set); } #ifndef TCG_TARGET_STACK_GROWSUP @@ -3427,7 +3427,7 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *= op) TCGRegSet arg_set =3D 0; =20 tcg_regset_set_reg(arg_set, reg); - temp_load(s, ts, arg_set, allocated_regs); + temp_load(s, ts, arg_set, allocated_regs, 0); } =20 tcg_regset_set_reg(allocated_regs, reg); --=20 2.17.2