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[211.28.135.144]) by smtp.gmail.com with ESMTPSA id t21sm48501628pgg.24.2018.12.25.12.56.56 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 25 Dec 2018 12:57:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=AIQVNEPIscyDsgm/2BdqU+1LlOKWSNWo35RhA7Q9VVI=; b=ippMLsjyDKmEejBJfrz5kTHw/KYoFQ/fIEZ5lothXWdlBfO7SlwTSJ1OQV7MWnPbHZ P+V3I7GWGqDU7Sjg8UIkf6nrBfScfLsAHIRts9wMuR1iZx7G6C4absxPqihY02iPtymR MaKp4aiYrYT9+APZnlVYhEENcM3FQaiUqfZD8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=AIQVNEPIscyDsgm/2BdqU+1LlOKWSNWo35RhA7Q9VVI=; b=DpvugFGPEDCZn0c/rAYHeWjb+XPdln68t89GcOt7WpydHtDMh6Oqvk6dB2H78JowC2 91g8qK+ONeM7xQ90LdN5rnf1i7oYjQ41icRXrYhkKYUBgizimN2RIa1QB9ncJQdD3ndL 0Rd4f24Um7KeBgJZ4Ur+OidFhmkqXgpEL8ufbe2N/nialww7weYr1QRgDzbQW9v0oEYH u4j+o09RG0lnhbzHfAlVhBWKAcFcT7JJ400XS8Tttyv5W57ct5hvCLH8sdStfl/ieXdi YY/KzdMEnbuovs5lM6yiuFPl0m8OgWH7yVXwhzVN5nvVZWUcbfQPzKL3hWapuOdvRxCQ 7CVg== X-Gm-Message-State: AJcUukc6JXYM3iDNDx/+easJGArAuVe/nJxOXF20tXT+cCM0ktjXhcKX iOLjxJ+Brdr0uqjBo1sNl+z3VA6WuTw= X-Google-Smtp-Source: ALg8bN7yGNxz0w8u4hqZdFjivoGvkgXNyqbtIIGJXsBTGMrcNPE5wL/DYmKTYzWeS5Gi+QbirALmeQ== X-Received: by 2002:a17:902:f44:: with SMTP id 62mr17685199ply.38.1545771423468; Tue, 25 Dec 2018 12:57:03 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 26 Dec 2018 07:54:58 +1100 Message-Id: <20181225205529.10874-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181225205529.10874-1-richard.henderson@linaro.org> References: <20181225205529.10874-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::643 Subject: [Qemu-devel] [PULL 11/42] tcg/riscv: Add the mov and movi instruction X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Michael Clark , Alistair Francis Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Alistair Francis Signed-off-by: Alistair Francis Signed-off-by: Michael Clark Reviewed-by: Richard Henderson Message-Id: Signed-off-by: Richard Henderson --- tcg/riscv/tcg-target.inc.c | 86 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 86 insertions(+) diff --git a/tcg/riscv/tcg-target.inc.c b/tcg/riscv/tcg-target.inc.c index a26744052f..01b4443d6d 100644 --- a/tcg/riscv/tcg-target.inc.c +++ b/tcg/riscv/tcg-target.inc.c @@ -510,3 +510,89 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int t= ype, tcg_abort(); } } + +/* + * TCG intrinsics + */ + +static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg ar= g) +{ + if (ret =3D=3D arg) { + return; + } + switch (type) { + case TCG_TYPE_I32: + case TCG_TYPE_I64: + tcg_out_opc_imm(s, OPC_ADDI, ret, arg, 0); + break; + default: + g_assert_not_reached(); + } +} + +static void tcg_out_movi(TCGContext *s, TCGType type, TCGReg rd, + tcg_target_long val) +{ + tcg_target_long lo, hi, tmp; + int shift, ret; + + if (TCG_TARGET_REG_BITS =3D=3D 64 && type =3D=3D TCG_TYPE_I32) { + val =3D (int32_t)val; + } + + lo =3D sextreg(val, 0, 12); + if (val =3D=3D lo) { + tcg_out_opc_imm(s, OPC_ADDI, rd, TCG_REG_ZERO, lo); + return; + } + + hi =3D val - lo; + if (TCG_TARGET_REG_BITS =3D=3D 32 || val =3D=3D (int32_t)val) { + tcg_out_opc_upper(s, OPC_LUI, rd, hi); + if (lo !=3D 0) { + tcg_out_opc_imm(s, OPC_ADDIW, rd, rd, lo); + } + return; + } + + /* We can only be here if TCG_TARGET_REG_BITS !=3D 32 */ + tmp =3D tcg_pcrel_diff(s, (void *)val); + if (tmp =3D=3D (int32_t)tmp) { + tcg_out_opc_upper(s, OPC_AUIPC, rd, 0); + tcg_out_opc_imm(s, OPC_ADDI, rd, rd, 0); + ret =3D reloc_call(s->code_ptr - 2, (tcg_insn_unit *)val); + tcg_debug_assert(ret =3D=3D true); + return; + } + + /* Look for a single 20-bit section. */ + shift =3D ctz64(val); + tmp =3D val >> shift; + if (tmp =3D=3D sextreg(tmp, 0, 20)) { + tcg_out_opc_upper(s, OPC_LUI, rd, tmp << 12); + if (shift > 12) { + tcg_out_opc_imm(s, OPC_SLLI, rd, rd, shift - 12); + } else { + tcg_out_opc_imm(s, OPC_SRAI, rd, rd, 12 - shift); + } + return; + } + + /* Look for a few high zero bits, with lots of bits set in the middle.= */ + shift =3D clz64(val); + tmp =3D val << shift; + if (tmp =3D=3D sextreg(tmp, 12, 20) << 12) { + tcg_out_opc_upper(s, OPC_LUI, rd, tmp); + tcg_out_opc_imm(s, OPC_SRLI, rd, rd, shift); + return; + } else if (tmp =3D=3D sextreg(tmp, 0, 12)) { + tcg_out_opc_imm(s, OPC_ADDI, rd, TCG_REG_ZERO, tmp); + tcg_out_opc_imm(s, OPC_SRLI, rd, rd, shift); + return; + } + + /* Drop into the constant pool. */ + new_pool_label(s, val, R_RISCV_CALL, s->code_ptr, 0); + tcg_out_opc_upper(s, OPC_AUIPC, rd, 0); + tcg_out_opc_imm(s, OPC_LD, rd, rd, 0); +} --=20 2.17.2