From nobody Fri Nov 7 02:13:34 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1545565288178539.6303744231909; Sun, 23 Dec 2018 03:41:28 -0800 (PST) Received: from localhost ([::1]:45457 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gb28H-0001tR-Iv for importer@patchew.org; Sun, 23 Dec 2018 06:41:21 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50490) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gb26M-0000jp-0I for qemu-devel@nongnu.org; Sun, 23 Dec 2018 06:39:22 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gb26H-0008TY-Cp for qemu-devel@nongnu.org; Sun, 23 Dec 2018 06:39:21 -0500 Received: from chuckie.co.uk ([82.165.15.123]:48721 helo=s16892447.onlinehome-server.info) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gb26F-0008P4-Fv; Sun, 23 Dec 2018 06:39:15 -0500 Received: from host86-177-178-114.range86-177.btcentralplus.com ([86.177.178.114] helo=kentang.home) by s16892447.onlinehome-server.info with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.76) (envelope-from ) id 1gb26R-0000Xw-0w; Sun, 23 Dec 2018 11:39:28 +0000 From: Mark Cave-Ayland To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org, richard.henderson@linaro.org, david@gibson.dropbear.id.au Date: Sun, 23 Dec 2018 11:38:54 +0000 Message-Id: <20181223113859.3675-2-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20181223113859.3675-1-mark.cave-ayland@ilande.co.uk> References: <20181223113859.3675-1-mark.cave-ayland@ilande.co.uk> X-SA-Exim-Connect-IP: 86.177.178.114 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk X-SA-Exim-Version: 4.2.1 (built Sun, 08 Jan 2012 02:45:44 +0000) X-SA-Exim-Scanned: Yes (on s16892447.onlinehome-server.info) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 82.165.15.123 Subject: [Qemu-devel] [PATCH 1/6] target/ppc: implement complete set of Vsr* macros X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This prepares us for eliminating the use of direct array access within the = VMX instruction implementations. Signed-off-by: Mark Cave-Ayland Reviewed-by: Richard Henderson --- target/ppc/internal.h | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/target/ppc/internal.h b/target/ppc/internal.h index c7c0f77dd6..f26a71ffcf 100644 --- a/target/ppc/internal.h +++ b/target/ppc/internal.h @@ -206,16 +206,23 @@ EXTRACT_HELPER_SPLIT_3(DCMX_XV, 5, 16, 0, 1, 2, 5, 1,= 6, 6); =20 #if defined(HOST_WORDS_BIGENDIAN) #define VsrB(i) u8[i] +#define VsrSB(i) s8[i] #define VsrH(i) u16[i] +#define VsrSH(i) s16[i] #define VsrW(i) u32[i] +#define VsrSW(i) s32[i] #define VsrD(i) u64[i] +#define VsrSD(i) s64[i] #else #define VsrB(i) u8[15 - (i)] +#define VsrSB(i) s8[15 - (i)] #define VsrH(i) u16[7 - (i)] +#define VsrSH(i) s16[7 - (i)] #define VsrW(i) u32[3 - (i)] +#define VsrSW(i) s32[3 - (i)] #define VsrD(i) u64[1 - (i)] +#define VsrSD(i) s64[1 - (i)] #endif - static inline void getVSR(int n, ppc_vsr_t *vsr, CPUPPCState *env) { vsr->VsrD(0) =3D env->vsr[n].u64[0]; --=20 2.11.0 From nobody Fri Nov 7 02:13:34 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 154556531551430.064726375746886; Sun, 23 Dec 2018 03:41:55 -0800 (PST) Received: from localhost ([::1]:46227 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gb28o-0002KT-4O for importer@patchew.org; Sun, 23 Dec 2018 06:41:54 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50542) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gb26Q-0000mS-0R for qemu-devel@nongnu.org; Sun, 23 Dec 2018 06:39:30 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gb26J-0008Vc-Ij for qemu-devel@nongnu.org; Sun, 23 Dec 2018 06:39:25 -0500 Received: from chuckie.co.uk ([82.165.15.123]:48724 helo=s16892447.onlinehome-server.info) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gb26H-0008PU-MD; Sun, 23 Dec 2018 06:39:17 -0500 Received: from host86-177-178-114.range86-177.btcentralplus.com ([86.177.178.114] helo=kentang.home) by s16892447.onlinehome-server.info with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.76) (envelope-from ) id 1gb26S-0000Xw-9n; Sun, 23 Dec 2018 11:39:29 +0000 From: Mark Cave-Ayland To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org, richard.henderson@linaro.org, david@gibson.dropbear.id.au Date: Sun, 23 Dec 2018 11:38:55 +0000 Message-Id: <20181223113859.3675-3-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20181223113859.3675-1-mark.cave-ayland@ilande.co.uk> References: <20181223113859.3675-1-mark.cave-ayland@ilande.co.uk> X-SA-Exim-Connect-IP: 86.177.178.114 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk X-SA-Exim-Version: 4.2.1 (built Sun, 08 Jan 2012 02:45:44 +0000) X-SA-Exim-Scanned: Yes (on s16892447.onlinehome-server.info) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 82.165.15.123 Subject: [Qemu-devel] [PATCH 2/6] target/ppc: rework vmrg{l, h}{b, h, w} instructions to use Vsr* macros X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The current implementations make use of the endian-specific macros MRGLO/MR= GHI and also reference HI_IDX and LO_IDX directly to calculate array offsets. Rework the implementation to use the Vsr* macros so that these per-endian references can be removed. Signed-off-by: Mark Cave-Ayland --- target/ppc/int_helper.c | 52 ++++++++++++++++++++++++---------------------= ---- 1 file changed, 25 insertions(+), 27 deletions(-) diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index 598731d47a..f084a706ee 100644 --- a/target/ppc/int_helper.c +++ b/target/ppc/int_helper.c @@ -976,43 +976,41 @@ void helper_vmladduhm(ppc_avr_t *r, ppc_avr_t *a, ppc= _avr_t *b, ppc_avr_t *c) } } =20 -#define VMRG_DO(name, element, highp) \ +#define VMRG_DOLO(name, element, access) \ void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ { \ ppc_avr_t result; \ int i; \ - size_t n_elems =3D ARRAY_SIZE(r->element); \ + int m =3D ARRAY_SIZE(r->element) - 1; \ \ - for (i =3D 0; i < n_elems / 2; i++) { \ - if (highp) { \ - result.element[i*2+HI_IDX] =3D a->element[i]; \ - result.element[i*2+LO_IDX] =3D b->element[i]; \ - } else { \ - result.element[n_elems - i * 2 - (1 + HI_IDX)] =3D \ - b->element[n_elems - i - 1]; \ - result.element[n_elems - i * 2 - (1 + LO_IDX)] =3D \ - a->element[n_elems - i - 1]; \ - } \ + for (i =3D 0; i < ARRAY_SIZE(r->element); i++) { \ + result.access(m - i) =3D (i & 1) ? a->access(m - (i >> 1)) \ + : b->access(m - (i >> 1)); \ } \ *r =3D result; \ } -#if defined(HOST_WORDS_BIGENDIAN) -#define MRGHI 0 -#define MRGLO 1 -#else -#define MRGHI 1 -#define MRGLO 0 -#endif -#define VMRG(suffix, element) \ - VMRG_DO(mrgl##suffix, element, MRGHI) \ - VMRG_DO(mrgh##suffix, element, MRGLO) -VMRG(b, u8) -VMRG(h, u16) -VMRG(w, u32) + +#define VMRG_DOHI(name, element, access) \ + void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ + { \ + ppc_avr_t result; \ + int i; \ + \ + for (i =3D 0; i < ARRAY_SIZE(r->element); i++) { \ + result.access(i) =3D (i & 1) ? b->access(i >> 1) \ + : a->access(i >> 1); \ + } \ + *r =3D result; \ + } + +#define VMRG(suffix, element, access) \ + VMRG_DOLO(mrgl##suffix, element, access) \ + VMRG_DOHI(mrgh##suffix, element, access) +VMRG(b, u8, VsrB) +VMRG(h, u16, VsrH) +VMRG(w, u32, VsrW) #undef VMRG_DO #undef VMRG -#undef MRGHI -#undef MRGLO =20 void helper_vmsummbm(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) --=20 2.11.0 From nobody Fri Nov 7 02:13:34 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1545565431177210.519870256408; Sun, 23 Dec 2018 03:43:51 -0800 (PST) Received: from localhost ([::1]:49233 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gb2Af-0004Rd-R8 for importer@patchew.org; Sun, 23 Dec 2018 06:43:49 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50491) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gb26M-0000jq-0H for qemu-devel@nongnu.org; Sun, 23 Dec 2018 06:39:23 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gb26J-0008Vi-JC for qemu-devel@nongnu.org; Sun, 23 Dec 2018 06:39:21 -0500 Received: from chuckie.co.uk ([82.165.15.123]:48728 helo=s16892447.onlinehome-server.info) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gb26H-0008Rg-LO; Sun, 23 Dec 2018 06:39:17 -0500 Received: from host86-177-178-114.range86-177.btcentralplus.com ([86.177.178.114] helo=kentang.home) by s16892447.onlinehome-server.info with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.76) (envelope-from ) id 1gb26T-0000Xw-Sc; Sun, 23 Dec 2018 11:39:31 +0000 From: Mark Cave-Ayland To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org, richard.henderson@linaro.org, david@gibson.dropbear.id.au Date: Sun, 23 Dec 2018 11:38:56 +0000 Message-Id: <20181223113859.3675-4-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20181223113859.3675-1-mark.cave-ayland@ilande.co.uk> References: <20181223113859.3675-1-mark.cave-ayland@ilande.co.uk> X-SA-Exim-Connect-IP: 86.177.178.114 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk X-SA-Exim-Version: 4.2.1 (built Sun, 08 Jan 2012 02:45:44 +0000) X-SA-Exim-Scanned: Yes (on s16892447.onlinehome-server.info) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 82.165.15.123 Subject: [Qemu-devel] [PATCH 3/6] target/ppc: rework vmul{e, o}{s, u}{b, h, w} instructions to use Vsr* macros X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The current implementations make use of the endian-specific macros HI_IDX a= nd LO_IDX directly to calculate array offsets. Rework the implementation to use the Vsr* macros so that these per-endian references can be removed. Signed-off-by: Mark Cave-Ayland Reviewed-by: Richard Henderson --- target/ppc/int_helper.c | 48 +++++++++++++++++++++++++++------------------= --- 1 file changed, 27 insertions(+), 21 deletions(-) diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index f084a706ee..dc5c9fb8d8 100644 --- a/target/ppc/int_helper.c +++ b/target/ppc/int_helper.c @@ -1118,33 +1118,39 @@ void helper_vmsumuhs(CPUPPCState *env, ppc_avr_t *r= , ppc_avr_t *a, } } =20 -#define VMUL_DO(name, mul_element, prod_element, cast, evenp) \ +#define VMUL_DO_EVN(name, mul_element, mul_access, prod_access, cast) \ void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ { \ int i; \ \ - VECTOR_FOR_INORDER_I(i, prod_element) { \ - if (evenp) { \ - r->prod_element[i] =3D \ - (cast)a->mul_element[i * 2 + HI_IDX] * \ - (cast)b->mul_element[i * 2 + HI_IDX]; \ - } else { \ - r->prod_element[i] =3D \ - (cast)a->mul_element[i * 2 + LO_IDX] * \ - (cast)b->mul_element[i * 2 + LO_IDX]; \ - } \ + for (i =3D 0; i < ARRAY_SIZE(r->mul_element); i +=3D 2) { = \ + r->prod_access(i >> 1) =3D (cast)a->mul_access(i) * \ + (cast)b->mul_access(i); \ + } \ + } + +#define VMUL_DO_ODD(name, mul_element, mul_access, prod_access, cast) \ + void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ + { \ + int i; \ + \ + for (i =3D 0; i < ARRAY_SIZE(r->mul_element); i +=3D 2) { = \ + r->prod_access(i >> 1) =3D (cast)a->mul_access(i + 1) * \ + (cast)b->mul_access(i + 1); \ } \ } -#define VMUL(suffix, mul_element, prod_element, cast) \ - VMUL_DO(mule##suffix, mul_element, prod_element, cast, 1) \ - VMUL_DO(mulo##suffix, mul_element, prod_element, cast, 0) -VMUL(sb, s8, s16, int16_t) -VMUL(sh, s16, s32, int32_t) -VMUL(sw, s32, s64, int64_t) -VMUL(ub, u8, u16, uint16_t) -VMUL(uh, u16, u32, uint32_t) -VMUL(uw, u32, u64, uint64_t) -#undef VMUL_DO + +#define VMUL(suffix, mul_element, mul_access, prod_access, cast) \ + VMUL_DO_EVN(mule##suffix, mul_element, mul_access, prod_access, cast) = \ + VMUL_DO_ODD(mulo##suffix, mul_element, mul_access, prod_access, cast) +VMUL(sb, s8, VsrSB, VsrSH, int16_t) +VMUL(sh, s16, VsrSH, VsrSW, int32_t) +VMUL(sw, s32, VsrSW, VsrSD, int64_t) +VMUL(ub, u8, VsrB, VsrH, uint16_t) +VMUL(uh, u16, VsrH, VsrW, uint32_t) +VMUL(uw, u32, VsrW, VsrD, uint64_t) +#undef VMUL_DO_EVN +#undef VMUL_DO_ODD #undef VMUL =20 void helper_vperm(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t = *b, --=20 2.11.0 From nobody Fri Nov 7 02:13:34 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1545565297846612.1210693054562; Sun, 23 Dec 2018 03:41:37 -0800 (PST) Received: from localhost ([::1]:45740 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gb28W-00024d-8R for importer@patchew.org; Sun, 23 Dec 2018 06:41:36 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50517) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gb26O-0000kT-0z for qemu-devel@nongnu.org; Sun, 23 Dec 2018 06:39:25 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gb26K-00005K-2p for qemu-devel@nongnu.org; Sun, 23 Dec 2018 06:39:23 -0500 Received: from chuckie.co.uk ([82.165.15.123]:48733 helo=s16892447.onlinehome-server.info) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gb26J-0008Up-O3; Sun, 23 Dec 2018 06:39:19 -0500 Received: from host86-177-178-114.range86-177.btcentralplus.com ([86.177.178.114] helo=kentang.home) by s16892447.onlinehome-server.info with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.76) (envelope-from ) id 1gb26W-0000Xw-1B; Sun, 23 Dec 2018 11:39:34 +0000 From: Mark Cave-Ayland To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org, richard.henderson@linaro.org, david@gibson.dropbear.id.au Date: Sun, 23 Dec 2018 11:38:57 +0000 Message-Id: <20181223113859.3675-5-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20181223113859.3675-1-mark.cave-ayland@ilande.co.uk> References: <20181223113859.3675-1-mark.cave-ayland@ilande.co.uk> X-SA-Exim-Connect-IP: 86.177.178.114 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk X-SA-Exim-Version: 4.2.1 (built Sun, 08 Jan 2012 02:45:44 +0000) X-SA-Exim-Scanned: Yes (on s16892447.onlinehome-server.info) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 82.165.15.123 Subject: [Qemu-devel] [PATCH 4/6] target/ppc: eliminate use of HI_IDX and LO_IDX macros from int_helper.c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The original purpose of these macros was to correctly reference the high an= d low parts of the VSRs regardless of the host endianness. Replace these direct references to high and low parts with the relevant VsrD macro instead, and completely remove the now-unused HI_IDX and LO_IDX macro= s. Signed-off-by: Mark Cave-Ayland --- target/ppc/int_helper.c | 180 +++++++++++++++++++++++---------------------= ---- 1 file changed, 85 insertions(+), 95 deletions(-) diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index dc5c9fb8d8..addbe54c21 100644 --- a/target/ppc/int_helper.c +++ b/target/ppc/int_helper.c @@ -389,14 +389,6 @@ target_ulong helper_602_mfrom(target_ulong arg) /*************************************************************************= ****/ /* Altivec extension helpers */ #if defined(HOST_WORDS_BIGENDIAN) -#define HI_IDX 0 -#define LO_IDX 1 -#else -#define HI_IDX 1 -#define LO_IDX 0 -#endif - -#if defined(HOST_WORDS_BIGENDIAN) #define VECTOR_FOR_INORDER_I(index, element) \ for (index =3D 0; index < ARRAY_SIZE(r->element); index++) #else @@ -514,8 +506,8 @@ void helper_vprtybq(ppc_avr_t *r, ppc_avr_t *b) res ^=3D res >> 32; res ^=3D res >> 16; res ^=3D res >> 8; - r->u64[LO_IDX] =3D res & 1; - r->u64[HI_IDX] =3D 0; + r->VsrD(1) =3D res & 1; + r->VsrD(0) =3D 0; } =20 #define VARITH_DO(name, op, element) \ @@ -1243,8 +1235,8 @@ void helper_vbpermq(ppc_avr_t *r, ppc_avr_t *a, ppc_a= vr_t *b) } } =20 - r->u64[HI_IDX] =3D perm; - r->u64[LO_IDX] =3D 0; + r->VsrD(0) =3D perm; + r->VsrD(1) =3D 0; } =20 #undef VBPERMQ_INDEX @@ -1573,25 +1565,25 @@ void helper_vpmsumd(ppc_avr_t *r, ppc_avr_t *a, ppc= _avr_t *b) ppc_avr_t prod[2]; =20 VECTOR_FOR_INORDER_I(i, u64) { - prod[i].u64[LO_IDX] =3D prod[i].u64[HI_IDX] =3D 0; + prod[i].VsrD(1) =3D prod[i].VsrD(0) =3D 0; for (j =3D 0; j < 64; j++) { if (a->u64[i] & (1ull<u64[i]; + bshift.VsrD(0) =3D 0; + bshift.VsrD(1) =3D b->u64[i]; } else { - bshift.u64[HI_IDX] =3D b->u64[i] >> (64-j); - bshift.u64[LO_IDX] =3D b->u64[i] << j; + bshift.VsrD(0) =3D b->u64[i] >> (64 - j); + bshift.VsrD(1) =3D b->u64[i] << j; } - prod[i].u64[LO_IDX] ^=3D bshift.u64[LO_IDX]; - prod[i].u64[HI_IDX] ^=3D bshift.u64[HI_IDX]; + prod[i].VsrD(1) ^=3D bshift.VsrD(1); + prod[i].VsrD(0) ^=3D bshift.VsrD(0); } } } =20 - r->u64[LO_IDX] =3D prod[0].u64[LO_IDX] ^ prod[1].u64[LO_IDX]; - r->u64[HI_IDX] =3D prod[0].u64[HI_IDX] ^ prod[1].u64[HI_IDX]; + r->VsrD(1) =3D prod[0].VsrD(1) ^ prod[1].VsrD(1); + r->VsrD(0) =3D prod[0].VsrD(0) ^ prod[1].VsrD(0); #endif } =20 @@ -1809,7 +1801,7 @@ VEXTU_X_DO(vextuwrx, 32, 0) #define VSHIFT(suffix, leftp) \ void helper_vs##suffix(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ { \ - int shift =3D b->u8[LO_IDX*15] & 0x7; \ + int shift =3D b->VsrB(15) & 0x7; \ int doit =3D 1; \ int i; \ \ @@ -1820,15 +1812,15 @@ VEXTU_X_DO(vextuwrx, 32, 0) if (shift =3D=3D 0) { = \ *r =3D *a; \ } else if (leftp) { \ - uint64_t carry =3D a->u64[LO_IDX] >> (64 - shift); \ + uint64_t carry =3D a->VsrD(1) >> (64 - shift); \ \ - r->u64[HI_IDX] =3D (a->u64[HI_IDX] << shift) | carry; \ - r->u64[LO_IDX] =3D a->u64[LO_IDX] << shift; \ + r->VsrD(0) =3D (a->VsrD(0) << shift) | carry; \ + r->VsrD(1) =3D a->VsrD(1) << shift; \ } else { \ - uint64_t carry =3D a->u64[HI_IDX] << (64 - shift); \ + uint64_t carry =3D a->VsrD(0) << (64 - shift); \ \ - r->u64[LO_IDX] =3D (a->u64[LO_IDX] >> shift) | carry; \ - r->u64[HI_IDX] =3D a->u64[HI_IDX] >> shift; \ + r->VsrD(1) =3D (a->VsrD(1) >> shift) | carry; \ + r->VsrD(0) =3D a->VsrD(0) >> shift; \ } \ } \ } @@ -1914,7 +1906,7 @@ void helper_vsldoi(ppc_avr_t *r, ppc_avr_t *a, ppc_av= r_t *b, uint32_t shift) =20 void helper_vslo(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) { - int sh =3D (b->u8[LO_IDX*0xf] >> 3) & 0xf; + int sh =3D (b->VsrB(0xf) >> 3) & 0xf; =20 #if defined(HOST_WORDS_BIGENDIAN) memmove(&r->u8[0], &a->u8[sh], 16 - sh); @@ -2110,7 +2102,7 @@ VSR(d, u64, 0x3F) =20 void helper_vsro(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) { - int sh =3D (b->u8[LO_IDX * 0xf] >> 3) & 0xf; + int sh =3D (b->VsrB(0xf) >> 3) & 0xf; =20 #if defined(HOST_WORDS_BIGENDIAN) memmove(&r->u8[sh], &a->u8[0], 16 - sh); @@ -2366,13 +2358,13 @@ static inline void avr_qw_not(ppc_avr_t *t, ppc_avr= _t a) =20 static int avr_qw_cmpu(ppc_avr_t a, ppc_avr_t b) { - if (a.u64[HI_IDX] < b.u64[HI_IDX]) { + if (a.VsrD(0) < b.VsrD(0)) { return -1; - } else if (a.u64[HI_IDX] > b.u64[HI_IDX]) { + } else if (a.VsrD(0) > b.VsrD(0)) { return 1; - } else if (a.u64[LO_IDX] < b.u64[LO_IDX]) { + } else if (a.VsrD(1) < b.VsrD(1)) { return -1; - } else if (a.u64[LO_IDX] > b.u64[LO_IDX]) { + } else if (a.VsrD(1) > b.VsrD(1)) { return 1; } else { return 0; @@ -2381,17 +2373,17 @@ static int avr_qw_cmpu(ppc_avr_t a, ppc_avr_t b) =20 static void avr_qw_add(ppc_avr_t *t, ppc_avr_t a, ppc_avr_t b) { - t->u64[LO_IDX] =3D a.u64[LO_IDX] + b.u64[LO_IDX]; - t->u64[HI_IDX] =3D a.u64[HI_IDX] + b.u64[HI_IDX] + - (~a.u64[LO_IDX] < b.u64[LO_IDX]); + t->VsrD(1) =3D a.VsrD(1) + b.VsrD(1); + t->VsrD(0) =3D a.VsrD(0) + b.VsrD(0) + + (~a.VsrD(1) < b.VsrD(1)); } =20 static int avr_qw_addc(ppc_avr_t *t, ppc_avr_t a, ppc_avr_t b) { ppc_avr_t not_a; - t->u64[LO_IDX] =3D a.u64[LO_IDX] + b.u64[LO_IDX]; - t->u64[HI_IDX] =3D a.u64[HI_IDX] + b.u64[HI_IDX] + - (~a.u64[LO_IDX] < b.u64[LO_IDX]); + t->VsrD(1) =3D a.VsrD(1) + b.VsrD(1); + t->VsrD(0) =3D a.VsrD(0) + b.VsrD(0) + + (~a.VsrD(1) < b.VsrD(1)); avr_qw_not(¬_a, a); return avr_qw_cmpu(not_a, b) < 0; } @@ -2413,11 +2405,11 @@ void helper_vaddeuqm(ppc_avr_t *r, ppc_avr_t *a, pp= c_avr_t *b, ppc_avr_t *c) r->u128 =3D a->u128 + b->u128 + (c->u128 & 1); #else =20 - if (c->u64[LO_IDX] & 1) { + if (c->VsrD(1) & 1) { ppc_avr_t tmp; =20 - tmp.u64[HI_IDX] =3D 0; - tmp.u64[LO_IDX] =3D c->u64[LO_IDX] & 1; + tmp.VsrD(0) =3D 0; + tmp.VsrD(1) =3D c->VsrD(1) & 1; avr_qw_add(&tmp, *a, tmp); avr_qw_add(r, tmp, *b); } else { @@ -2435,8 +2427,8 @@ void helper_vaddcuq(ppc_avr_t *r, ppc_avr_t *a, ppc_a= vr_t *b) =20 avr_qw_not(¬_a, *a); =20 - r->u64[HI_IDX] =3D 0; - r->u64[LO_IDX] =3D (avr_qw_cmpu(not_a, *b) < 0); + r->VsrD(0) =3D 0; + r->VsrD(1) =3D (avr_qw_cmpu(not_a, *b) < 0); #endif } =20 @@ -2451,7 +2443,7 @@ void helper_vaddecuq(ppc_avr_t *r, ppc_avr_t *a, ppc_= avr_t *b, ppc_avr_t *c) r->u128 =3D carry_out; #else =20 - int carry_in =3D c->u64[LO_IDX] & 1; + int carry_in =3D c->VsrD(1) & 1; int carry_out =3D 0; ppc_avr_t tmp; =20 @@ -2461,8 +2453,8 @@ void helper_vaddecuq(ppc_avr_t *r, ppc_avr_t *a, ppc_= avr_t *b, ppc_avr_t *c) ppc_avr_t one =3D QW_ONE; carry_out =3D avr_qw_addc(&tmp, tmp, one); } - r->u64[HI_IDX] =3D 0; - r->u64[LO_IDX] =3D carry_out; + r->VsrD(0) =3D 0; + r->VsrD(1) =3D carry_out; #endif } =20 @@ -2490,8 +2482,8 @@ void helper_vsubeuqm(ppc_avr_t *r, ppc_avr_t *a, ppc_= avr_t *b, ppc_avr_t *c) avr_qw_not(&tmp, *b); avr_qw_add(&sum, *a, tmp); =20 - tmp.u64[HI_IDX] =3D 0; - tmp.u64[LO_IDX] =3D c->u64[LO_IDX] & 1; + tmp.VsrD(0) =3D 0; + tmp.VsrD(1) =3D c->VsrD(1) & 1; avr_qw_add(r, sum, tmp); #endif } @@ -2507,10 +2499,10 @@ void helper_vsubcuq(ppc_avr_t *r, ppc_avr_t *a, ppc= _avr_t *b) ppc_avr_t tmp; avr_qw_not(&tmp, *b); avr_qw_add(&tmp, *a, tmp); - carry =3D ((tmp.s64[HI_IDX] =3D=3D -1ull) && (tmp.s64[LO_IDX] =3D= =3D -1ull)); + carry =3D ((tmp.VsrSD(0) =3D=3D -1ull) && (tmp.VsrSD(1) =3D=3D -1u= ll)); } - r->u64[HI_IDX] =3D 0; - r->u64[LO_IDX] =3D carry; + r->VsrD(0) =3D 0; + r->VsrD(1) =3D carry; #endif } =20 @@ -2521,17 +2513,17 @@ void helper_vsubecuq(ppc_avr_t *r, ppc_avr_t *a, pp= c_avr_t *b, ppc_avr_t *c) (~a->u128 < ~b->u128) || ((c->u128 & 1) && (a->u128 + ~b->u128 =3D=3D (__uint128_t)-1)); #else - int carry_in =3D c->u64[LO_IDX] & 1; + int carry_in =3D c->VsrD(1) & 1; int carry_out =3D (avr_qw_cmpu(*a, *b) > 0); if (!carry_out && carry_in) { ppc_avr_t tmp; avr_qw_not(&tmp, *b); avr_qw_add(&tmp, *a, tmp); - carry_out =3D ((tmp.u64[HI_IDX] =3D=3D -1ull) && (tmp.u64[LO_IDX] = =3D=3D -1ull)); + carry_out =3D ((tmp.VsrD(0) =3D=3D -1ull) && (tmp.VsrD(1) =3D=3D -= 1ull)); } =20 - r->u64[HI_IDX] =3D 0; - r->u64[LO_IDX] =3D carry_out; + r->VsrD(0) =3D 0; + r->VsrD(1) =3D carry_out; #endif } =20 @@ -2629,7 +2621,7 @@ static bool bcd_is_valid(ppc_avr_t *bcd) =20 static int bcd_cmp_zero(ppc_avr_t *bcd) { - if (bcd->u64[HI_IDX] =3D=3D 0 && (bcd->u64[LO_IDX] >> 4) =3D=3D 0) { + if (bcd->VsrD(0) =3D=3D 0 && (bcd->VsrD(1) >> 4) =3D=3D 0) { return CRF_EQ; } else { return (bcd_get_sgn(bcd) =3D=3D 1) ? CRF_GT : CRF_LT; @@ -2749,7 +2741,7 @@ uint32_t helper_bcdadd(ppc_avr_t *r, ppc_avr_t *a, p= pc_avr_t *b, uint32_t ps) } =20 if (unlikely(invalid)) { - result.u64[HI_IDX] =3D result.u64[LO_IDX] =3D -1; + result.VsrD(0) =3D result.VsrD(1) =3D -1; cr =3D CRF_SO; } else if (overflow) { cr |=3D CRF_SO; @@ -2818,7 +2810,7 @@ uint32_t helper_bcdctn(ppc_avr_t *r, ppc_avr_t *b, ui= nt32_t ps) int invalid =3D (sgnb =3D=3D 0); ppc_avr_t ret =3D { .u64 =3D { 0, 0 } }; =20 - int ox_flag =3D (b->u64[HI_IDX] !=3D 0) || ((b->u64[LO_IDX] >> 32) != =3D 0); + int ox_flag =3D (b->VsrD(0) !=3D 0) || ((b->VsrD(1) >> 32) !=3D 0); =20 for (i =3D 1; i < 8; i++) { set_national_digit(&ret, 0x30 + bcd_get_digit(b, i, &invalid), i); @@ -2898,7 +2890,7 @@ uint32_t helper_bcdctz(ppc_avr_t *r, ppc_avr_t *b, ui= nt32_t ps) int invalid =3D (sgnb =3D=3D 0); ppc_avr_t ret =3D { .u64 =3D { 0, 0 } }; =20 - int ox_flag =3D ((b->u64[HI_IDX] >> 4) !=3D 0); + int ox_flag =3D ((b->VsrD(0) >> 4) !=3D 0); =20 for (i =3D 0; i < 16; i++) { digit =3D bcd_get_digit(b, i + 1, &invalid); @@ -2939,13 +2931,13 @@ uint32_t helper_bcdcfsq(ppc_avr_t *r, ppc_avr_t *b,= uint32_t ps) uint64_t hi_value; ppc_avr_t ret =3D { .u64 =3D { 0, 0 } }; =20 - if (b->s64[HI_IDX] < 0) { - lo_value =3D -b->s64[LO_IDX]; - hi_value =3D ~b->u64[HI_IDX] + !lo_value; + if (b->VsrSD(0) < 0) { + lo_value =3D -b->VsrSD(1); + hi_value =3D ~b->VsrD(0) + !lo_value; bcd_put_digit(&ret, 0xD, 0); } else { - lo_value =3D b->u64[LO_IDX]; - hi_value =3D b->u64[HI_IDX]; + lo_value =3D b->VsrD(1); + hi_value =3D b->VsrD(0); bcd_put_digit(&ret, bcd_preferred_sgn(0, ps), 0); } =20 @@ -2993,11 +2985,11 @@ uint32_t helper_bcdctsq(ppc_avr_t *r, ppc_avr_t *b,= uint32_t ps) } =20 if (sgnb =3D=3D -1) { - r->s64[LO_IDX] =3D -lo_value; - r->s64[HI_IDX] =3D ~hi_value + !r->s64[LO_IDX]; + r->VsrSD(1) =3D -lo_value; + r->VsrSD(0) =3D ~hi_value + !r->VsrSD(1); } else { - r->s64[LO_IDX] =3D lo_value; - r->s64[HI_IDX] =3D hi_value; + r->VsrSD(1) =3D lo_value; + r->VsrSD(0) =3D hi_value; } =20 cr =3D bcd_cmp_zero(b); @@ -3057,7 +3049,7 @@ uint32_t helper_bcds(ppc_avr_t *r, ppc_avr_t *a, ppc_= avr_t *b, uint32_t ps) bool ox_flag =3D false; int sgnb =3D bcd_get_sgn(b); ppc_avr_t ret =3D *b; - ret.u64[LO_IDX] &=3D ~0xf; + ret.VsrD(1) &=3D ~0xf; =20 if (bcd_is_valid(b) =3D=3D false) { return CRF_SO; @@ -3070,9 +3062,9 @@ uint32_t helper_bcds(ppc_avr_t *r, ppc_avr_t *a, ppc_= avr_t *b, uint32_t ps) } =20 if (i > 0) { - ulshift(&ret.u64[LO_IDX], &ret.u64[HI_IDX], i * 4, &ox_flag); + ulshift(&ret.VsrD(1), &ret.VsrD(0), i * 4, &ox_flag); } else { - urshift(&ret.u64[LO_IDX], &ret.u64[HI_IDX], -i * 4); + urshift(&ret.VsrD(1), &ret.VsrD(0), -i * 4); } bcd_put_digit(&ret, bcd_preferred_sgn(sgnb, ps), 0); =20 @@ -3109,13 +3101,13 @@ uint32_t helper_bcdus(ppc_avr_t *r, ppc_avr_t *a, p= pc_avr_t *b, uint32_t ps) #endif if (i >=3D 32) { ox_flag =3D true; - ret.u64[LO_IDX] =3D ret.u64[HI_IDX] =3D 0; + ret.VsrD(1) =3D ret.VsrD(0) =3D 0; } else if (i <=3D -32) { - ret.u64[LO_IDX] =3D ret.u64[HI_IDX] =3D 0; + ret.VsrD(1) =3D ret.VsrD(0) =3D 0; } else if (i > 0) { - ulshift(&ret.u64[LO_IDX], &ret.u64[HI_IDX], i * 4, &ox_flag); + ulshift(&ret.VsrD(1), &ret.VsrD(0), i * 4, &ox_flag); } else { - urshift(&ret.u64[LO_IDX], &ret.u64[HI_IDX], -i * 4); + urshift(&ret.VsrD(1), &ret.VsrD(0), -i * 4); } *r =3D ret; =20 @@ -3135,7 +3127,7 @@ uint32_t helper_bcdsr(ppc_avr_t *r, ppc_avr_t *a, ppc= _avr_t *b, uint32_t ps) bool ox_flag =3D false; int sgnb =3D bcd_get_sgn(b); ppc_avr_t ret =3D *b; - ret.u64[LO_IDX] &=3D ~0xf; + ret.VsrD(1) &=3D ~0xf; =20 #if defined(HOST_WORDS_BIGENDIAN) int i =3D a->s8[7]; @@ -3156,9 +3148,9 @@ uint32_t helper_bcdsr(ppc_avr_t *r, ppc_avr_t *a, ppc= _avr_t *b, uint32_t ps) } =20 if (i > 0) { - ulshift(&ret.u64[LO_IDX], &ret.u64[HI_IDX], i * 4, &ox_flag); + ulshift(&ret.VsrD(1), &ret.VsrD(0), i * 4, &ox_flag); } else { - urshift(&ret.u64[LO_IDX], &ret.u64[HI_IDX], -i * 4); + urshift(&ret.VsrD(1), &ret.VsrD(0), -i * 4); =20 if (bcd_get_digit(&ret, 0, &invalid) >=3D 5) { bcd_add_mag(&ret, &ret, &bcd_one, &invalid, &unused); @@ -3192,19 +3184,19 @@ uint32_t helper_bcdtrunc(ppc_avr_t *r, ppc_avr_t *a= , ppc_avr_t *b, uint32_t ps) =20 if (i > 16 && i < 32) { mask =3D (uint64_t)-1 >> (128 - i * 4); - if (ret.u64[HI_IDX] & ~mask) { + if (ret.VsrD(0) & ~mask) { ox_flag =3D CRF_SO; } =20 - ret.u64[HI_IDX] &=3D mask; + ret.VsrD(0) &=3D mask; } else if (i >=3D 0 && i <=3D 16) { mask =3D (uint64_t)-1 >> (64 - i * 4); - if (ret.u64[HI_IDX] || (ret.u64[LO_IDX] & ~mask)) { + if (ret.VsrD(0) || (ret.VsrD(1) & ~mask)) { ox_flag =3D CRF_SO; } =20 - ret.u64[LO_IDX] &=3D mask; - ret.u64[HI_IDX] =3D 0; + ret.VsrD(1) &=3D mask; + ret.VsrD(0) =3D 0; } bcd_put_digit(&ret, bcd_preferred_sgn(bcd_get_sgn(b), ps), 0); *r =3D ret; @@ -3235,28 +3227,28 @@ uint32_t helper_bcdutrunc(ppc_avr_t *r, ppc_avr_t *= a, ppc_avr_t *b, uint32_t ps) #endif if (i > 16 && i < 33) { mask =3D (uint64_t)-1 >> (128 - i * 4); - if (ret.u64[HI_IDX] & ~mask) { + if (ret.VsrD(0) & ~mask) { ox_flag =3D CRF_SO; } =20 - ret.u64[HI_IDX] &=3D mask; + ret.VsrD(0) &=3D mask; } else if (i > 0 && i <=3D 16) { mask =3D (uint64_t)-1 >> (64 - i * 4); - if (ret.u64[HI_IDX] || (ret.u64[LO_IDX] & ~mask)) { + if (ret.VsrD(0) || (ret.VsrD(1) & ~mask)) { ox_flag =3D CRF_SO; } =20 - ret.u64[LO_IDX] &=3D mask; - ret.u64[HI_IDX] =3D 0; + ret.VsrD(1) &=3D mask; + ret.VsrD(0) =3D 0; } else if (i =3D=3D 0) { - if (ret.u64[HI_IDX] || ret.u64[LO_IDX]) { + if (ret.VsrD(0) || ret.VsrD(1)) { ox_flag =3D CRF_SO; } - ret.u64[HI_IDX] =3D ret.u64[LO_IDX] =3D 0; + ret.VsrD(0) =3D ret.VsrD(1) =3D 0; } =20 *r =3D ret; - if (r->u64[HI_IDX] =3D=3D 0 && r->u64[LO_IDX] =3D=3D 0) { + if (r->VsrD(0) =3D=3D 0 && r->VsrD(1) =3D=3D 0) { return ox_flag | CRF_EQ; } =20 @@ -3428,8 +3420,6 @@ void helper_vpermxor(ppc_avr_t *r, ppc_avr_t *a, ppc= _avr_t *b, ppc_avr_t *c) } =20 #undef VECTOR_FOR_INORDER_I -#undef HI_IDX -#undef LO_IDX =20 /*************************************************************************= ****/ /* SPE extension helpers */ --=20 2.11.0 From nobody Fri Nov 7 02:13:34 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1545565431821579.0961278216973; Sun, 23 Dec 2018 03:43:51 -0800 (PST) Received: from localhost ([::1]:49243 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gb2Ag-0004Rz-Et for importer@patchew.org; Sun, 23 Dec 2018 06:43:50 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50541) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gb26Q-0000mR-0T for qemu-devel@nongnu.org; Sun, 23 Dec 2018 06:39:33 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gb26O-0000B8-14 for qemu-devel@nongnu.org; Sun, 23 Dec 2018 06:39:25 -0500 Received: from chuckie.co.uk ([82.165.15.123]:48736 helo=s16892447.onlinehome-server.info) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gb26L-00005k-Vs; Sun, 23 Dec 2018 06:39:23 -0500 Received: from host86-177-178-114.range86-177.btcentralplus.com ([86.177.178.114] helo=kentang.home) by s16892447.onlinehome-server.info with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.76) (envelope-from ) id 1gb26Z-0000Xw-2Z; Sun, 23 Dec 2018 11:39:36 +0000 From: Mark Cave-Ayland To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org, richard.henderson@linaro.org, david@gibson.dropbear.id.au Date: Sun, 23 Dec 2018 11:38:58 +0000 Message-Id: <20181223113859.3675-6-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20181223113859.3675-1-mark.cave-ayland@ilande.co.uk> References: <20181223113859.3675-1-mark.cave-ayland@ilande.co.uk> X-SA-Exim-Connect-IP: 86.177.178.114 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk X-SA-Exim-Version: 4.2.1 (built Sun, 08 Jan 2012 02:45:44 +0000) X-SA-Exim-Scanned: Yes (on s16892447.onlinehome-server.info) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 82.165.15.123 Subject: [Qemu-devel] [PATCH 5/6] target/ppc: eliminate use of EL_IDX macros from int_helper.c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" These macros can be eliminated by instead using the relavant Vsr* macros in the few locations where they appear. Signed-off-by: Mark Cave-Ayland Reviewed-by: Richard Henderson --- target/ppc/int_helper.c | 66 ++++++++++++++++++++-------------------------= ---- 1 file changed, 27 insertions(+), 39 deletions(-) diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index addbe54c21..4cc7fdfd25 100644 --- a/target/ppc/int_helper.c +++ b/target/ppc/int_helper.c @@ -3320,12 +3320,7 @@ void helper_vncipherlast(ppc_avr_t *r, ppc_avr_t *a,= ppc_avr_t *b) *r =3D result; } =20 -#define ROTRu32(v, n) (((v) >> (n)) | ((v) << (32-n))) -#if defined(HOST_WORDS_BIGENDIAN) -#define EL_IDX(i) (i) -#else -#define EL_IDX(i) (3 - (i)) -#endif +#define ROTRu32(v, n) (((v) >> (n)) | ((v) << (32 - n))) =20 void helper_vshasigmaw(ppc_avr_t *r, ppc_avr_t *a, uint32_t st_six) { @@ -3333,40 +3328,34 @@ void helper_vshasigmaw(ppc_avr_t *r, ppc_avr_t *a,= uint32_t st_six) int six =3D st_six & 0xF; int i; =20 - VECTOR_FOR_INORDER_I(i, u32) { + for (i =3D 0; i < ARRAY_SIZE(r->u32); i++) { if (st =3D=3D 0) { if ((six & (0x8 >> i)) =3D=3D 0) { - r->u32[EL_IDX(i)] =3D ROTRu32(a->u32[EL_IDX(i)], 7) ^ - ROTRu32(a->u32[EL_IDX(i)], 18) ^ - (a->u32[EL_IDX(i)] >> 3); + r->VsrW(i) =3D ROTRu32(a->VsrW(i), 7) ^ + ROTRu32(a->VsrW(i), 18) ^ + (a->VsrW(i) >> 3); } else { /* six.bit[i] =3D=3D 1 */ - r->u32[EL_IDX(i)] =3D ROTRu32(a->u32[EL_IDX(i)], 17) ^ - ROTRu32(a->u32[EL_IDX(i)], 19) ^ - (a->u32[EL_IDX(i)] >> 10); + r->VsrW(i) =3D ROTRu32(a->VsrW(i), 17) ^ + ROTRu32(a->VsrW(i), 19) ^ + (a->VsrW(i) >> 10); } } else { /* st =3D=3D 1 */ if ((six & (0x8 >> i)) =3D=3D 0) { - r->u32[EL_IDX(i)] =3D ROTRu32(a->u32[EL_IDX(i)], 2) ^ - ROTRu32(a->u32[EL_IDX(i)], 13) ^ - ROTRu32(a->u32[EL_IDX(i)], 22); + r->VsrW(i) =3D ROTRu32(a->VsrW(i), 2) ^ + ROTRu32(a->VsrW(i), 13) ^ + ROTRu32(a->VsrW(i), 22); } else { /* six.bit[i] =3D=3D 1 */ - r->u32[EL_IDX(i)] =3D ROTRu32(a->u32[EL_IDX(i)], 6) ^ - ROTRu32(a->u32[EL_IDX(i)], 11) ^ - ROTRu32(a->u32[EL_IDX(i)], 25); + r->VsrW(i) =3D ROTRu32(a->VsrW(i), 6) ^ + ROTRu32(a->VsrW(i), 11) ^ + ROTRu32(a->VsrW(i), 25); } } } } =20 #undef ROTRu32 -#undef EL_IDX =20 #define ROTRu64(v, n) (((v) >> (n)) | ((v) << (64-n))) -#if defined(HOST_WORDS_BIGENDIAN) -#define EL_IDX(i) (i) -#else -#define EL_IDX(i) (1 - (i)) -#endif =20 void helper_vshasigmad(ppc_avr_t *r, ppc_avr_t *a, uint32_t st_six) { @@ -3374,33 +3363,32 @@ void helper_vshasigmad(ppc_avr_t *r, ppc_avr_t *a,= uint32_t st_six) int six =3D st_six & 0xF; int i; =20 - VECTOR_FOR_INORDER_I(i, u64) { + for (i =3D 0; i < ARRAY_SIZE(r->u64); i++) { if (st =3D=3D 0) { if ((six & (0x8 >> (2*i))) =3D=3D 0) { - r->u64[EL_IDX(i)] =3D ROTRu64(a->u64[EL_IDX(i)], 1) ^ - ROTRu64(a->u64[EL_IDX(i)], 8) ^ - (a->u64[EL_IDX(i)] >> 7); + r->VsrD(i) =3D ROTRu64(a->VsrD(i), 1) ^ + ROTRu64(a->VsrD(i), 8) ^ + (a->VsrD(i) >> 7); } else { /* six.bit[2*i] =3D=3D 1 */ - r->u64[EL_IDX(i)] =3D ROTRu64(a->u64[EL_IDX(i)], 19) ^ - ROTRu64(a->u64[EL_IDX(i)], 61) ^ - (a->u64[EL_IDX(i)] >> 6); + r->VsrD(i) =3D ROTRu64(a->VsrD(i), 19) ^ + ROTRu64(a->VsrD(i), 61) ^ + (a->VsrD(i) >> 6); } } else { /* st =3D=3D 1 */ if ((six & (0x8 >> (2*i))) =3D=3D 0) { - r->u64[EL_IDX(i)] =3D ROTRu64(a->u64[EL_IDX(i)], 28) ^ - ROTRu64(a->u64[EL_IDX(i)], 34) ^ - ROTRu64(a->u64[EL_IDX(i)], 39); + r->VsrD(i) =3D ROTRu64(a->VsrD(i), 28) ^ + ROTRu64(a->VsrD(i), 34) ^ + ROTRu64(a->VsrD(i), 39); } else { /* six.bit[2*i] =3D=3D 1 */ - r->u64[EL_IDX(i)] =3D ROTRu64(a->u64[EL_IDX(i)], 14) ^ - ROTRu64(a->u64[EL_IDX(i)], 18) ^ - ROTRu64(a->u64[EL_IDX(i)], 41); + r->VsrD(i) =3D ROTRu64(a->VsrD(i), 14) ^ + ROTRu64(a->VsrD(i), 18) ^ + ROTRu64(a->VsrD(i), 41); } } } } =20 #undef ROTRu64 -#undef EL_IDX =20 void helper_vpermxor(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t = *c) { --=20 2.11.0 From nobody Fri Nov 7 02:13:34 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1545565516382979.3480227975849; Sun, 23 Dec 2018 03:45:16 -0800 (PST) Received: from localhost ([::1]:50809 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gb2C2-0005LG-Sw for importer@patchew.org; Sun, 23 Dec 2018 06:45:14 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50632) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gb26V-0000qk-Ly for qemu-devel@nongnu.org; Sun, 23 Dec 2018 06:39:33 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gb26T-0000GN-S4 for qemu-devel@nongnu.org; Sun, 23 Dec 2018 06:39:31 -0500 Received: from chuckie.co.uk ([82.165.15.123]:48742 helo=s16892447.onlinehome-server.info) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gb26S-00009r-0f; Sun, 23 Dec 2018 06:39:28 -0500 Received: from host86-177-178-114.range86-177.btcentralplus.com ([86.177.178.114] helo=kentang.home) by s16892447.onlinehome-server.info with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.76) (envelope-from ) id 1gb26a-0000Xw-L6; Sun, 23 Dec 2018 11:39:39 +0000 From: Mark Cave-Ayland To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org, richard.henderson@linaro.org, david@gibson.dropbear.id.au Date: Sun, 23 Dec 2018 11:38:59 +0000 Message-Id: <20181223113859.3675-7-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20181223113859.3675-1-mark.cave-ayland@ilande.co.uk> References: <20181223113859.3675-1-mark.cave-ayland@ilande.co.uk> X-SA-Exim-Connect-IP: 86.177.178.114 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk X-SA-Exim-Version: 4.2.1 (built Sun, 08 Jan 2012 02:45:44 +0000) X-SA-Exim-Scanned: Yes (on s16892447.onlinehome-server.info) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 82.165.15.123 Subject: [Qemu-devel] [PATCH 6/6] target/ppc: remove various HOST_WORDS_BIGENDIAN hacks in int_helper.c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Following on from the previous work, there are numerous endian-related hacks in int_helper.c that can now be replaced with Vsr* macros. Signed-off-by: Mark Cave-Ayland --- target/ppc/int_helper.c | 205 +++++++++++++++++---------------------------= ---- 1 file changed, 70 insertions(+), 135 deletions(-) diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index 4cc7fdfd25..0d97eb9383 100644 --- a/target/ppc/int_helper.c +++ b/target/ppc/int_helper.c @@ -443,8 +443,8 @@ void helper_lvsl(ppc_avr_t *r, target_ulong sh) { int i, j =3D (sh & 0xf); =20 - VECTOR_FOR_INORDER_I(i, u8) { - r->u8[i] =3D j++; + for (i =3D 0; i < ARRAY_SIZE(r->u8); i++) { + r->VsrB(i) =3D j++; } } =20 @@ -452,18 +452,14 @@ void helper_lvsr(ppc_avr_t *r, target_ulong sh) { int i, j =3D 0x10 - (sh & 0xf); =20 - VECTOR_FOR_INORDER_I(i, u8) { - r->u8[i] =3D j++; + for (i =3D 0; i < ARRAY_SIZE(r->u8); i++) { + r->VsrB(i) =3D j++; } } =20 void helper_mtvscr(CPUPPCState *env, ppc_avr_t *r) { -#if defined(HOST_WORDS_BIGENDIAN) - env->vscr =3D r->u32[3]; -#else - env->vscr =3D r->u32[0]; -#endif + env->vscr =3D r->VsrW(3); set_flush_to_zero(vscr_nj, &env->vec_status); } =20 @@ -870,8 +866,8 @@ target_ulong helper_vclzlsbb(ppc_avr_t *r) { target_ulong count =3D 0; int i; - VECTOR_FOR_INORDER_I(i, u8) { - if (r->u8[i] & 0x01) { + for (i =3D 0; i < ARRAY_SIZE(r->u8); i++) { + if (r->VsrB(i) & 0x01) { break; } count++; @@ -883,12 +879,8 @@ target_ulong helper_vctzlsbb(ppc_avr_t *r) { target_ulong count =3D 0; int i; -#if defined(HOST_WORDS_BIGENDIAN) for (i =3D ARRAY_SIZE(r->u8) - 1; i >=3D 0; i--) { -#else - for (i =3D 0; i < ARRAY_SIZE(r->u8); i++) { -#endif - if (r->u8[i] & 0x01) { + if (r->VsrB(i) & 0x01) { break; } count++; @@ -1151,18 +1143,14 @@ void helper_vperm(CPUPPCState *env, ppc_avr_t *r, p= pc_avr_t *a, ppc_avr_t *b, ppc_avr_t result; int i; =20 - VECTOR_FOR_INORDER_I(i, u8) { - int s =3D c->u8[i] & 0x1f; -#if defined(HOST_WORDS_BIGENDIAN) + for (i =3D 0; i < ARRAY_SIZE(r->u8); i++) { + int s =3D c->VsrB(i) & 0x1f; int index =3D s & 0xf; -#else - int index =3D 15 - (s & 0xf); -#endif =20 if (s & 0x10) { - result.u8[i] =3D b->u8[index]; + result.VsrB(i) =3D b->VsrB(index); } else { - result.u8[i] =3D a->u8[index]; + result.VsrB(i) =3D a->VsrB(index); } } *r =3D result; @@ -1174,18 +1162,14 @@ void helper_vpermr(CPUPPCState *env, ppc_avr_t *r, = ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t result; int i; =20 - VECTOR_FOR_INORDER_I(i, u8) { - int s =3D c->u8[i] & 0x1f; -#if defined(HOST_WORDS_BIGENDIAN) + for (i =3D 0; i < ARRAY_SIZE(r->u8); i++) { + int s =3D c->VsrB(i) & 0x1f; int index =3D 15 - (s & 0xf); -#else - int index =3D s & 0xf; -#endif =20 if (s & 0x10) { - result.u8[i] =3D a->u8[index]; + result.VsrB(i) =3D a->VsrB(index); } else { - result.u8[i] =3D b->u8[index]; + result.VsrB(i) =3D b->VsrB(index); } } *r =3D result; @@ -1882,25 +1866,14 @@ void helper_vsldoi(ppc_avr_t *r, ppc_avr_t *a, ppc_= avr_t *b, uint32_t shift) int i; ppc_avr_t result; =20 -#if defined(HOST_WORDS_BIGENDIAN) for (i =3D 0; i < ARRAY_SIZE(r->u8); i++) { int index =3D sh + i; if (index > 0xf) { - result.u8[i] =3D b->u8[index - 0x10]; - } else { - result.u8[i] =3D a->u8[index]; - } - } -#else - for (i =3D 0; i < ARRAY_SIZE(r->u8); i++) { - int index =3D (16 - sh) + i; - if (index > 0xf) { - result.u8[i] =3D a->u8[index - 0x10]; + result.VsrB(i) =3D b->VsrB(index - 0x10); } else { - result.u8[i] =3D b->u8[index]; + result.VsrB(i) =3D a->VsrB(index); } } -#endif *r =3D result; } =20 @@ -1919,25 +1892,20 @@ void helper_vslo(ppc_avr_t *r, ppc_avr_t *a, ppc_av= r_t *b) =20 /* Experimental testing shows that hardware masks the immediate. */ #define _SPLAT_MASKED(element) (splat & (ARRAY_SIZE(r->element) - 1)) -#if defined(HOST_WORDS_BIGENDIAN) #define SPLAT_ELEMENT(element) _SPLAT_MASKED(element) -#else -#define SPLAT_ELEMENT(element) \ - (ARRAY_SIZE(r->element) - 1 - _SPLAT_MASKED(element)) -#endif -#define VSPLT(suffix, element) \ +#define VSPLT(suffix, element, access) \ void helper_vsplt##suffix(ppc_avr_t *r, ppc_avr_t *b, uint32_t splat) \ { \ - uint32_t s =3D b->element[SPLAT_ELEMENT(element)]; \ + uint32_t s =3D b->access(SPLAT_ELEMENT(element)); \ int i; \ \ for (i =3D 0; i < ARRAY_SIZE(r->element); i++) { \ - r->element[i] =3D s; \ + r->access(i) =3D s; \ } \ } -VSPLT(b, u8) -VSPLT(h, u16) -VSPLT(w, u32) +VSPLT(b, u8, VsrB) +VSPLT(h, u16, VsrH) +VSPLT(w, u32, VsrW) #undef VSPLT #undef SPLAT_ELEMENT #undef _SPLAT_MASKED @@ -1998,17 +1966,10 @@ void helper_xxextractuw(CPUPPCState *env, target_ul= ong xtn, getVSR(xbn, &xb, env); memset(&xt, 0, sizeof(xt)); =20 -#if defined(HOST_WORDS_BIGENDIAN) ext_index =3D index; for (i =3D 0; i < es; i++, ext_index++) { - xt.u8[8 - es + i] =3D xb.u8[ext_index % 16]; - } -#else - ext_index =3D 15 - index; - for (i =3D es - 1; i >=3D 0; i--, ext_index--) { - xt.u8[8 + i] =3D xb.u8[ext_index % 16]; + xt.VsrB(8 - es + i) =3D xb.VsrB(ext_index % 16); } -#endif =20 putVSR(xtn, &xt, env); } @@ -2023,46 +1984,39 @@ void helper_xxinsertw(CPUPPCState *env, target_ulon= g xtn, getVSR(xbn, &xb, env); getVSR(xtn, &xt, env); =20 -#if defined(HOST_WORDS_BIGENDIAN) ins_index =3D index; for (i =3D 0; i < es && ins_index < 16; i++, ins_index++) { - xt.u8[ins_index] =3D xb.u8[8 - es + i]; - } -#else - ins_index =3D 15 - index; - for (i =3D es - 1; i >=3D 0 && ins_index >=3D 0; i--, ins_index--) { - xt.u8[ins_index] =3D xb.u8[8 + i]; + xt.VsrB(ins_index) =3D xb.VsrB(8 - es + i); } -#endif =20 putVSR(xtn, &xt, env); } =20 -#define VEXT_SIGNED(name, element, mask, cast, recast) \ +#define VEXT_SIGNED(name, element, access, mask, cast, recast) \ void helper_##name(ppc_avr_t *r, ppc_avr_t *b) \ { \ int i; \ - VECTOR_FOR_INORDER_I(i, element) { \ - r->element[i] =3D (recast)((cast)(b->element[i] & mask)); \ + for (i =3D 0; i < ARRAY_SIZE(r->element); i++) { \ + r->access(i) =3D (recast)((cast)(b->access(i) & mask)); \ } \ } -VEXT_SIGNED(vextsb2w, s32, UINT8_MAX, int8_t, int32_t) -VEXT_SIGNED(vextsb2d, s64, UINT8_MAX, int8_t, int64_t) -VEXT_SIGNED(vextsh2w, s32, UINT16_MAX, int16_t, int32_t) -VEXT_SIGNED(vextsh2d, s64, UINT16_MAX, int16_t, int64_t) -VEXT_SIGNED(vextsw2d, s64, UINT32_MAX, int32_t, int64_t) +VEXT_SIGNED(vextsb2w, s32, VsrSW, UINT8_MAX, int8_t, int32_t) +VEXT_SIGNED(vextsb2d, s64, VsrSD, UINT8_MAX, int8_t, int64_t) +VEXT_SIGNED(vextsh2w, s32, VsrSW, UINT16_MAX, int16_t, int32_t) +VEXT_SIGNED(vextsh2d, s64, VsrSD, UINT16_MAX, int16_t, int64_t) +VEXT_SIGNED(vextsw2d, s64, VsrSD, UINT32_MAX, int32_t, int64_t) #undef VEXT_SIGNED =20 -#define VNEG(name, element) \ +#define VNEG(name, element, access) \ void helper_##name(ppc_avr_t *r, ppc_avr_t *b) \ { \ int i; \ - VECTOR_FOR_INORDER_I(i, element) { \ - r->element[i] =3D -b->element[i]; \ + for (i =3D 0; i < ARRAY_SIZE(r->element); i++) { \ + r->access(i) =3D -b->access(i); \ } \ } -VNEG(vnegw, s32) -VNEG(vnegd, s64) +VNEG(vnegw, s32, VsrSW) +VNEG(vnegd, s64, VsrSD) #undef VNEG =20 #define VSPLTI(suffix, element, splat_type) \ @@ -2129,17 +2083,13 @@ void helper_vsumsws(CPUPPCState *env, ppc_avr_t *r,= ppc_avr_t *a, ppc_avr_t *b) ppc_avr_t result; int sat =3D 0; =20 -#if defined(HOST_WORDS_BIGENDIAN) - upper =3D ARRAY_SIZE(r->s32)-1; -#else - upper =3D 0; -#endif - t =3D (int64_t)b->s32[upper]; + upper =3D ARRAY_SIZE(r->s32) - 1; + t =3D (int64_t)b->VsrSW(upper); for (i =3D 0; i < ARRAY_SIZE(r->s32); i++) { - t +=3D a->s32[i]; - result.s32[i] =3D 0; + t +=3D a->VsrSW(i); + result.VsrSW(i) =3D 0; } - result.s32[upper] =3D cvtsdsw(t, &sat); + result.VsrSW(upper) =3D cvtsdsw(t, &sat); *r =3D result; =20 if (sat) { @@ -2153,19 +2103,15 @@ void helper_vsum2sws(CPUPPCState *env, ppc_avr_t *r= , ppc_avr_t *a, ppc_avr_t *b) ppc_avr_t result; int sat =3D 0; =20 -#if defined(HOST_WORDS_BIGENDIAN) upper =3D 1; -#else - upper =3D 0; -#endif for (i =3D 0; i < ARRAY_SIZE(r->u64); i++) { - int64_t t =3D (int64_t)b->s32[upper + i * 2]; + int64_t t =3D (int64_t)b->VsrSW(upper + i * 2); =20 - result.u64[i] =3D 0; + result.VsrW(i) =3D 0; for (j =3D 0; j < ARRAY_SIZE(r->u64); j++) { - t +=3D a->s32[2 * i + j]; + t +=3D a->VsrSW(2 * i + j); } - result.s32[upper + i * 2] =3D cvtsdsw(t, &sat); + result.VsrSW(upper + i * 2) =3D cvtsdsw(t, &sat); } =20 *r =3D result; @@ -2285,13 +2231,13 @@ VUPK(lsw, s64, s32, UPKLO) #undef UPKHI #undef UPKLO =20 -#define VGENERIC_DO(name, element) \ +#define VGENERIC_DO(name, element, access) \ void helper_v##name(ppc_avr_t *r, ppc_avr_t *b) \ { \ int i; \ \ - VECTOR_FOR_INORDER_I(i, element) { \ - r->element[i] =3D name(b->element[i]); \ + for (i =3D 0; i < ARRAY_SIZE(r->element); i++) { \ + r->access(i) =3D name(b->access(i)); \ } \ } =20 @@ -2300,10 +2246,10 @@ VUPK(lsw, s64, s32, UPKLO) #define clzw(v) clz32((v)) #define clzd(v) clz64((v)) =20 -VGENERIC_DO(clzb, u8) -VGENERIC_DO(clzh, u16) -VGENERIC_DO(clzw, u32) -VGENERIC_DO(clzd, u64) +VGENERIC_DO(clzb, u8, VsrB) +VGENERIC_DO(clzh, u16, VsrH) +VGENERIC_DO(clzw, u32, VsrW) +VGENERIC_DO(clzd, u64, VsrD) =20 #undef clzb #undef clzh @@ -2315,10 +2261,10 @@ VGENERIC_DO(clzd, u64) #define ctzw(v) ctz32((v)) #define ctzd(v) ctz64((v)) =20 -VGENERIC_DO(ctzb, u8) -VGENERIC_DO(ctzh, u16) -VGENERIC_DO(ctzw, u32) -VGENERIC_DO(ctzd, u64) +VGENERIC_DO(ctzb, u8, VsrB) +VGENERIC_DO(ctzh, u16, VsrH) +VGENERIC_DO(ctzw, u32, VsrW) +VGENERIC_DO(ctzd, u64, VsrD) =20 #undef ctzb #undef ctzh @@ -2330,10 +2276,10 @@ VGENERIC_DO(ctzd, u64) #define popcntw(v) ctpop32(v) #define popcntd(v) ctpop64(v) =20 -VGENERIC_DO(popcntb, u8) -VGENERIC_DO(popcnth, u16) -VGENERIC_DO(popcntw, u32) -VGENERIC_DO(popcntd, u64) +VGENERIC_DO(popcntb, u8, VsrB) +VGENERIC_DO(popcnth, u16, VsrH) +VGENERIC_DO(popcntw, u32, VsrW) +VGENERIC_DO(popcntd, u64, VsrD) =20 #undef popcntb #undef popcnth @@ -2630,20 +2576,12 @@ static int bcd_cmp_zero(ppc_avr_t *bcd) =20 static uint16_t get_national_digit(ppc_avr_t *reg, int n) { -#if defined(HOST_WORDS_BIGENDIAN) - return reg->u16[7 - n]; -#else - return reg->u16[n]; -#endif + return reg->VsrH(7 - n); } =20 static void set_national_digit(ppc_avr_t *reg, uint8_t val, int n) { -#if defined(HOST_WORDS_BIGENDIAN) - reg->u16[7 - n] =3D val; -#else - reg->u16[n] =3D val; -#endif + reg->VsrH(7 - n) =3D val; } =20 static int bcd_cmp_mag(ppc_avr_t *a, ppc_avr_t *b) @@ -3395,14 +3333,11 @@ void helper_vpermxor(ppc_avr_t *r, ppc_avr_t *a, p= pc_avr_t *b, ppc_avr_t *c) ppc_avr_t result; int i; =20 - VECTOR_FOR_INORDER_I(i, u8) { - int indexA =3D c->u8[i] >> 4; - int indexB =3D c->u8[i] & 0xF; -#if defined(HOST_WORDS_BIGENDIAN) - result.u8[i] =3D a->u8[indexA] ^ b->u8[indexB]; -#else - result.u8[i] =3D a->u8[15-indexA] ^ b->u8[15-indexB]; -#endif + for (i =3D 0; i < ARRAY_SIZE(r->u8); i++) { + int indexA =3D c->VsrB(i) >> 4; + int indexB =3D c->VsrB(i) & 0xF; + + result.VsrB(i) =3D a->VsrB(indexA) ^ b->VsrB(indexB); } *r =3D result; } --=20 2.11.0