From nobody Fri Nov 7 04:06:16 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1545564111608120.36845216075562; Sun, 23 Dec 2018 03:21:51 -0800 (PST) Received: from localhost ([::1]:36202 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gb1pO-0002io-3A for importer@patchew.org; Sun, 23 Dec 2018 06:21:50 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38864) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gb1ju-0006yC-CN for qemu-devel@nongnu.org; Sun, 23 Dec 2018 06:16:14 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gb1jr-0006D5-7F for qemu-devel@nongnu.org; Sun, 23 Dec 2018 06:16:10 -0500 Received: from chuckie.co.uk ([82.165.15.123]:48634 helo=s16892447.onlinehome-server.info) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gb1jq-0006CZ-TH; Sun, 23 Dec 2018 06:16:07 -0500 Received: from host86-177-178-114.range86-177.btcentralplus.com ([86.177.178.114] helo=kentang.home) by s16892447.onlinehome-server.info with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.76) (envelope-from ) id 1gb1k4-0000RC-DR; Sun, 23 Dec 2018 11:16:22 +0000 From: Mark Cave-Ayland To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org, richard.henderson@linaro.org, david@gibson.dropbear.id.au Date: Sun, 23 Dec 2018 11:15:23 +0000 Message-Id: <20181223111525.581-8-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20181223111525.581-1-mark.cave-ayland@ilande.co.uk> References: <20181223111525.581-1-mark.cave-ayland@ilande.co.uk> X-SA-Exim-Connect-IP: 86.177.178.114 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk X-SA-Exim-Version: 4.2.1 (built Sun, 08 Jan 2012 02:45:44 +0000) X-SA-Exim-Scanned: Yes (on s16892447.onlinehome-server.info) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 82.165.15.123 Subject: [Qemu-devel] [PATCH v4 7/9] target/ppc: merge ppc_vsr_t and ppc_avr_t union types X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Since the VSX registers are actually a superset of the VMX registers then t= hey can be represented by the same type. Merge ppc_avr_t into ppc_vsr_t and cha= nge ppc_avr_t to be a simple typedef alias. Note that due to a difference in the naming of the float32 member between ppc_avr_t and ppc_vsr_t, references to the ppc_avr_t f member must be repla= ced with f32 instead. Signed-off-by: Mark Cave-Ayland Reviewed-by: Richard Henderson Acked-by: David Gibson --- target/ppc/cpu.h | 17 ++++++++------- target/ppc/int_helper.c | 56 +++++++++++++++++++++++++--------------------= ---- target/ppc/internal.h | 11 ---------- 3 files changed, 39 insertions(+), 45 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index d5f99f1fc7..578641ac20 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -218,7 +218,6 @@ typedef struct opc_handler_t opc_handler_t; /* Types used to describe some PowerPC registers etc. */ typedef struct DisasContext DisasContext; typedef struct ppc_spr_t ppc_spr_t; -typedef union ppc_avr_t ppc_avr_t; typedef union ppc_tlb_t ppc_tlb_t; typedef struct ppc_hash_pte64 ppc_hash_pte64_t; =20 @@ -242,22 +241,26 @@ struct ppc_spr_t { #endif }; =20 -/* Altivec registers (128 bits) */ -union ppc_avr_t { - float32 f[4]; +/* VSX/Altivec registers (128 bits) */ +typedef union _ppc_vsr_t { uint8_t u8[16]; uint16_t u16[8]; uint32_t u32[4]; + uint64_t u64[2]; int8_t s8[16]; int16_t s16[8]; int32_t s32[4]; - uint64_t u64[2]; int64_t s64[2]; + float32 f32[4]; + float64 f64[2]; + float128 f128; #ifdef CONFIG_INT128 __uint128_t u128; #endif - Int128 s128; -}; + Int128 s128; +} ppc_vsr_t; + +typedef ppc_vsr_t ppc_avr_t; =20 #if !defined(CONFIG_USER_ONLY) /* Software TLB cache */ diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index fcac90a4a9..9d715be25c 100644 --- a/target/ppc/int_helper.c +++ b/target/ppc/int_helper.c @@ -548,8 +548,8 @@ VARITH_DO(muluwm, *, u32) { \ int i; \ \ - for (i =3D 0; i < ARRAY_SIZE(r->f); i++) { \ - r->f[i] =3D func(a->f[i], b->f[i], &env->vec_status); \ + for (i =3D 0; i < ARRAY_SIZE(r->f32); i++) { \ + r->f32[i] =3D func(a->f32[i], b->f32[i], &env->vec_status); \ } \ } VARITHFP(addfp, float32_add) @@ -563,9 +563,9 @@ VARITHFP(maxfp, float32_max) ppc_avr_t *b, ppc_avr_t *c) \ { \ int i; \ - for (i =3D 0; i < ARRAY_SIZE(r->f); i++) { \ - r->f[i] =3D float32_muladd(a->f[i], c->f[i], b->f[i], \ - type, &env->vec_status); \ + for (i =3D 0; i < ARRAY_SIZE(r->f32); i++) { \ + r->f32[i] =3D float32_muladd(a->f32[i], c->f32[i], b->f32[i], \ + type, &env->vec_status); \ } \ } VARITHFPFMA(maddfp, 0); @@ -670,9 +670,9 @@ VABSDU(w, u32) { \ int i; \ \ - for (i =3D 0; i < ARRAY_SIZE(r->f); i++) { \ + for (i =3D 0; i < ARRAY_SIZE(r->f32); i++) { \ float32 t =3D cvt(b->element[i], &env->vec_status); \ - r->f[i] =3D float32_scalbn(t, -uim, &env->vec_status); \ + r->f32[i] =3D float32_scalbn(t, -uim, &env->vec_status); \ } \ } VCF(ux, uint32_to_float32, u32) @@ -782,9 +782,9 @@ VCMPNE(w, u32, uint32_t, 0) uint32_t none =3D 0; \ int i; \ \ - for (i =3D 0; i < ARRAY_SIZE(r->f); i++) { \ + for (i =3D 0; i < ARRAY_SIZE(r->f32); i++) { \ uint32_t result; \ - int rel =3D float32_compare_quiet(a->f[i], b->f[i], \ + int rel =3D float32_compare_quiet(a->f32[i], b->f32[i], \ &env->vec_status); \ if (rel =3D=3D float_relation_unordered) { = \ result =3D 0; \ @@ -816,14 +816,16 @@ static inline void vcmpbfp_internal(CPUPPCState *env,= ppc_avr_t *r, int i; int all_in =3D 0; =20 - for (i =3D 0; i < ARRAY_SIZE(r->f); i++) { - int le_rel =3D float32_compare_quiet(a->f[i], b->f[i], &env->vec_s= tatus); + for (i =3D 0; i < ARRAY_SIZE(r->f32); i++) { + int le_rel =3D float32_compare_quiet(a->f32[i], b->f32[i], + &env->vec_status); if (le_rel =3D=3D float_relation_unordered) { r->u32[i] =3D 0xc0000000; all_in =3D 1; } else { - float32 bneg =3D float32_chs(b->f[i]); - int ge_rel =3D float32_compare_quiet(a->f[i], bneg, &env->vec_= status); + float32 bneg =3D float32_chs(b->f32[i]); + int ge_rel =3D float32_compare_quiet(a->f32[i], bneg, + &env->vec_status); int le =3D le_rel !=3D float_relation_greater; int ge =3D ge_rel !=3D float_relation_less; =20 @@ -856,11 +858,11 @@ void helper_vcmpbfp_dot(CPUPPCState *env, ppc_avr_t *= r, ppc_avr_t *a, float_status s =3D env->vec_status; \ \ set_float_rounding_mode(float_round_to_zero, &s); \ - for (i =3D 0; i < ARRAY_SIZE(r->f); i++) { \ - if (float32_is_any_nan(b->f[i])) { \ + for (i =3D 0; i < ARRAY_SIZE(r->f32); i++) { \ + if (float32_is_any_nan(b->f32[i])) { \ r->element[i] =3D 0; \ } else { \ - float64 t =3D float32_to_float64(b->f[i], &s); \ + float64 t =3D float32_to_float64(b->f32[i], &s); \ int64_t j; \ \ t =3D float64_scalbn(t, uim, &s); \ @@ -1661,8 +1663,8 @@ void helper_vrefp(CPUPPCState *env, ppc_avr_t *r, ppc= _avr_t *b) { int i; =20 - for (i =3D 0; i < ARRAY_SIZE(r->f); i++) { - r->f[i] =3D float32_div(float32_one, b->f[i], &env->vec_status); + for (i =3D 0; i < ARRAY_SIZE(r->f32); i++) { + r->f32[i] =3D float32_div(float32_one, b->f32[i], &env->vec_status= ); } } =20 @@ -1674,8 +1676,8 @@ void helper_vrefp(CPUPPCState *env, ppc_avr_t *r, ppc= _avr_t *b) float_status s =3D env->vec_status; \ \ set_float_rounding_mode(rounding, &s); \ - for (i =3D 0; i < ARRAY_SIZE(r->f); i++) { \ - r->f[i] =3D float32_round_to_int (b->f[i], &s); \ + for (i =3D 0; i < ARRAY_SIZE(r->f32); i++) { \ + r->f32[i] =3D float32_round_to_int (b->f32[i], &s); \ } \ } VRFI(n, float_round_nearest_even) @@ -1705,10 +1707,10 @@ void helper_vrsqrtefp(CPUPPCState *env, ppc_avr_t *= r, ppc_avr_t *b) { int i; =20 - for (i =3D 0; i < ARRAY_SIZE(r->f); i++) { - float32 t =3D float32_sqrt(b->f[i], &env->vec_status); + for (i =3D 0; i < ARRAY_SIZE(r->f32); i++) { + float32 t =3D float32_sqrt(b->f32[i], &env->vec_status); =20 - r->f[i] =3D float32_div(float32_one, t, &env->vec_status); + r->f32[i] =3D float32_div(float32_one, t, &env->vec_status); } } =20 @@ -1751,8 +1753,8 @@ void helper_vexptefp(CPUPPCState *env, ppc_avr_t *r, = ppc_avr_t *b) { int i; =20 - for (i =3D 0; i < ARRAY_SIZE(r->f); i++) { - r->f[i] =3D float32_exp2(b->f[i], &env->vec_status); + for (i =3D 0; i < ARRAY_SIZE(r->f32); i++) { + r->f32[i] =3D float32_exp2(b->f32[i], &env->vec_status); } } =20 @@ -1760,8 +1762,8 @@ void helper_vlogefp(CPUPPCState *env, ppc_avr_t *r, p= pc_avr_t *b) { int i; =20 - for (i =3D 0; i < ARRAY_SIZE(r->f); i++) { - r->f[i] =3D float32_log2(b->f[i], &env->vec_status); + for (i =3D 0; i < ARRAY_SIZE(r->f32); i++) { + r->f32[i] =3D float32_log2(b->f32[i], &env->vec_status); } } =20 diff --git a/target/ppc/internal.h b/target/ppc/internal.h index 5d460247e2..bd247f2504 100644 --- a/target/ppc/internal.h +++ b/target/ppc/internal.h @@ -204,17 +204,6 @@ EXTRACT_HELPER(IMM8, 11, 8); EXTRACT_HELPER(DCMX, 16, 7); EXTRACT_HELPER_SPLIT_3(DCMX_XV, 5, 16, 0, 1, 2, 5, 1, 6, 6); =20 -typedef union _ppc_vsr_t { - uint8_t u8[16]; - uint16_t u16[8]; - uint32_t u32[4]; - uint64_t u64[2]; - float32 f32[4]; - float64 f64[2]; - float128 f128; - Int128 s128; -} ppc_vsr_t; - #if defined(HOST_WORDS_BIGENDIAN) #define VsrB(i) u8[i] #define VsrH(i) u16[i] --=20 2.11.0