From nobody Fri Nov 7 03:54:04 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1545326825838873.6833554196282; Thu, 20 Dec 2018 09:27:05 -0800 (PST) Received: from localhost ([::1]:38592 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ga1LC-0003qI-Cl for importer@patchew.org; Thu, 20 Dec 2018 11:38:30 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47818) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ga1Ek-0007tU-Rp for qemu-devel@nongnu.org; Thu, 20 Dec 2018 11:31:52 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ga1Ek-0000sE-6v for qemu-devel@nongnu.org; Thu, 20 Dec 2018 11:31:50 -0500 Received: from chuckie.co.uk ([82.165.15.123]:37306 helo=s16892447.onlinehome-server.info) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ga1Ek-0000rU-0I; Thu, 20 Dec 2018 11:31:50 -0500 Received: from host86-177-178-114.range86-177.btcentralplus.com ([86.177.178.114] helo=kentang.home) by s16892447.onlinehome-server.info with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.76) (envelope-from ) id 1ga1Ey-0000iB-LA; Thu, 20 Dec 2018 16:32:05 +0000 From: Mark Cave-Ayland To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org, richard.henderson@linaro.org, david@gibson.dropbear.id.au Date: Thu, 20 Dec 2018 16:31:23 +0000 Message-Id: <20181220163123.9233-10-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20181220163123.9233-1-mark.cave-ayland@ilande.co.uk> References: <20181220163123.9233-1-mark.cave-ayland@ilande.co.uk> X-SA-Exim-Connect-IP: 86.177.178.114 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk X-SA-Exim-Version: 4.2.1 (built Sun, 08 Jan 2012 02:45:44 +0000) X-SA-Exim-Scanned: Yes (on s16892447.onlinehome-server.info) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 82.165.15.123 Subject: [Qemu-devel] [PATCH v3 9/9] target/ppc: replace AVR* macros with Vsr* macros X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Now that the VMX and VSR register sets have been combined, the same macros = can be used to access both AVR and VSR field members. Signed-off-by: Mark Cave-Ayland Reviewed-by: Richard Henderson --- target/ppc/int_helper.c | 38 +++++++++++++------------------------- target/ppc/internal.h | 4 ++++ 2 files changed, 17 insertions(+), 25 deletions(-) diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index 9d715be25c..36803f86ce 100644 --- a/target/ppc/int_helper.c +++ b/target/ppc/int_helper.c @@ -389,18 +389,6 @@ target_ulong helper_602_mfrom(target_ulong arg) /*************************************************************************= ****/ /* Altivec extension helpers */ #if defined(HOST_WORDS_BIGENDIAN) -#define HI_IDX 0 -#define LO_IDX 1 -#define AVRB(i) u8[i] -#define AVRW(i) u32[i] -#else -#define HI_IDX 1 -#define LO_IDX 0 -#define AVRB(i) u8[15-(i)] -#define AVRW(i) u32[3-(i)] -#endif - -#if defined(HOST_WORDS_BIGENDIAN) #define VECTOR_FOR_INORDER_I(index, element) \ for (index =3D 0; index < ARRAY_SIZE(r->element); index++) #else @@ -3277,11 +3265,11 @@ void helper_vcipher(ppc_avr_t *r, ppc_avr_t *a, ppc= _avr_t *b) int i; =20 VECTOR_FOR_INORDER_I(i, u32) { - result.AVRW(i) =3D b->AVRW(i) ^ - (AES_Te0[a->AVRB(AES_shifts[4*i + 0])] ^ - AES_Te1[a->AVRB(AES_shifts[4*i + 1])] ^ - AES_Te2[a->AVRB(AES_shifts[4*i + 2])] ^ - AES_Te3[a->AVRB(AES_shifts[4*i + 3])]); + result.VsrW(i) =3D b->VsrW(i) ^ + (AES_Te0[a->VsrB(AES_shifts[4 * i + 0])] ^ + AES_Te1[a->VsrB(AES_shifts[4 * i + 1])] ^ + AES_Te2[a->VsrB(AES_shifts[4 * i + 2])] ^ + AES_Te3[a->VsrB(AES_shifts[4 * i + 3])]); } *r =3D result; } @@ -3292,7 +3280,7 @@ void helper_vcipherlast(ppc_avr_t *r, ppc_avr_t *a, p= pc_avr_t *b) int i; =20 VECTOR_FOR_INORDER_I(i, u8) { - result.AVRB(i) =3D b->AVRB(i) ^ (AES_sbox[a->AVRB(AES_shifts[i])]); + result.VsrB(i) =3D b->VsrB(i) ^ (AES_sbox[a->VsrB(AES_shifts[i])]); } *r =3D result; } @@ -3305,15 +3293,15 @@ void helper_vncipher(ppc_avr_t *r, ppc_avr_t *a, pp= c_avr_t *b) ppc_avr_t tmp; =20 VECTOR_FOR_INORDER_I(i, u8) { - tmp.AVRB(i) =3D b->AVRB(i) ^ AES_isbox[a->AVRB(AES_ishifts[i])]; + tmp.VsrB(i) =3D b->VsrB(i) ^ AES_isbox[a->VsrB(AES_ishifts[i])]; } =20 VECTOR_FOR_INORDER_I(i, u32) { - r->AVRW(i) =3D - AES_imc[tmp.AVRB(4*i + 0)][0] ^ - AES_imc[tmp.AVRB(4*i + 1)][1] ^ - AES_imc[tmp.AVRB(4*i + 2)][2] ^ - AES_imc[tmp.AVRB(4*i + 3)][3]; + r->VsrW(i) =3D + AES_imc[tmp.VsrB(4 * i + 0)][0] ^ + AES_imc[tmp.VsrB(4 * i + 1)][1] ^ + AES_imc[tmp.VsrB(4 * i + 2)][2] ^ + AES_imc[tmp.VsrB(4 * i + 3)][3]; } } =20 @@ -3323,7 +3311,7 @@ void helper_vncipherlast(ppc_avr_t *r, ppc_avr_t *a, = ppc_avr_t *b) int i; =20 VECTOR_FOR_INORDER_I(i, u8) { - result.AVRB(i) =3D b->AVRB(i) ^ (AES_isbox[a->AVRB(AES_ishifts[i])= ]); + result.VsrB(i) =3D b->VsrB(i) ^ (AES_isbox[a->VsrB(AES_ishifts[i])= ]); } *r =3D result; } diff --git a/target/ppc/internal.h b/target/ppc/internal.h index c7c0f77dd6..ef262aa463 100644 --- a/target/ppc/internal.h +++ b/target/ppc/internal.h @@ -205,11 +205,15 @@ EXTRACT_HELPER(DCMX, 16, 7); EXTRACT_HELPER_SPLIT_3(DCMX_XV, 5, 16, 0, 1, 2, 5, 1, 6, 6); =20 #if defined(HOST_WORDS_BIGENDIAN) +#define HI_IDX 0 +#define LO_IDX 1 #define VsrB(i) u8[i] #define VsrH(i) u16[i] #define VsrW(i) u32[i] #define VsrD(i) u64[i] #else +#define HI_IDX 1 +#define LO_IDX 0 #define VsrB(i) u8[15 - (i)] #define VsrH(i) u16[7 - (i)] #define VsrW(i) u32[3 - (i)] --=20 2.11.0