From nobody Fri Nov 7 03:50:14 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 15452846997411004.5920317972615; Wed, 19 Dec 2018 21:44:59 -0800 (PST) Received: from localhost ([::1]:35412 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gZr8k-0006FZ-C4 for importer@patchew.org; Thu, 20 Dec 2018 00:44:58 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60200) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gZr4u-0003bE-DU for qemu-devel@nongnu.org; Thu, 20 Dec 2018 00:41:01 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gZr4r-0005r8-6I for qemu-devel@nongnu.org; Thu, 20 Dec 2018 00:41:00 -0500 Received: from mx1.redhat.com ([209.132.183.28]:39116) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gZr4q-0005qK-UR for qemu-devel@nongnu.org; Thu, 20 Dec 2018 00:40:57 -0500 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 4D8F6C050069 for ; Thu, 20 Dec 2018 05:40:56 +0000 (UTC) Received: from xz-x1.nay.redhat.com (dhcp-14-116.nay.redhat.com [10.66.14.116]) by smtp.corp.redhat.com (Postfix) with ESMTP id 493F6604C7; Thu, 20 Dec 2018 05:40:52 +0000 (UTC) From: Peter Xu To: qemu-devel@nongnu.org Date: Thu, 20 Dec 2018 13:40:36 +0800 Message-Id: <20181220054037.24320-3-peterx@redhat.com> In-Reply-To: <20181220054037.24320-1-peterx@redhat.com> References: <20181220054037.24320-1-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Thu, 20 Dec 2018 05:40:56 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 2/3] x86-iommu: switch intr_supported to OnOffAuto type X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov , Paolo Bonzini , Eduardo Habkost , peterx@redhat.com, "Michael S . Tsirkin" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Switch the intr_supported variable from a boolean to OnOffAuto type so that we can know whether the user specified it or not. With that we'll have a chance to help the user to choose more wisely where possible. Introduce x86_iommu_ir_supported() to mask these changes. No functional change at all. Signed-off-by: Peter Xu --- hw/i386/acpi-build.c | 6 +++--- hw/i386/amd_iommu.c | 2 +- hw/i386/intel_iommu.c | 6 +++--- hw/i386/pc.c | 2 +- hw/i386/x86-iommu.c | 15 +++++++++++++-- include/hw/i386/x86-iommu.h | 4 +++- 6 files changed, 24 insertions(+), 11 deletions(-) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 236a20eaa8..7012f97cac 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -2426,7 +2426,7 @@ build_dmar_q35(GArray *table_data, BIOSLinker *linker) IntelIOMMUState *intel_iommu =3D INTEL_IOMMU_DEVICE(iommu); =20 assert(iommu); - if (iommu->intr_supported) { + if (x86_iommu_ir_supported(iommu)) { dmar_flags |=3D 0x1; /* Flags: 0x1: INT_REMAP */ } =20 @@ -2499,7 +2499,7 @@ build_amd_iommu(GArray *table_data, BIOSLinker *linke= r) * When interrupt remapping is supported, we add a special IVHD device * for type IO-APIC. */ - if (x86_iommu_get_default()->intr_supported) { + if (x86_iommu_ir_supported(x86_iommu_get_default())) { ivhd_table_len +=3D 8; } /* IVHD length */ @@ -2535,7 +2535,7 @@ build_amd_iommu(GArray *table_data, BIOSLinker *linke= r) * Linux IOMMU driver checks for the special IVHD device (type IO-APIC= ). * See Linux kernel commit 'c2ff5cf5294bcbd7fa50f7d860e90a66db7e5059' */ - if (x86_iommu_get_default()->intr_supported) { + if (x86_iommu_ir_supported(x86_iommu_get_default())) { build_append_int_noprefix(table_data, (0x1ull << 56) | /* type IOAPIC= */ (IOAPIC_SB_DEVID << 40) | /* IOAPIC devi= d */ diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index 353a810e6b..8ad707aba0 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -1233,7 +1233,7 @@ static int amdvi_int_remap_msi(AMDVIState *iommu, } =20 /* validate that we are configure with intremap=3Don */ - if (!X86_IOMMU_DEVICE(iommu)->intr_supported) { + if (!x86_iommu_ir_supported(X86_IOMMU_DEVICE(iommu))) { trace_amdvi_err("Interrupt remapping is enabled in the guest but " "not in the host. Use intremap=3Don to enable inte= rrupt " "remapping in amd-iommu."); diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index d97bcbc2f7..3df4b0a550 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -3137,7 +3137,7 @@ static void vtd_init(IntelIOMMUState *s) vtd_paging_entry_rsvd_field[7] =3D VTD_SPTE_LPAGE_L3_RSVD_MASK(s->aw_b= its); vtd_paging_entry_rsvd_field[8] =3D VTD_SPTE_LPAGE_L4_RSVD_MASK(s->aw_b= its); =20 - if (x86_iommu->intr_supported) { + if (x86_iommu_ir_supported(x86_iommu)) { s->ecap |=3D VTD_ECAP_IR | VTD_ECAP_MHMV; if (s->intr_eim =3D=3D ON_OFF_AUTO_ON) { s->ecap |=3D VTD_ECAP_EIM; @@ -3238,14 +3238,14 @@ static bool vtd_decide_config(IntelIOMMUState *s, E= rror **errp) { X86IOMMUState *x86_iommu =3D X86_IOMMU_DEVICE(s); =20 - if (s->intr_eim =3D=3D ON_OFF_AUTO_ON && !x86_iommu->intr_supported) { + if (s->intr_eim =3D=3D ON_OFF_AUTO_ON && !x86_iommu_ir_supported(x86_i= ommu)) { error_setg(errp, "eim=3Don cannot be selected without intremap=3Do= n"); return false; } =20 if (s->intr_eim =3D=3D ON_OFF_AUTO_AUTO) { s->intr_eim =3D (kvm_irqchip_in_kernel() || s->buggy_eim) - && x86_iommu->intr_supported ? + && x86_iommu_ir_supported(x86_iommu) ? ON_OFF_AUTO_ON : ON_OFF_AUTO= _OFF; } if (s->intr_eim =3D=3D ON_OFF_AUTO_ON && !s->buggy_eim) { diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 115bc2825c..d95a0e3ad1 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1244,7 +1244,7 @@ void pc_machine_done(Notifier *notifier, void *data) if (pcms->apic_id_limit > 255 && !xen_enabled()) { IntelIOMMUState *iommu =3D INTEL_IOMMU_DEVICE(x86_iommu_get_defaul= t()); =20 - if (!iommu || !iommu->x86_iommu.intr_supported || + if (!iommu || !x86_iommu_ir_supported(X86_IOMMU_DEVICE(iommu)) || iommu->intr_eim !=3D ON_OFF_AUTO_ON) { error_report("current -smp configuration requires " "Extended Interrupt Mode enabled. " diff --git a/hw/i386/x86-iommu.c b/hw/i386/x86-iommu.c index abc3c03158..61ee0f1eaa 100644 --- a/hw/i386/x86-iommu.c +++ b/hw/i386/x86-iommu.c @@ -119,8 +119,13 @@ static void x86_iommu_realize(DeviceState *dev, Error = **errp) return; } =20 + /* If the user didn't specify IR, choose a default value for it */ + if (x86_iommu->intr_supported =3D=3D ON_OFF_AUTO_AUTO) { + x86_iommu->intr_supported =3D ON_OFF_AUTO_OFF; + } + /* Both Intel and AMD IOMMU IR only support "kernel-irqchip=3D{off|spl= it}" */ - if (x86_iommu->intr_supported && kvm_irqchip_in_kernel() && + if (x86_iommu_ir_supported(x86_iommu) && kvm_irqchip_in_kernel() && !kvm_irqchip_is_split()) { error_setg(errp, "Interrupt Remapping cannot work with " "kernel-irqchip=3Don, please use 'split|off'."); @@ -135,7 +140,8 @@ static void x86_iommu_realize(DeviceState *dev, Error *= *errp) } =20 static Property x86_iommu_properties[] =3D { - DEFINE_PROP_BOOL("intremap", X86IOMMUState, intr_supported, false), + DEFINE_PROP_ON_OFF_AUTO("intremap", X86IOMMUState, + intr_supported, ON_OFF_AUTO_AUTO), DEFINE_PROP_BOOL("device-iotlb", X86IOMMUState, dt_supported, false), DEFINE_PROP_BOOL("pt", X86IOMMUState, pt_supported, true), DEFINE_PROP_END_OF_LIST(), @@ -148,6 +154,11 @@ static void x86_iommu_class_init(ObjectClass *klass, v= oid *data) dc->props =3D x86_iommu_properties; } =20 +bool x86_iommu_ir_supported(X86IOMMUState *s) +{ + return s->intr_supported =3D=3D ON_OFF_AUTO_ON; +} + static const TypeInfo x86_iommu_info =3D { .name =3D TYPE_X86_IOMMU_DEVICE, .parent =3D TYPE_SYS_BUS_DEVICE, diff --git a/include/hw/i386/x86-iommu.h b/include/hw/i386/x86-iommu.h index 2b22a579a3..dcd9719a2c 100644 --- a/include/hw/i386/x86-iommu.h +++ b/include/hw/i386/x86-iommu.h @@ -74,13 +74,15 @@ typedef struct IEC_Notifier IEC_Notifier; =20 struct X86IOMMUState { SysBusDevice busdev; - bool intr_supported; /* Whether vIOMMU supports IR */ + OnOffAuto intr_supported; /* Whether vIOMMU supports IR */ bool dt_supported; /* Whether vIOMMU supports DT */ bool pt_supported; /* Whether vIOMMU supports pass-through */ IommuType type; /* IOMMU type - AMD/Intel */ QLIST_HEAD(, IEC_Notifier) iec_notifiers; /* IEC notify list */ }; =20 +bool x86_iommu_ir_supported(X86IOMMUState *s); + /* Generic IRQ entry information when interrupt remapping is enabled */ struct X86IOMMUIrq { /* Used by both IOAPIC/MSI interrupt remapping */ --=20 2.17.1