From nobody Fri Nov 7 01:52:28 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1545284560006563.1831319242142; Wed, 19 Dec 2018 21:42:40 -0800 (PST) Received: from localhost ([::1]:35401 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gZr6U-0004ON-MD for importer@patchew.org; Thu, 20 Dec 2018 00:42:38 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60171) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gZr4n-0003VR-Il for qemu-devel@nongnu.org; Thu, 20 Dec 2018 00:40:54 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gZr4m-0005mw-JB for qemu-devel@nongnu.org; Thu, 20 Dec 2018 00:40:53 -0500 Received: from mx1.redhat.com ([209.132.183.28]:47970) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gZr4m-0005mH-D5 for qemu-devel@nongnu.org; Thu, 20 Dec 2018 00:40:52 -0500 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id C20D287620 for ; Thu, 20 Dec 2018 05:40:51 +0000 (UTC) Received: from xz-x1.nay.redhat.com (dhcp-14-116.nay.redhat.com [10.66.14.116]) by smtp.corp.redhat.com (Postfix) with ESMTP id CB001604C7; Thu, 20 Dec 2018 05:40:45 +0000 (UTC) From: Peter Xu To: qemu-devel@nongnu.org Date: Thu, 20 Dec 2018 13:40:35 +0800 Message-Id: <20181220054037.24320-2-peterx@redhat.com> In-Reply-To: <20181220054037.24320-1-peterx@redhat.com> References: <20181220054037.24320-1-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Thu, 20 Dec 2018 05:40:51 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 1/3] q35: set split kernel irqchip as default X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov , Paolo Bonzini , Eduardo Habkost , peterx@redhat.com, "Michael S . Tsirkin" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Starting from QEMU 4.0, let's specify "split" as the default value for kernel-irqchip. So for QEMU>=3D4.0 we'll have: allowed=3DY,required=3DN,split=3DY for QEMU<=3D3.1 we'll have: allowed=3DY,required=3DN,split=3DN (omitting all the "kernel_irqchip_" prefix) Note that this will let the default q35 machine type to depend on Linux version 4.4 or newer because that's where split irqchip is introduced in kernel. But it's fine since we're boosting supported Linux version for QEMU 4.0 to around Linux 4.5. For more information please refer to the discussion on AMD's RDTSCP: https://lore.kernel.org/lkml/20181210181328.GA762@zn.tnic/ Signed-off-by: Peter Xu Acked-by: Paolo Bonzini Reviewed-by: Eduardo Habkost --- hw/core/machine.c | 2 ++ hw/i386/pc_q35.c | 2 ++ include/hw/boards.h | 1 + 3 files changed, 5 insertions(+) diff --git a/hw/core/machine.c b/hw/core/machine.c index c51423b647..4439ea663f 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -653,8 +653,10 @@ static void machine_class_base_init(ObjectClass *oc, v= oid *data) static void machine_initfn(Object *obj) { MachineState *ms =3D MACHINE(obj); + MachineClass *mc =3D MACHINE_GET_CLASS(obj); =20 ms->kernel_irqchip_allowed =3D true; + ms->kernel_irqchip_split =3D mc->default_kernel_irqchip_split; ms->kvm_shadow_mem =3D -1; ms->dump_guest_core =3D true; ms->mem_merge =3D true; diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 58459bdab5..d2fb0fa49f 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -304,6 +304,7 @@ static void pc_q35_machine_options(MachineClass *m) m->units_per_default_bus =3D 1; m->default_machine_opts =3D "firmware=3Dbios-256k.bin"; m->default_display =3D "std"; + m->default_kernel_irqchip_split =3D true; m->no_floppy =3D 1; machine_class_allow_dynamic_sysbus_dev(m, TYPE_AMD_IOMMU_DEVICE); machine_class_allow_dynamic_sysbus_dev(m, TYPE_INTEL_IOMMU_DEVICE); @@ -323,6 +324,7 @@ DEFINE_Q35_MACHINE(v4_0, "pc-q35-4.0", NULL, static void pc_q35_3_1_machine_options(MachineClass *m) { pc_q35_4_0_machine_options(m); + m->default_kernel_irqchip_split =3D false; m->alias =3D NULL; SET_MACHINE_COMPAT(m, PC_COMPAT_3_1); } diff --git a/include/hw/boards.h b/include/hw/boards.h index f82f28468b..362384815e 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -195,6 +195,7 @@ struct MachineClass { const char *hw_version; ram_addr_t default_ram_size; const char *default_cpu_type; + bool default_kernel_irqchip_split; bool option_rom_has_mr; bool rom_file_has_mr; int minimum_page_bits; --=20 2.17.1 From nobody Fri Nov 7 01:52:28 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 15452846997411004.5920317972615; Wed, 19 Dec 2018 21:44:59 -0800 (PST) Received: from localhost ([::1]:35412 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gZr8k-0006FZ-C4 for importer@patchew.org; Thu, 20 Dec 2018 00:44:58 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60200) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gZr4u-0003bE-DU for qemu-devel@nongnu.org; Thu, 20 Dec 2018 00:41:01 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gZr4r-0005r8-6I for qemu-devel@nongnu.org; Thu, 20 Dec 2018 00:41:00 -0500 Received: from mx1.redhat.com ([209.132.183.28]:39116) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gZr4q-0005qK-UR for qemu-devel@nongnu.org; Thu, 20 Dec 2018 00:40:57 -0500 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 4D8F6C050069 for ; Thu, 20 Dec 2018 05:40:56 +0000 (UTC) Received: from xz-x1.nay.redhat.com (dhcp-14-116.nay.redhat.com [10.66.14.116]) by smtp.corp.redhat.com (Postfix) with ESMTP id 493F6604C7; Thu, 20 Dec 2018 05:40:52 +0000 (UTC) From: Peter Xu To: qemu-devel@nongnu.org Date: Thu, 20 Dec 2018 13:40:36 +0800 Message-Id: <20181220054037.24320-3-peterx@redhat.com> In-Reply-To: <20181220054037.24320-1-peterx@redhat.com> References: <20181220054037.24320-1-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Thu, 20 Dec 2018 05:40:56 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 2/3] x86-iommu: switch intr_supported to OnOffAuto type X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov , Paolo Bonzini , Eduardo Habkost , peterx@redhat.com, "Michael S . Tsirkin" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Switch the intr_supported variable from a boolean to OnOffAuto type so that we can know whether the user specified it or not. With that we'll have a chance to help the user to choose more wisely where possible. Introduce x86_iommu_ir_supported() to mask these changes. No functional change at all. Signed-off-by: Peter Xu Acked-by: Paolo Bonzini --- hw/i386/acpi-build.c | 6 +++--- hw/i386/amd_iommu.c | 2 +- hw/i386/intel_iommu.c | 6 +++--- hw/i386/pc.c | 2 +- hw/i386/x86-iommu.c | 15 +++++++++++++-- include/hw/i386/x86-iommu.h | 4 +++- 6 files changed, 24 insertions(+), 11 deletions(-) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 236a20eaa8..7012f97cac 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -2426,7 +2426,7 @@ build_dmar_q35(GArray *table_data, BIOSLinker *linker) IntelIOMMUState *intel_iommu =3D INTEL_IOMMU_DEVICE(iommu); =20 assert(iommu); - if (iommu->intr_supported) { + if (x86_iommu_ir_supported(iommu)) { dmar_flags |=3D 0x1; /* Flags: 0x1: INT_REMAP */ } =20 @@ -2499,7 +2499,7 @@ build_amd_iommu(GArray *table_data, BIOSLinker *linke= r) * When interrupt remapping is supported, we add a special IVHD device * for type IO-APIC. */ - if (x86_iommu_get_default()->intr_supported) { + if (x86_iommu_ir_supported(x86_iommu_get_default())) { ivhd_table_len +=3D 8; } /* IVHD length */ @@ -2535,7 +2535,7 @@ build_amd_iommu(GArray *table_data, BIOSLinker *linke= r) * Linux IOMMU driver checks for the special IVHD device (type IO-APIC= ). * See Linux kernel commit 'c2ff5cf5294bcbd7fa50f7d860e90a66db7e5059' */ - if (x86_iommu_get_default()->intr_supported) { + if (x86_iommu_ir_supported(x86_iommu_get_default())) { build_append_int_noprefix(table_data, (0x1ull << 56) | /* type IOAPIC= */ (IOAPIC_SB_DEVID << 40) | /* IOAPIC devi= d */ diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index 353a810e6b..8ad707aba0 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -1233,7 +1233,7 @@ static int amdvi_int_remap_msi(AMDVIState *iommu, } =20 /* validate that we are configure with intremap=3Don */ - if (!X86_IOMMU_DEVICE(iommu)->intr_supported) { + if (!x86_iommu_ir_supported(X86_IOMMU_DEVICE(iommu))) { trace_amdvi_err("Interrupt remapping is enabled in the guest but " "not in the host. Use intremap=3Don to enable inte= rrupt " "remapping in amd-iommu."); diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index d97bcbc2f7..3df4b0a550 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -3137,7 +3137,7 @@ static void vtd_init(IntelIOMMUState *s) vtd_paging_entry_rsvd_field[7] =3D VTD_SPTE_LPAGE_L3_RSVD_MASK(s->aw_b= its); vtd_paging_entry_rsvd_field[8] =3D VTD_SPTE_LPAGE_L4_RSVD_MASK(s->aw_b= its); =20 - if (x86_iommu->intr_supported) { + if (x86_iommu_ir_supported(x86_iommu)) { s->ecap |=3D VTD_ECAP_IR | VTD_ECAP_MHMV; if (s->intr_eim =3D=3D ON_OFF_AUTO_ON) { s->ecap |=3D VTD_ECAP_EIM; @@ -3238,14 +3238,14 @@ static bool vtd_decide_config(IntelIOMMUState *s, E= rror **errp) { X86IOMMUState *x86_iommu =3D X86_IOMMU_DEVICE(s); =20 - if (s->intr_eim =3D=3D ON_OFF_AUTO_ON && !x86_iommu->intr_supported) { + if (s->intr_eim =3D=3D ON_OFF_AUTO_ON && !x86_iommu_ir_supported(x86_i= ommu)) { error_setg(errp, "eim=3Don cannot be selected without intremap=3Do= n"); return false; } =20 if (s->intr_eim =3D=3D ON_OFF_AUTO_AUTO) { s->intr_eim =3D (kvm_irqchip_in_kernel() || s->buggy_eim) - && x86_iommu->intr_supported ? + && x86_iommu_ir_supported(x86_iommu) ? ON_OFF_AUTO_ON : ON_OFF_AUTO= _OFF; } if (s->intr_eim =3D=3D ON_OFF_AUTO_ON && !s->buggy_eim) { diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 115bc2825c..d95a0e3ad1 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1244,7 +1244,7 @@ void pc_machine_done(Notifier *notifier, void *data) if (pcms->apic_id_limit > 255 && !xen_enabled()) { IntelIOMMUState *iommu =3D INTEL_IOMMU_DEVICE(x86_iommu_get_defaul= t()); =20 - if (!iommu || !iommu->x86_iommu.intr_supported || + if (!iommu || !x86_iommu_ir_supported(X86_IOMMU_DEVICE(iommu)) || iommu->intr_eim !=3D ON_OFF_AUTO_ON) { error_report("current -smp configuration requires " "Extended Interrupt Mode enabled. " diff --git a/hw/i386/x86-iommu.c b/hw/i386/x86-iommu.c index abc3c03158..61ee0f1eaa 100644 --- a/hw/i386/x86-iommu.c +++ b/hw/i386/x86-iommu.c @@ -119,8 +119,13 @@ static void x86_iommu_realize(DeviceState *dev, Error = **errp) return; } =20 + /* If the user didn't specify IR, choose a default value for it */ + if (x86_iommu->intr_supported =3D=3D ON_OFF_AUTO_AUTO) { + x86_iommu->intr_supported =3D ON_OFF_AUTO_OFF; + } + /* Both Intel and AMD IOMMU IR only support "kernel-irqchip=3D{off|spl= it}" */ - if (x86_iommu->intr_supported && kvm_irqchip_in_kernel() && + if (x86_iommu_ir_supported(x86_iommu) && kvm_irqchip_in_kernel() && !kvm_irqchip_is_split()) { error_setg(errp, "Interrupt Remapping cannot work with " "kernel-irqchip=3Don, please use 'split|off'."); @@ -135,7 +140,8 @@ static void x86_iommu_realize(DeviceState *dev, Error *= *errp) } =20 static Property x86_iommu_properties[] =3D { - DEFINE_PROP_BOOL("intremap", X86IOMMUState, intr_supported, false), + DEFINE_PROP_ON_OFF_AUTO("intremap", X86IOMMUState, + intr_supported, ON_OFF_AUTO_AUTO), DEFINE_PROP_BOOL("device-iotlb", X86IOMMUState, dt_supported, false), DEFINE_PROP_BOOL("pt", X86IOMMUState, pt_supported, true), DEFINE_PROP_END_OF_LIST(), @@ -148,6 +154,11 @@ static void x86_iommu_class_init(ObjectClass *klass, v= oid *data) dc->props =3D x86_iommu_properties; } =20 +bool x86_iommu_ir_supported(X86IOMMUState *s) +{ + return s->intr_supported =3D=3D ON_OFF_AUTO_ON; +} + static const TypeInfo x86_iommu_info =3D { .name =3D TYPE_X86_IOMMU_DEVICE, .parent =3D TYPE_SYS_BUS_DEVICE, diff --git a/include/hw/i386/x86-iommu.h b/include/hw/i386/x86-iommu.h index 2b22a579a3..dcd9719a2c 100644 --- a/include/hw/i386/x86-iommu.h +++ b/include/hw/i386/x86-iommu.h @@ -74,13 +74,15 @@ typedef struct IEC_Notifier IEC_Notifier; =20 struct X86IOMMUState { SysBusDevice busdev; - bool intr_supported; /* Whether vIOMMU supports IR */ + OnOffAuto intr_supported; /* Whether vIOMMU supports IR */ bool dt_supported; /* Whether vIOMMU supports DT */ bool pt_supported; /* Whether vIOMMU supports pass-through */ IommuType type; /* IOMMU type - AMD/Intel */ QLIST_HEAD(, IEC_Notifier) iec_notifiers; /* IEC notify list */ }; =20 +bool x86_iommu_ir_supported(X86IOMMUState *s); + /* Generic IRQ entry information when interrupt remapping is enabled */ struct X86IOMMUIrq { /* Used by both IOAPIC/MSI interrupt remapping */ --=20 2.17.1 From nobody Fri Nov 7 01:52:28 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1545284568847313.59095813752197; Wed, 19 Dec 2018 21:42:48 -0800 (PST) Received: from localhost ([::1]:35402 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gZr6d-0004TJ-1R for importer@patchew.org; Thu, 20 Dec 2018 00:42:47 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60230) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gZr4w-0003bv-JD for qemu-devel@nongnu.org; Thu, 20 Dec 2018 00:41:03 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gZr4v-0005vY-UQ for qemu-devel@nongnu.org; Thu, 20 Dec 2018 00:41:02 -0500 Received: from mx1.redhat.com ([209.132.183.28]:59862) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gZr4v-0005ul-N5 for qemu-devel@nongnu.org; Thu, 20 Dec 2018 00:41:01 -0500 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 0D26EC057F38 for ; Thu, 20 Dec 2018 05:41:01 +0000 (UTC) Received: from xz-x1.nay.redhat.com (dhcp-14-116.nay.redhat.com [10.66.14.116]) by smtp.corp.redhat.com (Postfix) with ESMTP id C9495604C7; Thu, 20 Dec 2018 05:40:56 +0000 (UTC) From: Peter Xu To: qemu-devel@nongnu.org Date: Thu, 20 Dec 2018 13:40:37 +0800 Message-Id: <20181220054037.24320-4-peterx@redhat.com> In-Reply-To: <20181220054037.24320-1-peterx@redhat.com> References: <20181220054037.24320-1-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Thu, 20 Dec 2018 05:41:01 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 3/3] x86-iommu: turn on IR by default if proper X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov , Paolo Bonzini , Eduardo Habkost , peterx@redhat.com, "Michael S . Tsirkin" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" When the user didn't specify "intremap" for the IOMMU device, we turn it on by default if it is supported. This will turn IR on for the default Q35 platform as long as the IOMMU device is specified on new kernels. Signed-off-by: Peter Xu Acked-by: Paolo Bonzini --- hw/i386/x86-iommu.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/i386/x86-iommu.c b/hw/i386/x86-iommu.c index 61ee0f1eaa..d1534c1ae0 100644 --- a/hw/i386/x86-iommu.c +++ b/hw/i386/x86-iommu.c @@ -112,6 +112,7 @@ static void x86_iommu_realize(DeviceState *dev, Error *= *errp) PCMachineState *pcms =3D PC_MACHINE(object_dynamic_cast(OBJECT(ms), TYPE_PC_MACHINE)); QLIST_INIT(&x86_iommu->iec_notifiers); + bool irq_all_kernel =3D kvm_irqchip_in_kernel() && !kvm_irqchip_is_spl= it(); =20 if (!pcms || !pcms->bus) { error_setg(errp, "Machine-type '%s' not supported by IOMMU", @@ -121,12 +122,12 @@ static void x86_iommu_realize(DeviceState *dev, Error= **errp) =20 /* If the user didn't specify IR, choose a default value for it */ if (x86_iommu->intr_supported =3D=3D ON_OFF_AUTO_AUTO) { - x86_iommu->intr_supported =3D ON_OFF_AUTO_OFF; + x86_iommu->intr_supported =3D irq_all_kernel ? + ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON; } =20 /* Both Intel and AMD IOMMU IR only support "kernel-irqchip=3D{off|spl= it}" */ - if (x86_iommu_ir_supported(x86_iommu) && kvm_irqchip_in_kernel() && - !kvm_irqchip_is_split()) { + if (x86_iommu_ir_supported(x86_iommu) && irq_all_kernel) { error_setg(errp, "Interrupt Remapping cannot work with " "kernel-irqchip=3Don, please use 'split|off'."); return; --=20 2.17.1