From nobody Sat Nov 8 07:21:09 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1545209601832360.74511730968413; Wed, 19 Dec 2018 00:53:21 -0800 (PST) Received: from localhost ([::1]:58336 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gZXbO-0001Sp-1k for importer@patchew.org; Wed, 19 Dec 2018 03:53:14 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34559) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gZXZ9-0008Qk-Oq for qemu-devel@nongnu.org; Wed, 19 Dec 2018 03:50:57 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gZXZ8-0004D8-Bn for qemu-devel@nongnu.org; Wed, 19 Dec 2018 03:50:55 -0500 Received: from mx1.redhat.com ([209.132.183.28]:49080) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gZXZ8-0004CY-3b for qemu-devel@nongnu.org; Wed, 19 Dec 2018 03:50:54 -0500 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 0C47DCD191 for ; Wed, 19 Dec 2018 08:50:53 +0000 (UTC) Received: from xz-x1.nay.redhat.com (dhcp-14-128.nay.redhat.com [10.66.14.128]) by smtp.corp.redhat.com (Postfix) with ESMTP id C60FB1001F50; Wed, 19 Dec 2018 08:50:50 +0000 (UTC) From: Peter Xu To: qemu-devel@nongnu.org Date: Wed, 19 Dec 2018 16:50:36 +0800 Message-Id: <20181219085038.7729-3-peterx@redhat.com> In-Reply-To: <20181219085038.7729-1-peterx@redhat.com> References: <20181219085038.7729-1-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Wed, 19 Dec 2018 08:50:53 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 2/4] q35: set split kernel irqchip as default X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov , Paolo Bonzini , Eduardo Habkost , peterx@redhat.com, "Michael S . Tsirkin" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Starting from QEMU 4.0, let's specify "split" as the default value for kernel-irqchip. So for QEMU>=3D4.0 we'll have: allowed=3DY,required=3DN,split=3DY for QEMU<=3D3.1 we'll have: allowed=3DY,required=3DN,split=3DN (omitting all the "kernel_irqchip_" prefix) Note that this "split" is optional - we'll first try to enable split kernel irqchip, and we'll fall back to complete kernel irqchip if we found that the kernel capability is missing. Signed-off-by: Peter Xu --- hw/core/machine.c | 2 ++ hw/i386/pc_q35.c | 2 ++ include/hw/boards.h | 1 + 3 files changed, 5 insertions(+) diff --git a/hw/core/machine.c b/hw/core/machine.c index c51423b647..4439ea663f 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -653,8 +653,10 @@ static void machine_class_base_init(ObjectClass *oc, v= oid *data) static void machine_initfn(Object *obj) { MachineState *ms =3D MACHINE(obj); + MachineClass *mc =3D MACHINE_GET_CLASS(obj); =20 ms->kernel_irqchip_allowed =3D true; + ms->kernel_irqchip_split =3D mc->default_kernel_irqchip_split; ms->kvm_shadow_mem =3D -1; ms->dump_guest_core =3D true; ms->mem_merge =3D true; diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 58459bdab5..d2fb0fa49f 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -304,6 +304,7 @@ static void pc_q35_machine_options(MachineClass *m) m->units_per_default_bus =3D 1; m->default_machine_opts =3D "firmware=3Dbios-256k.bin"; m->default_display =3D "std"; + m->default_kernel_irqchip_split =3D true; m->no_floppy =3D 1; machine_class_allow_dynamic_sysbus_dev(m, TYPE_AMD_IOMMU_DEVICE); machine_class_allow_dynamic_sysbus_dev(m, TYPE_INTEL_IOMMU_DEVICE); @@ -323,6 +324,7 @@ DEFINE_Q35_MACHINE(v4_0, "pc-q35-4.0", NULL, static void pc_q35_3_1_machine_options(MachineClass *m) { pc_q35_4_0_machine_options(m); + m->default_kernel_irqchip_split =3D false; m->alias =3D NULL; SET_MACHINE_COMPAT(m, PC_COMPAT_3_1); } diff --git a/include/hw/boards.h b/include/hw/boards.h index f82f28468b..362384815e 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -195,6 +195,7 @@ struct MachineClass { const char *hw_version; ram_addr_t default_ram_size; const char *default_cpu_type; + bool default_kernel_irqchip_split; bool option_rom_has_mr; bool rom_file_has_mr; int minimum_page_bits; --=20 2.17.1