From nobody Thu Nov 6 22:55:41 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1544653774201148.7774949944968; Wed, 12 Dec 2018 14:29:34 -0800 (PST) Received: from localhost ([::1]:48976 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gXD0W-0006Bj-8W for importer@patchew.org; Wed, 12 Dec 2018 17:29:32 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47827) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gXCyO-0004KC-UV for qemu-devel@nongnu.org; Wed, 12 Dec 2018 17:27:25 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gXCyL-0003pb-S4 for qemu-devel@nongnu.org; Wed, 12 Dec 2018 17:27:18 -0500 Received: from mx1.redhat.com ([209.132.183.28]:47436) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gXCyJ-0003jY-6u for qemu-devel@nongnu.org; Wed, 12 Dec 2018 17:27:17 -0500 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 84940307C940; Wed, 12 Dec 2018 22:27:09 +0000 (UTC) Received: from localhost (ovpn-112-51.ams2.redhat.com [10.36.112.51]) by smtp.corp.redhat.com (Postfix) with ESMTP id 351AB105705B; Wed, 12 Dec 2018 22:27:01 +0000 (UTC) From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= To: qemu-devel@nongnu.org Date: Thu, 13 Dec 2018 02:26:43 +0400 Message-Id: <20181212222648.595-2-marcandre.lureau@redhat.com> In-Reply-To: <20181212222648.595-1-marcandre.lureau@redhat.com> References: <20181212222648.595-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.46]); Wed, 12 Dec 2018 22:27:09 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v13 1/6] tpm: add a "ppi" boolean property X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , "Michael S. Tsirkin" , stefanb@linux.vnet.ibm.com, f4bug@amsat.org, =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Igor Mammedov , Paolo Bonzini , Richard Henderson , Stefan Berger Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" The following patches implement the TPM Physical Presence Interface, make use of a new memory region and a fw_cfg entry. Enable PPI by default with >=3D4.0 machine type, to avoid migration issues. Signed-off-by: Marc-Andr=C3=A9 Lureau Reviewed-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/compat.h | 11 ++++++++++- hw/tpm/tpm_crb.c | 3 +++ hw/tpm/tpm_tis.c | 3 +++ 3 files changed, 16 insertions(+), 1 deletion(-) diff --git a/include/hw/compat.h b/include/hw/compat.h index 70958328fe..db368c5c74 100644 --- a/include/hw/compat.h +++ b/include/hw/compat.h @@ -2,7 +2,16 @@ #define HW_COMPAT_H =20 #define HW_COMPAT_3_1 \ - /* empty */ + { \ + .driver =3D "tpm-crb", \ + .property =3D "ppi", \ + .value =3D "false", \ + }, \ + { \ + .driver =3D "tpm-tis", \ + .property =3D "ppi", \ + .value =3D "false", \ + }, =20 #define HW_COMPAT_3_0 \ /* empty */ diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c index a92dd50437..d5b0ac5920 100644 --- a/hw/tpm/tpm_crb.c +++ b/hw/tpm/tpm_crb.c @@ -41,6 +41,8 @@ typedef struct CRBState { MemoryRegion cmdmem; =20 size_t be_buffer_size; + + bool ppi_enabled; } CRBState; =20 #define CRB(obj) OBJECT_CHECK(CRBState, (obj), TYPE_TPM_CRB) @@ -221,6 +223,7 @@ static const VMStateDescription vmstate_tpm_crb =3D { =20 static Property tpm_crb_properties[] =3D { DEFINE_PROP_TPMBE("tpmdev", CRBState, tpmbe), + DEFINE_PROP_BOOL("ppi", CRBState, ppi_enabled, true), DEFINE_PROP_END_OF_LIST(), }; =20 diff --git a/hw/tpm/tpm_tis.c b/hw/tpm/tpm_tis.c index d9322692ee..cbb9a84a5b 100644 --- a/hw/tpm/tpm_tis.c +++ b/hw/tpm/tpm_tis.c @@ -81,6 +81,8 @@ typedef struct TPMState { TPMVersion be_tpm_version; =20 size_t be_buffer_size; + + bool ppi_enabled; } TPMState; =20 #define TPM(obj) OBJECT_CHECK(TPMState, (obj), TYPE_TPM_TIS) @@ -950,6 +952,7 @@ static const VMStateDescription vmstate_tpm_tis =3D { static Property tpm_tis_properties[] =3D { DEFINE_PROP_UINT32("irq", TPMState, irq_num, TPM_TIS_IRQ), DEFINE_PROP_TPMBE("tpmdev", TPMState, be_driver), + DEFINE_PROP_BOOL("ppi", TPMState, ppi_enabled, true), DEFINE_PROP_END_OF_LIST(), }; =20 --=20 2.20.0 From nobody Thu Nov 6 22:55:41 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1544653944121351.3130352777224; Wed, 12 Dec 2018 14:32:24 -0800 (PST) Received: from localhost ([::1]:49021 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gXD3H-0008G9-1z for importer@patchew.org; Wed, 12 Dec 2018 17:32:23 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47965) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gXCyT-0004Mt-V7 for qemu-devel@nongnu.org; Wed, 12 Dec 2018 17:27:28 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gXCyP-0003tP-G5 for qemu-devel@nongnu.org; Wed, 12 Dec 2018 17:27:25 -0500 Received: from mx1.redhat.com ([209.132.183.28]:4618) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gXCyP-0003nS-2k for qemu-devel@nongnu.org; Wed, 12 Dec 2018 17:27:21 -0500 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id BDA9AC049592; Wed, 12 Dec 2018 22:27:14 +0000 (UTC) Received: from localhost (ovpn-112-51.ams2.redhat.com [10.36.112.51]) by smtp.corp.redhat.com (Postfix) with ESMTP id 4C3CF1054FD2; Wed, 12 Dec 2018 22:27:12 +0000 (UTC) From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= To: qemu-devel@nongnu.org Date: Thu, 13 Dec 2018 02:26:44 +0400 Message-Id: <20181212222648.595-3-marcandre.lureau@redhat.com> In-Reply-To: <20181212222648.595-1-marcandre.lureau@redhat.com> References: <20181212222648.595-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Wed, 12 Dec 2018 22:27:14 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v13 2/6] tpm: allocate/map buffer for TPM Physical Presence interface X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , "Michael S. Tsirkin" , stefanb@linux.vnet.ibm.com, f4bug@amsat.org, =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Igor Mammedov , Paolo Bonzini , Richard Henderson , Stefan Berger Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Stefan Berger Implement a virtual memory device for the TPM Physical Presence interface. The memory is located at 0xFED45000 and used by ACPI to send messages to the firmware (BIOS) and by the firmware to provide parameters for each one of the supported codes. This interface should be used by all TPM devices on x86 and can be added by calling tpm_ppi_init_io(). Note: bios_linker cannot be used to allocate the PPI memory region, since the reserved memory should stay stable across reboots, and might be needed before the ACPI tables are installed. Signed-off-by: Stefan Berger Signed-off-by: Marc-Andr=C3=A9 Lureau Reviewed-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/tpm/tpm_ppi.h | 37 +++++++++++++++++++++++++++++++++++++ include/hw/acpi/tpm.h | 6 ++++++ hw/tpm/tpm_crb.c | 7 +++++++ hw/tpm/tpm_ppi.c | 31 +++++++++++++++++++++++++++++++ hw/tpm/tpm_tis.c | 7 +++++++ hw/tpm/Makefile.objs | 1 + 6 files changed, 89 insertions(+) create mode 100644 hw/tpm/tpm_ppi.h create mode 100644 hw/tpm/tpm_ppi.c diff --git a/hw/tpm/tpm_ppi.h b/hw/tpm/tpm_ppi.h new file mode 100644 index 0000000000..1598e28262 --- /dev/null +++ b/hw/tpm/tpm_ppi.h @@ -0,0 +1,37 @@ +/* + * TPM Physical Presence Interface + * + * Copyright (C) 2018 IBM Corporation + * + * Authors: + * Stefan Berger + * + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + */ +#ifndef TPM_TPM_PPI_H +#define TPM_TPM_PPI_H + +#include "hw/acpi/tpm.h" +#include "exec/address-spaces.h" + +typedef struct TPMPPI { + MemoryRegion ram; + uint8_t *buf; +} TPMPPI; + +/** + * tpm_ppi_init: + * @tpmppi: a TPMPPI + * @m: the address-space / MemoryRegion to use + * @addr: the address of the PPI region + * @obj: the owner object + * @errp: an Error** + * + * Register the TPM PPI memory region at @addr on the given address + * space for the object @obj. + **/ +void tpm_ppi_init(TPMPPI *tpmppi, struct MemoryRegion *m, + hwaddr addr, Object *obj); + +#endif /* TPM_TPM_PPI_H */ diff --git a/include/hw/acpi/tpm.h b/include/hw/acpi/tpm.h index 3580ffd50c..b8796df916 100644 --- a/include/hw/acpi/tpm.h +++ b/include/hw/acpi/tpm.h @@ -188,4 +188,10 @@ REG32(CRB_DATA_BUFFER, 0x80) #define TPM2_START_METHOD_MMIO 6 #define TPM2_START_METHOD_CRB 7 =20 +/* + * Physical Presence Interface + */ +#define TPM_PPI_ADDR_SIZE 0x400 +#define TPM_PPI_ADDR_BASE 0xFED45000 + #endif /* HW_ACPI_TPM_H */ diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c index d5b0ac5920..012ec686d4 100644 --- a/hw/tpm/tpm_crb.c +++ b/hw/tpm/tpm_crb.c @@ -29,6 +29,7 @@ #include "sysemu/reset.h" #include "tpm_int.h" #include "tpm_util.h" +#include "tpm_ppi.h" #include "trace.h" =20 typedef struct CRBState { @@ -43,6 +44,7 @@ typedef struct CRBState { size_t be_buffer_size; =20 bool ppi_enabled; + TPMPPI ppi; } CRBState; =20 #define CRB(obj) OBJECT_CHECK(CRBState, (obj), TYPE_TPM_CRB) @@ -294,6 +296,11 @@ static void tpm_crb_realize(DeviceState *dev, Error **= errp) memory_region_add_subregion(get_system_memory(), TPM_CRB_ADDR_BASE + sizeof(s->regs), &s->cmdmem); =20 + if (s->ppi_enabled) { + tpm_ppi_init(&s->ppi, get_system_memory(), + TPM_PPI_ADDR_BASE, OBJECT(s)); + } + qemu_register_reset(tpm_crb_reset, dev); } =20 diff --git a/hw/tpm/tpm_ppi.c b/hw/tpm/tpm_ppi.c new file mode 100644 index 0000000000..cf17779c20 --- /dev/null +++ b/hw/tpm/tpm_ppi.c @@ -0,0 +1,31 @@ +/* + * tpm_ppi.c - TPM Physical Presence Interface + * + * Copyright (C) 2018 IBM Corporation + * + * Authors: + * Stefan Berger + * + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + * + */ + +#include "qemu/osdep.h" + +#include "qapi/error.h" +#include "cpu.h" +#include "sysemu/memory_mapping.h" +#include "migration/vmstate.h" +#include "tpm_ppi.h" + +void tpm_ppi_init(TPMPPI *tpmppi, struct MemoryRegion *m, + hwaddr addr, Object *obj) +{ + tpmppi->buf =3D g_malloc0(HOST_PAGE_ALIGN(TPM_PPI_ADDR_SIZE)); + memory_region_init_ram_device_ptr(&tpmppi->ram, obj, "tpm-ppi", + TPM_PPI_ADDR_SIZE, tpmppi->buf); + vmstate_register_ram(&tpmppi->ram, DEVICE(obj)); + + memory_region_add_subregion(m, addr, &tpmppi->ram); +} diff --git a/hw/tpm/tpm_tis.c b/hw/tpm/tpm_tis.c index cbb9a84a5b..da8af8e0e0 100644 --- a/hw/tpm/tpm_tis.c +++ b/hw/tpm/tpm_tis.c @@ -31,6 +31,7 @@ #include "sysemu/tpm_backend.h" #include "tpm_int.h" #include "tpm_util.h" +#include "tpm_ppi.h" #include "trace.h" =20 #define TPM_TIS_NUM_LOCALITIES 5 /* per spec */ @@ -83,6 +84,7 @@ typedef struct TPMState { size_t be_buffer_size; =20 bool ppi_enabled; + TPMPPI ppi; } TPMState; =20 #define TPM(obj) OBJECT_CHECK(TPMState, (obj), TYPE_TPM_TIS) @@ -979,6 +981,11 @@ static void tpm_tis_realizefn(DeviceState *dev, Error = **errp) =20 memory_region_add_subregion(isa_address_space(ISA_DEVICE(dev)), TPM_TIS_ADDR_BASE, &s->mmio); + + if (s->ppi_enabled) { + tpm_ppi_init(&s->ppi, isa_address_space(ISA_DEVICE(dev)), + TPM_PPI_ADDR_BASE, OBJECT(s)); + } } =20 static void tpm_tis_initfn(Object *obj) diff --git a/hw/tpm/Makefile.objs b/hw/tpm/Makefile.objs index 1dc9f8bf2c..700c878622 100644 --- a/hw/tpm/Makefile.objs +++ b/hw/tpm/Makefile.objs @@ -1,4 +1,5 @@ common-obj-y +=3D tpm_util.o +obj-y +=3D tpm_ppi.o common-obj-$(CONFIG_TPM_TIS) +=3D tpm_tis.o common-obj-$(CONFIG_TPM_CRB) +=3D tpm_crb.o common-obj-$(CONFIG_TPM_PASSTHROUGH) +=3D tpm_passthrough.o --=20 2.20.0 From nobody Thu Nov 6 22:55:41 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1544653775638275.55578150584915; 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Wed, 12 Dec 2018 22:27:25 +0000 (UTC) Received: from localhost (ovpn-112-51.ams2.redhat.com [10.36.112.51]) by smtp.corp.redhat.com (Postfix) with ESMTP id 6DCCA5D9C7; Wed, 12 Dec 2018 22:27:18 +0000 (UTC) From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= To: qemu-devel@nongnu.org Date: Thu, 13 Dec 2018 02:26:45 +0400 Message-Id: <20181212222648.595-4-marcandre.lureau@redhat.com> In-Reply-To: <20181212222648.595-1-marcandre.lureau@redhat.com> References: <20181212222648.595-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.48]); Wed, 12 Dec 2018 22:27:25 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v13 3/6] acpi: expose TPM/PPI configuration parameters to firmware via fw_cfg X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , "Michael S. Tsirkin" , stefanb@linux.vnet.ibm.com, f4bug@amsat.org, =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Igor Mammedov , Paolo Bonzini , Richard Henderson , Stefan Berger Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Stefan Berger To avoid having to hard code the base address of the PPI virtual memory device we introduce a fw_cfg file etc/tpm/config that holds the base address of the PPI device, the version of the PPI interface and the version of the attached TPM. Signed-off-by: Stefan Berger [ Marc-Andr=C3=A9: renamed to etc/tpm/config, made it static, document it ] Signed-off-by: Marc-Andr=C3=A9 Lureau Acked-by: Michael S. Tsirkin Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/acpi/tpm.h | 3 +++ hw/i386/acpi-build.c | 19 +++++++++++++++++++ docs/specs/tpm.txt | 19 +++++++++++++++++++ 3 files changed, 41 insertions(+) diff --git a/include/hw/acpi/tpm.h b/include/hw/acpi/tpm.h index b8796df916..a6109a97fc 100644 --- a/include/hw/acpi/tpm.h +++ b/include/hw/acpi/tpm.h @@ -194,4 +194,7 @@ REG32(CRB_DATA_BUFFER, 0x80) #define TPM_PPI_ADDR_SIZE 0x400 #define TPM_PPI_ADDR_BASE 0xFED45000 =20 +#define TPM_PPI_VERSION_NONE 0 +#define TPM_PPI_VERSION_1_30 1 + #endif /* HW_ACPI_TPM_H */ diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 236a20eaa8..7b5c67e202 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -119,6 +119,12 @@ typedef struct AcpiBuildPciBusHotplugState { bool pcihp_bridge_en; } AcpiBuildPciBusHotplugState; =20 +typedef struct FwCfgTPMConfig { + uint32_t tpmppi_address; + uint8_t tpm_version; + uint8_t tpmppi_version; +} QEMU_PACKED FwCfgTPMConfig; + static void init_common_fadt_data(Object *o, AcpiFadtData *data) { uint32_t io =3D object_property_get_uint(o, ACPI_PM_PROP_PM_IO_BASE, N= ULL); @@ -2855,6 +2861,8 @@ void acpi_setup(void) AcpiBuildTables tables; AcpiBuildState *build_state; Object *vmgenid_dev; + TPMIf *tpm; + static FwCfgTPMConfig tpm_config; =20 if (!pcms->fw_cfg) { ACPI_BUILD_DPRINTF("No fw cfg. Bailing out.\n"); @@ -2889,6 +2897,17 @@ void acpi_setup(void) fw_cfg_add_file(pcms->fw_cfg, ACPI_BUILD_TPMLOG_FILE, tables.tcpalog->data, acpi_data_len(tables.tcpalog)); =20 + tpm =3D tpm_find(); + if (tpm && object_property_get_bool(OBJECT(tpm), "ppi", &error_abort))= { + tpm_config =3D (FwCfgTPMConfig) { + .tpmppi_address =3D cpu_to_le32(TPM_PPI_ADDR_BASE), + .tpm_version =3D tpm_get_version(tpm), + .tpmppi_version =3D TPM_PPI_VERSION_NONE + }; + fw_cfg_add_file(pcms->fw_cfg, "etc/tpm/config", + &tpm_config, sizeof tpm_config); + } + vmgenid_dev =3D find_vmgenid_dev(); if (vmgenid_dev) { vmgenid_add_fw_cfg(VMGENID(vmgenid_dev), pcms->fw_cfg, diff --git a/docs/specs/tpm.txt b/docs/specs/tpm.txt index 1af82bba86..e4bb094700 100644 --- a/docs/specs/tpm.txt +++ b/docs/specs/tpm.txt @@ -34,6 +34,25 @@ The CRB interface makes a memory mapped IO region in the= area 0xfed40000 - QEMU files related to TPM CRB interface: - hw/tpm/tpm_crb.c =20 +=3D fw_cfg interface =3D + +The bios/firmware may read the "etc/tpm/config" fw_cfg entry for +configuring the guest appropriately. + +The entry of 6 bytes has the following content, in little-endian: + + #define TPM_VERSION_UNSPEC 0 + #define TPM_VERSION_1_2 1 + #define TPM_VERSION_2_0 2 + + #define TPM_PPI_VERSION_NONE 0 + #define TPM_PPI_VERSION_1_30 1 + + struct FwCfgTPMConfig { + uint32_t tpmppi_address; /* PPI memory location */ + uint8_t tpm_version; /* TPM version */ + uint8_t tpmppi_version; /* PPI version */ + }; =20 =3D ACPI Interface =3D =20 --=20 2.20.0 From nobody Thu Nov 6 22:55:41 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1544653860006677.021284253686; Wed, 12 Dec 2018 14:31:00 -0800 (PST) Received: from localhost ([::1]:48999 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gXD1u-0007HJ-OA for importer@patchew.org; Wed, 12 Dec 2018 17:30:58 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48120) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gXCyn-0004cc-Qe for qemu-devel@nongnu.org; Wed, 12 Dec 2018 17:27:48 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gXCyi-0004Bh-DE for qemu-devel@nongnu.org; Wed, 12 Dec 2018 17:27:45 -0500 Received: from mx1.redhat.com ([209.132.183.28]:60126) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gXCyg-00049i-Ep for qemu-devel@nongnu.org; Wed, 12 Dec 2018 17:27:40 -0500 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id D5D013E2AF; Wed, 12 Dec 2018 22:27:36 +0000 (UTC) Received: from localhost (ovpn-112-51.ams2.redhat.com [10.36.112.51]) by smtp.corp.redhat.com (Postfix) with ESMTP id 2CFD260C44; Wed, 12 Dec 2018 22:27:28 +0000 (UTC) From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= To: qemu-devel@nongnu.org Date: Thu, 13 Dec 2018 02:26:46 +0400 Message-Id: <20181212222648.595-5-marcandre.lureau@redhat.com> In-Reply-To: <20181212222648.595-1-marcandre.lureau@redhat.com> References: <20181212222648.595-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Wed, 12 Dec 2018 22:27:37 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v13 4/6] acpi: build TPM Physical Presence interface X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , "Michael S. Tsirkin" , stefanb@linux.vnet.ibm.com, f4bug@amsat.org, =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Igor Mammedov , Paolo Bonzini , Richard Henderson , Stefan Berger Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Stefan Berger The TPM Physical Presence interface consists of an ACPI part, a shared memory part, and code in the firmware. Users can send messages to the firmware by writing a code into the shared memory through invoking the ACPI code. When a reboot happens, the firmware looks for the code and acts on it by sending sequences of commands to the TPM. This patch adds the ACPI code. It is similar to the one in EDK2 but doesn't assume that SMIs are necessary to use. It uses a similar datastructure for the shared memory as EDK2 does so that EDK2 and SeaBIOS could both make use of it. I extended the shared memory data structure with an array of 256 bytes, one for each code that could be implemented. The array contains flags describing the individual codes. This decouples the ACPI implementati= on from the firmware implementation. The underlying TCG specification is accessible from the following page. https://trustedcomputinggroup.org/tcg-physical-presence-interface-specifica= tion/ This patch implements version 1.30. Signed-off-by: Stefan Berger [ Marc-Andr=C3=A9 - ACPI code improvements and windows fixes ] Signed-off-by: Marc-Andr=C3=A9 Lureau Acked-by: Michael S. Tsirkin Reviewed-by: Igor Mammedov --- include/hw/acpi/tpm.h | 12 ++ hw/acpi/tpm.c | 400 ++++++++++++++++++++++++++++++++++++++++++ hw/i386/acpi-build.c | 12 +- docs/specs/tpm.txt | 83 +++++++++ hw/acpi/Makefile.objs | 1 + 5 files changed, 505 insertions(+), 3 deletions(-) create mode 100644 hw/acpi/tpm.c diff --git a/include/hw/acpi/tpm.h b/include/hw/acpi/tpm.h index a6109a97fc..1a2a57a21f 100644 --- a/include/hw/acpi/tpm.h +++ b/include/hw/acpi/tpm.h @@ -18,6 +18,8 @@ =20 #include "qemu/units.h" #include "hw/registerfields.h" +#include "hw/acpi/aml-build.h" +#include "sysemu/tpm.h" =20 #define TPM_TIS_ADDR_BASE 0xFED40000 #define TPM_TIS_ADDR_SIZE 0x5000 @@ -197,4 +199,14 @@ REG32(CRB_DATA_BUFFER, 0x80) #define TPM_PPI_VERSION_NONE 0 #define TPM_PPI_VERSION_1_30 1 =20 +/* whether function is blocked by BIOS settings; bits 0, 1, 2 */ +#define TPM_PPI_FUNC_NOT_IMPLEMENTED (0 << 0) +#define TPM_PPI_FUNC_BIOS_ONLY (1 << 0) +#define TPM_PPI_FUNC_BLOCKED (2 << 0) +#define TPM_PPI_FUNC_ALLOWED_USR_REQ (3 << 0) +#define TPM_PPI_FUNC_ALLOWED_USR_NOT_REQ (4 << 0) +#define TPM_PPI_FUNC_MASK (7 << 0) + +void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev); + #endif /* HW_ACPI_TPM_H */ diff --git a/hw/acpi/tpm.c b/hw/acpi/tpm.c new file mode 100644 index 0000000000..fee9490306 --- /dev/null +++ b/hw/acpi/tpm.c @@ -0,0 +1,400 @@ +/* Support for generating ACPI TPM tables + * + * Copyright (C) 2018 IBM, Corp. + * Copyright (C) 2018 Red Hat Inc + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, see . + */ +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/acpi/tpm.h" + +void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev) +{ + Aml *method, *field, *ifctx, *ifctx2, *ifctx3, *func_mask, + *not_implemented, *pak, *tpm2, *tpm3, *pprm, *pprq, *zero, *one; + + if (!object_property_get_bool(OBJECT(tpm), "ppi", &error_abort)) { + return; + } + + zero =3D aml_int(0); + one =3D aml_int(1); + func_mask =3D aml_int(TPM_PPI_FUNC_MASK); + not_implemented =3D aml_int(TPM_PPI_FUNC_NOT_IMPLEMENTED); + + /* + * TPP2 is for the registers that ACPI code used to pass + * the PPI code and parameter (PPRQ, PPRM) to the firmware. + */ + aml_append(dev, + aml_operation_region("TPP2", AML_SYSTEM_MEMORY, + aml_int(TPM_PPI_ADDR_BASE + 0x100), + 0x5A)); + field =3D aml_field("TPP2", AML_ANY_ACC, AML_NOLOCK, AML_PRESERVE); + aml_append(field, aml_named_field("PPIN", 8)); + aml_append(field, aml_named_field("PPIP", 32)); + aml_append(field, aml_named_field("PPRP", 32)); + aml_append(field, aml_named_field("PPRQ", 32)); + aml_append(field, aml_named_field("PPRM", 32)); + aml_append(field, aml_named_field("LPPR", 32)); + aml_append(dev, field); + pprq =3D aml_name("PPRQ"); + pprm =3D aml_name("PPRM"); + + /* + * DerefOf in Windows is broken with SYSTEM_MEMORY. Use a dynamic + * operation region inside of a method for getting FUNC[op]. + */ + method =3D aml_method("TPFN", 1, AML_SERIALIZED); + { + Aml *op =3D aml_arg(0); + ifctx =3D aml_if(aml_lgreater_equal(op, aml_int(0x100))); + { + aml_append(ifctx, aml_return(zero)); + } + aml_append(method, ifctx); + + aml_append(method, + aml_operation_region("TPP1", AML_SYSTEM_MEMORY, + aml_add(aml_int(TPM_PPI_ADDR_BASE), op, NULL), 0x1)); + field =3D aml_field("TPP1", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE= ); + aml_append(field, aml_named_field("TPPF", 8)); + aml_append(method, field); + aml_append(method, aml_return(aml_name("TPPF"))); + } + aml_append(dev, method); + + /* + * Use global TPM2 & TPM3 variables to workaround Windows ACPI bug + * when returning packages. + */ + pak =3D aml_package(2); + aml_append(pak, zero); + aml_append(pak, zero); + aml_append(dev, aml_name_decl("TPM2", pak)); + tpm2 =3D aml_name("TPM2"); + + pak =3D aml_package(3); + aml_append(pak, zero); + aml_append(pak, zero); + aml_append(pak, zero); + aml_append(dev, aml_name_decl("TPM3", pak)); + tpm3 =3D aml_name("TPM3"); + + method =3D aml_method("_DSM", 4, AML_SERIALIZED); + { + uint8_t zerobyte[1] =3D { 0 }; + Aml *function, *arguments, *rev, *op, *op_arg, *op_flags, *uuid; + + uuid =3D aml_arg(0); + rev =3D aml_arg(1); + function =3D aml_arg(2); + arguments =3D aml_arg(3); + op =3D aml_local(0); + op_flags =3D aml_local(1); + + ifctx =3D aml_if( + aml_equal(uuid, + aml_touuid("3DDDFAA6-361B-4EB4-A424-8D10089D1653"))); + { + /* standard DSM query function */ + ifctx2 =3D aml_if(aml_equal(function, zero)); + { + uint8_t byte_list[2] =3D { 0xff, 0x01 }; + aml_append(ifctx2, aml_return(aml_buffer(2, byte_list))); + } + aml_append(ifctx, ifctx2); + + /* + * PPI 1.0: 2.1.1 Get Physical Presence Interface Version + * + * Arg 2 (Integer): Function Index =3D 1 + * Arg 3 (Package): Arguments =3D Empty Package + * Returns: Type: String + */ + ifctx2 =3D aml_if(aml_equal(function, one)); + { + aml_append(ifctx2, aml_return(aml_string("1.3"))); + } + aml_append(ifctx, ifctx2); + + /* + * PPI 1.0: 2.1.3 Submit TPM Operation Request to Pre-OS Envir= onment + * + * Arg 2 (Integer): Function Index =3D 2 + * Arg 3 (Package): Arguments =3D Package: Type: Integer + * Operation Value of the Request + * Returns: Type: Integer + * 0: Success + * 1: Operation Value of the Request Not Supported + * 2: General Failure + */ + ifctx2 =3D aml_if(aml_equal(function, aml_int(2))); + { + /* get opcode */ + aml_append(ifctx2, + aml_store(aml_derefof(aml_index(arguments, + zero)), op)); + + /* get opcode flags */ + aml_append(ifctx2, + aml_store(aml_call1("TPFN", op), op_flags)); + + /* if func[opcode] & TPM_PPI_FUNC_NOT_IMPLEMENTED */ + ifctx3 =3D aml_if( + aml_equal( + aml_and(op_flags, func_mask, NULL), + not_implemented)); + { + /* 1: Operation Value of the Request Not Supported */ + aml_append(ifctx3, aml_return(one)); + } + aml_append(ifctx2, ifctx3); + + aml_append(ifctx2, aml_store(op, pprq)); + aml_append(ifctx2, aml_store(zero, pprm)); + /* 0: success */ + aml_append(ifctx2, aml_return(zero)); + } + aml_append(ifctx, ifctx2); + + /* + * PPI 1.0: 2.1.4 Get Pending TPM Operation Requested By the OS + * + * Arg 2 (Integer): Function Index =3D 3 + * Arg 3 (Package): Arguments =3D Empty Package + * Returns: Type: Package of Integers + * Integer 1: Function Return code + * 0: Success + * 1: General Failure + * Integer 2: Pending operation requested by the OS + * 0: None + * >0: Operation Value of the Pending Reque= st + * Integer 3: Optional argument to pending operation + * requested by the OS + * 0: None + * >0: Argument Value of the Pending Request + */ + ifctx2 =3D aml_if(aml_equal(function, aml_int(3))); + { + /* + * Revision ID of 1, no integer parameter beyond + * parameter two are expected + */ + ifctx3 =3D aml_if(aml_equal(rev, one)); + { + /* TPM2[1] =3D PPRQ */ + aml_append(ifctx3, + aml_store(pprq, aml_index(tpm2, one))); + aml_append(ifctx3, aml_return(tpm2)); + } + aml_append(ifctx2, ifctx3); + + /* + * A return value of {0, 23, 1} indicates that + * operation 23 with argument 1 is pending. + */ + ifctx3 =3D aml_if(aml_equal(rev, aml_int(2))); + { + /* TPM3[1] =3D PPRQ */ + aml_append(ifctx3, + aml_store(pprq, aml_index(tpm3, one))); + /* TPM3[2] =3D PPRM */ + aml_append(ifctx3, + aml_store(pprm, aml_index(tpm3, aml_int(2))= )); + aml_append(ifctx3, aml_return(tpm3)); + } + aml_append(ifctx2, ifctx3); + } + aml_append(ifctx, ifctx2); + + /* + * PPI 1.0: 2.1.5 Get Platform-Specific Action to Transition to + * Pre-OS Environment + * + * Arg 2 (Integer): Function Index =3D 4 + * Arg 3 (Package): Arguments =3D Empty Package + * Returns: Type: Integer + * 0: None + * 1: Shutdown + * 2: Reboot + * 3: OS Vendor-specific + */ + ifctx2 =3D aml_if(aml_equal(function, aml_int(4))); + { + /* reboot */ + aml_append(ifctx2, aml_return(aml_int(2))); + } + aml_append(ifctx, ifctx2); + + /* + * PPI 1.0: 2.1.6 Return TPM Operation Response to OS Environm= ent + * + * Arg 2 (Integer): Function Index =3D 5 + * Arg 3 (Package): Arguments =3D Empty Package + * Returns: Type: Package of Integer + * Integer 1: Function Return code + * 0: Success + * 1: General Failure + * Integer 2: Most recent operation request + * 0: None + * >0: Operation Value of the most recent r= equest + * Integer 3: Response to the most recent operation r= equest + * 0: Success + * 0x00000001..0x00000FFF: Corresponding T= PM + * error code + * 0xFFFFFFF0: User Abort or timeout of di= alog + * 0xFFFFFFF1: firmware Failure + */ + ifctx2 =3D aml_if(aml_equal(function, aml_int(5))); + { + /* TPM3[1] =3D LPPR */ + aml_append(ifctx2, + aml_store(aml_name("LPPR"), + aml_index(tpm3, one))); + /* TPM3[2] =3D PPRP */ + aml_append(ifctx2, + aml_store(aml_name("PPRP"), + aml_index(tpm3, aml_int(2)))); + aml_append(ifctx2, aml_return(tpm3)); + } + aml_append(ifctx, ifctx2); + + /* + * PPI 1.0: 2.1.7 Submit preferred user language + * + * Arg 2 (Integer): Function Index =3D 6 + * Arg 3 (Package): Arguments =3D String Package + * Preferred language code + * Returns: Type: Integer + * Function Return Code + * 3: Not implemented + */ + ifctx2 =3D aml_if(aml_equal(function, aml_int(6))); + { + /* 3 =3D not implemented */ + aml_append(ifctx2, aml_return(aml_int(3))); + } + aml_append(ifctx, ifctx2); + + /* + * PPI 1.1: 2.1.7 Submit TPM Operation Request to + * Pre-OS Environment 2 + * + * Arg 2 (Integer): Function Index =3D 7 + * Arg 3 (Package): Arguments =3D Package: Type: Integer + * Integer 1: Operation Value of the Request + * Integer 2: Argument for Operation (optiona= l) + * Returns: Type: Integer + * 0: Success + * 1: Not Implemented + * 2: General Failure + * 3: Operation blocked by current firmware settings + */ + ifctx2 =3D aml_if(aml_equal(function, aml_int(7))); + { + /* get opcode */ + aml_append(ifctx2, aml_store(aml_derefof(aml_index(argumen= ts, + zero)), + op)); + + /* get opcode flags */ + aml_append(ifctx2, aml_store(aml_call1("TPFN", op), + op_flags)); + /* if func[opcode] & TPM_PPI_FUNC_NOT_IMPLEMENTED */ + ifctx3 =3D aml_if( + aml_equal( + aml_and(op_flags, func_mask, NULL), + not_implemented)); + { + /* 1: not implemented */ + aml_append(ifctx3, aml_return(one)); + } + aml_append(ifctx2, ifctx3); + + /* if func[opcode] & TPM_PPI_FUNC_BLOCKED */ + ifctx3 =3D aml_if( + aml_equal( + aml_and(op_flags, func_mask, NULL), + aml_int(TPM_PPI_FUNC_BLOCKED))); + { + /* 3: blocked by firmware */ + aml_append(ifctx3, aml_return(aml_int(3))); + } + aml_append(ifctx2, ifctx3); + + /* revision to integer */ + ifctx3 =3D aml_if(aml_equal(rev, one)); + { + /* revision 1 */ + /* PPRQ =3D op */ + aml_append(ifctx3, aml_store(op, pprq)); + /* no argument, PPRM =3D 0 */ + aml_append(ifctx3, aml_store(zero, pprm)); + } + aml_append(ifctx2, ifctx3); + + ifctx3 =3D aml_if(aml_equal(rev, aml_int(2))); + { + /* revision 2 */ + /* PPRQ =3D op */ + op_arg =3D aml_derefof(aml_index(arguments, one)); + aml_append(ifctx3, aml_store(op, pprq)); + /* PPRM =3D arg3[1] */ + aml_append(ifctx3, aml_store(op_arg, pprm)); + } + aml_append(ifctx2, ifctx3); + /* 0: success */ + aml_append(ifctx2, aml_return(zero)); + } + aml_append(ifctx, ifctx2); + + /* + * PPI 1.1: 2.1.8 Get User Confirmation Status for Operation + * + * Arg 2 (Integer): Function Index =3D 8 + * Arg 3 (Package): Arguments =3D Package: Type: Integer + * Operation Value that may need user confirm= ation + * Returns: Type: Integer + * 0: Not implemented + * 1: Firmware only + * 2: Blocked for OS by firmware configuration + * 3: Allowed and physically present user required + * 4: Allowed and physically present user not required + */ + ifctx2 =3D aml_if(aml_equal(function, aml_int(8))); + { + /* get opcode */ + aml_append(ifctx2, + aml_store(aml_derefof(aml_index(arguments, + zero)), + op)); + + /* get opcode flags */ + aml_append(ifctx2, aml_store(aml_call1("TPFN", op), + op_flags)); + /* return confirmation status code */ + aml_append(ifctx2, + aml_return( + aml_and(op_flags, func_mask, NULL))); + } + aml_append(ifctx, ifctx2); + + aml_append(ifctx, aml_return(aml_buffer(1, zerobyte))); + } + aml_append(method, ifctx); + } + aml_append(dev, method); +} diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 7b5c67e202..f0a233472a 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -1802,6 +1802,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, uint32_t nr_mem =3D machine->ram_slots; int root_bus_limit =3D 0xFF; PCIBus *bus =3D NULL; + TPMIf *tpm =3D tpm_find(); int i; =20 dsdt =3D init_aml_allocator(); @@ -2139,7 +2140,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, /* Scan all PCI buses. Generate tables to support hotplug. */ build_append_pci_bus_devices(scope, bus, pm->pcihp_bridge_en); =20 - if (TPM_IS_TIS(tpm_find())) { + if (TPM_IS_TIS(tpm)) { dev =3D aml_device("ISA.TPM"); aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0C31"= ))); aml_append(dev, aml_name_decl("_STA", aml_int(0xF))); @@ -2153,6 +2154,9 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, */ /* aml_append(crs, aml_irq_no_flags(TPM_TIS_IRQ)); */ aml_append(dev, aml_name_decl("_CRS", crs)); + + tpm_build_ppi_acpi(tpm, dev); + aml_append(scope, dev); } =20 @@ -2160,7 +2164,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, } } =20 - if (TPM_IS_CRB(tpm_find())) { + if (TPM_IS_CRB(tpm)) { dev =3D aml_device("TPM"); aml_append(dev, aml_name_decl("_HID", aml_string("MSFT0101"))); crs =3D aml_resource_template(); @@ -2172,6 +2176,8 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, aml_append(method, aml_return(aml_int(0x0f))); aml_append(dev, method); =20 + tpm_build_ppi_acpi(tpm, dev); + aml_append(sb_scope, dev); } =20 @@ -2902,7 +2908,7 @@ void acpi_setup(void) tpm_config =3D (FwCfgTPMConfig) { .tpmppi_address =3D cpu_to_le32(TPM_PPI_ADDR_BASE), .tpm_version =3D tpm_get_version(tpm), - .tpmppi_version =3D TPM_PPI_VERSION_NONE + .tpmppi_version =3D TPM_PPI_VERSION_1_30 }; fw_cfg_add_file(pcms->fw_cfg, "etc/tpm/config", &tpm_config, sizeof tpm_config); diff --git a/docs/specs/tpm.txt b/docs/specs/tpm.txt index e4bb094700..424d1511fc 100644 --- a/docs/specs/tpm.txt +++ b/docs/specs/tpm.txt @@ -76,6 +76,89 @@ URL: =20 https://trustedcomputinggroup.org/tcg-acpi-specification/ =20 +=3D=3D ACPI PPI Interface =3D=3D + +QEMU supports the Physical Presence Interface (PPI) for TPM 1.2 and TPM 2.= This +interface requires ACPI and firmware support. The specification can be fou= nd at +the following URL: + +https://trustedcomputinggroup.org/resource/tcg-physical-presence-interface= -specification/ + +PPI enables a system administrator (root) to request a modification to the +TPM upon reboot. The PPI specification defines the operation requests and = the +actions the firmware has to take. The system administrator passes the oper= ation +request number to the firmware through an ACPI interface which writes this +number to a memory location that the firmware knows. Upon reboot, the firm= ware +finds the number and sends commands to the the TPM. The firmware writes th= e TPM +result code and the operation request number to a memory location that ACP= I can +read from and pass the result on to the administrator. + +The PPI specification defines a set of mandatory and optional operations f= or +the firmware to implement. The ACPI interface also allows an administrator= to +list the supported operations. In QEMU the ACPI code is generated by QEMU,= yet +the firmware needs to implement support on a per-operations basis, and +different firmwares may support a different subset. Therefore, QEMU introd= uces +the virtual memory device for PPI where the firmware can indicate which +operations it supports and ACPI can enable the ones that are supported and +disable all others. This interface lies in main memory and has the followi= ng +layout: + + +----------+--------+--------+-------------------------------------------+ + | Field | Length | Offset | Description | + +----------+--------+--------+-------------------------------------------+ + | func | 0x100 | 0x000 | Firmware sets values for each supported | + | | | | operation. See defined values below. | + +----------+--------+--------+-------------------------------------------+ + | ppin | 0x1 | 0x100 | SMI interrupt to use. Set by firmware. | + | | | | Not supported. | + +----------+--------+--------+-------------------------------------------+ + | ppip | 0x4 | 0x101 | ACPI function index to pass to SMM code. | + | | | | Set by ACPI. Not supported. | + +----------+--------+--------+-------------------------------------------+ + | pprp | 0x4 | 0x105 | Result of last executed operation. Set by | + | | | | firmware. See function index 5 for values.| + +----------+--------+--------+-------------------------------------------+ + | pprq | 0x4 | 0x109 | Operation request number to execute. See | + | | | | 'Physical Presence Interface Operation | + | | | | Summary' tables in specs. Set by ACPI. | + +----------+--------+--------+-------------------------------------------+ + | pprm | 0x4 | 0x10d | Operation request optional parameter. | + | | | | Values depend on operation. Set by ACPI. | + +----------+--------+--------+-------------------------------------------+ + | lppr | 0x4 | 0x111 | Last executed operation request number. | + | | | | Copied from pprq field by firmware. | + +----------+--------+--------+-------------------------------------------+ + | fret | 0x4 | 0x115 | Result code from SMM function. | + | | | | Not supported. | + +----------+--------+--------+-------------------------------------------+ + | res1 | 0x40 | 0x119 | Reserved for future use | + +----------+--------+--------+-------------------------------------------+ + | next_step| 0x1 | 0x159 | Operation to execute after reboot by | + | | | | firmware. Used by firmware. | + +----------+--------+--------+-------------------------------------------+ + + The following values are supported for the 'func' field. They correspond + to the values used by ACPI function index 8. + + +----------+-------------------------------------------------------------+ + | value | Description | + +----------+-------------------------------------------------------------+ + | 0 | Operation is not implemented. | + +----------+-------------------------------------------------------------+ + | 1 | Operation is only accessible through firmware. | + +----------+-------------------------------------------------------------+ + | 2 | Operation is blocked for OS by firmware configuration. | + +----------+-------------------------------------------------------------+ + | 3 | Operation is allowed and physically present user required. | + +----------+-------------------------------------------------------------+ + | 4 | Operation is allowed and physically present user is not | + | | required. | + +----------+-------------------------------------------------------------+ + +The location of the table is given by the fw_cfg tpmppi_address field. +The PPI memory region size is 0x400 (TPM_PPI_ADDR_SIZE) to leave +enough room for future updates. + =20 QEMU files related to TPM ACPI tables: - hw/i386/acpi-build.c diff --git a/hw/acpi/Makefile.objs b/hw/acpi/Makefile.objs index 11c35bcb44..2d46e3789a 100644 --- a/hw/acpi/Makefile.objs +++ b/hw/acpi/Makefile.objs @@ -11,6 +11,7 @@ common-obj-$(call lnot,$(CONFIG_ACPI_X86)) +=3D acpi-stub= .o common-obj-y +=3D acpi_interface.o common-obj-y +=3D bios-linker-loader.o common-obj-y +=3D aml-build.o +common-obj-$(CONFIG_TPM) +=3D tpm.o =20 common-obj-$(CONFIG_IPMI) +=3D ipmi.o common-obj-$(call lnot,$(CONFIG_IPMI)) +=3D ipmi-stub.o --=20 2.20.0 From nobody Thu Nov 6 22:55:41 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1544653947870669.56961144025; Wed, 12 Dec 2018 14:32:27 -0800 (PST) Received: from localhost ([::1]:49028 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gXD3K-0008K4-O8 for importer@patchew.org; Wed, 12 Dec 2018 17:32:26 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48429) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gXCzA-00051j-4G for qemu-devel@nongnu.org; Wed, 12 Dec 2018 17:28:09 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gXCz4-0004ZE-NC for qemu-devel@nongnu.org; Wed, 12 Dec 2018 17:28:07 -0500 Received: from mx1.redhat.com ([209.132.183.28]:37956) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gXCz4-0004Vs-AL for qemu-devel@nongnu.org; Wed, 12 Dec 2018 17:28:02 -0500 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id D17523001A52; Wed, 12 Dec 2018 22:28:00 +0000 (UTC) Received: from localhost (ovpn-112-51.ams2.redhat.com [10.36.112.51]) by smtp.corp.redhat.com (Postfix) with ESMTP id F12522617B; Wed, 12 Dec 2018 22:27:40 +0000 (UTC) From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= To: qemu-devel@nongnu.org Date: Thu, 13 Dec 2018 02:26:47 +0400 Message-Id: <20181212222648.595-6-marcandre.lureau@redhat.com> In-Reply-To: <20181212222648.595-1-marcandre.lureau@redhat.com> References: <20181212222648.595-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.44]); Wed, 12 Dec 2018 22:28:01 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v13 5/6] acpi: add ACPI memory clear interface X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , "Michael S. Tsirkin" , stefanb@linux.vnet.ibm.com, f4bug@amsat.org, =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Igor Mammedov , Paolo Bonzini , Richard Henderson , Stefan Berger Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" The interface is described in the "TCG Platform Reset Attack Mitigation Specification", chapter 6 "ACPI _DSM Function". According to Laszlo, it's not so easy to implement in OVMF, he suggested to do it in qemu instead. See specification documentation for more details, and next commit for memory clear on reset handling. Signed-off-by: Marc-Andr=C3=A9 Lureau --- include/hw/acpi/tpm.h | 2 ++ hw/acpi/tpm.c | 47 +++++++++++++++++++++++++++++++++++++++++++ docs/specs/tpm.txt | 2 ++ 3 files changed, 51 insertions(+) diff --git a/include/hw/acpi/tpm.h b/include/hw/acpi/tpm.h index 1a2a57a21f..7245eac4f9 100644 --- a/include/hw/acpi/tpm.h +++ b/include/hw/acpi/tpm.h @@ -207,6 +207,8 @@ REG32(CRB_DATA_BUFFER, 0x80) #define TPM_PPI_FUNC_ALLOWED_USR_NOT_REQ (4 << 0) #define TPM_PPI_FUNC_MASK (7 << 0) =20 +#define TPM_PPI_MOVV_OFFSET 0x15a + void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev); =20 #endif /* HW_ACPI_TPM_H */ diff --git a/hw/acpi/tpm.c b/hw/acpi/tpm.c index fee9490306..e3f92db570 100644 --- a/hw/acpi/tpm.c +++ b/hw/acpi/tpm.c @@ -53,6 +53,15 @@ void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev) pprq =3D aml_name("PPRQ"); pprm =3D aml_name("PPRM"); =20 + aml_append(dev, + aml_operation_region("TPP3", AML_SYSTEM_MEMORY, + aml_int(TPM_PPI_ADDR_BASE + + TPM_PPI_MOVV_OFFSET), + 0x1)); + field =3D aml_field("TPP3", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE); + aml_append(field, aml_named_field("MOVV", 8)); + aml_append(dev, field); + /* * DerefOf in Windows is broken with SYSTEM_MEMORY. Use a dynamic * operation region inside of a method for getting FUNC[op]. @@ -395,6 +404,44 @@ void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev) aml_append(ifctx, aml_return(aml_buffer(1, zerobyte))); } aml_append(method, ifctx); + + ifctx =3D aml_if( + aml_equal(uuid, + aml_touuid("376054ED-CC13-4675-901C-4756D7F2D45D"))); + { + /* standard DSM query function */ + ifctx2 =3D aml_if(aml_equal(function, zero)); + { + uint8_t byte_list[1] =3D { 0x03 }; + aml_append(ifctx2, aml_return(aml_buffer(1, byte_list))); + } + aml_append(ifctx, ifctx2); + + /* + * TCG Platform Reset Attack Mitigation Specification 1.0 Ch.6 + * + * Arg 2 (Integer): Function Index =3D 1 + * Arg 3 (Package): Arguments =3D Package: Type: Integer + * Operation Value of the Request + * Returns: Type: Integer + * 0: Success + * 1: General Failure + */ + ifctx2 =3D aml_if(aml_equal(function, one)); + { + aml_append(ifctx2, + aml_store(aml_derefof(aml_index(arguments, zero= )), + op)); + { + aml_append(ifctx2, aml_store(op, aml_name("MOVV"))); + + /* 0: success */ + aml_append(ifctx2, aml_return(zero)); + } + } + aml_append(ifctx, ifctx2); + } + aml_append(method, ifctx); } aml_append(dev, method); } diff --git a/docs/specs/tpm.txt b/docs/specs/tpm.txt index 424d1511fc..5d8c26b1ad 100644 --- a/docs/specs/tpm.txt +++ b/docs/specs/tpm.txt @@ -135,6 +135,8 @@ layout: +----------+--------+--------+-------------------------------------------+ | next_step| 0x1 | 0x159 | Operation to execute after reboot by | | | | | firmware. Used by firmware. | + +----------+--------+--------+-------------------------------------------+ + | movv | 0x1 | 0x15a | Memory overwrite variable | +----------+--------+--------+-------------------------------------------+ =20 The following values are supported for the 'func' field. They correspond --=20 2.20.0 From nobody Thu Nov 6 22:55:41 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1544654073077878.0294635470831; Wed, 12 Dec 2018 14:34:33 -0800 (PST) Received: from localhost ([::1]:49086 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gXD5C-00018h-6K for importer@patchew.org; Wed, 12 Dec 2018 17:34:22 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48695) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gXCza-0005gP-9y for qemu-devel@nongnu.org; Wed, 12 Dec 2018 17:28:35 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gXCzS-0004ul-C6 for qemu-devel@nongnu.org; Wed, 12 Dec 2018 17:28:32 -0500 Received: from mx1.redhat.com ([209.132.183.28]:38786) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gXCzR-0004sU-UY for qemu-devel@nongnu.org; Wed, 12 Dec 2018 17:28:26 -0500 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 75A333C2CEB; Wed, 12 Dec 2018 22:28:24 +0000 (UTC) Received: from localhost (ovpn-112-51.ams2.redhat.com [10.36.112.51]) by smtp.corp.redhat.com (Postfix) with ESMTP id 9F7785D9C7; Wed, 12 Dec 2018 22:28:04 +0000 (UTC) From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= To: qemu-devel@nongnu.org Date: Thu, 13 Dec 2018 02:26:48 +0400 Message-Id: <20181212222648.595-7-marcandre.lureau@redhat.com> In-Reply-To: <20181212222648.595-1-marcandre.lureau@redhat.com> References: <20181212222648.595-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Wed, 12 Dec 2018 22:28:24 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v13 6/6] tpm: clear RAM when "memory overwrite" requested X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , "Michael S. Tsirkin" , stefanb@linux.vnet.ibm.com, f4bug@amsat.org, =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Igor Mammedov , Paolo Bonzini , Richard Henderson , Stefan Berger Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Note: the "Platform Reset Attack Mitigation" specification isn't explicit about NVDIMM, since they could have different usages. It uses the term "system memory" generally (and also "volatile memory RAM" in its introduction). For initial support, I propose to consider non-volatile memory as not being subject to the memory clear. There is an on-going discussion in the TCG "pcclientwg" working group for future revisions. CPU cache clearing is done unconditionally in edk2 since commit d20ae95a13e851 (edk2-stable201811). Signed-off-by: Marc-Andr=C3=A9 Lureau Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/tpm/tpm_ppi.h | 10 ++++++++++ hw/tpm/tpm_crb.c | 1 + hw/tpm/tpm_ppi.c | 22 ++++++++++++++++++++++ hw/tpm/tpm_tis.c | 1 + hw/tpm/trace-events | 3 +++ 5 files changed, 37 insertions(+) diff --git a/hw/tpm/tpm_ppi.h b/hw/tpm/tpm_ppi.h index 1598e28262..0b4a5adcf8 100644 --- a/hw/tpm/tpm_ppi.h +++ b/hw/tpm/tpm_ppi.h @@ -34,4 +34,14 @@ typedef struct TPMPPI { void tpm_ppi_init(TPMPPI *tpmppi, struct MemoryRegion *m, hwaddr addr, Object *obj); =20 +/** + * tpm_ppi_reset: + * @tpmppi: a TPMPPI + * + * Function to call on machine reset. It will check if the "Memory + * overwrite" variable is set, and perform a memory clear on volatile + * memory if requested. + **/ +void tpm_ppi_reset(TPMPPI *tpmppi); + #endif /* TPM_TPM_PPI_H */ diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c index 012ec686d4..663469bd20 100644 --- a/hw/tpm/tpm_crb.c +++ b/hw/tpm/tpm_crb.c @@ -233,6 +233,7 @@ static void tpm_crb_reset(void *dev) { CRBState *s =3D CRB(dev); =20 + tpm_ppi_reset(&s->ppi); tpm_backend_reset(s->tpmbe); =20 memset(s->regs, 0, sizeof(s->regs)); diff --git a/hw/tpm/tpm_ppi.c b/hw/tpm/tpm_ppi.c index cf17779c20..914762c014 100644 --- a/hw/tpm/tpm_ppi.c +++ b/hw/tpm/tpm_ppi.c @@ -16,8 +16,30 @@ #include "qapi/error.h" #include "cpu.h" #include "sysemu/memory_mapping.h" +#include "sysemu/reset.h" #include "migration/vmstate.h" #include "tpm_ppi.h" +#include "trace.h" + +void tpm_ppi_reset(TPMPPI *tpmppi) +{ + if (tpmppi->buf[TPM_PPI_MOVV_OFFSET] & 0x1) { + GuestPhysBlockList guest_phys_blocks; + GuestPhysBlock *block; + + guest_phys_blocks_init(&guest_phys_blocks); + guest_phys_blocks_append(&guest_phys_blocks); + QTAILQ_FOREACH(block, &guest_phys_blocks.head, next) { + trace_tpm_ppi_memset(block->host_addr, + block->target_end - block->target_start); + memset(block->host_addr, 0, + block->target_end - block->target_start); + memory_region_set_dirty(block->mr, 0, + block->target_end - block->target_star= t); + } + guest_phys_blocks_free(&guest_phys_blocks); + } +} =20 void tpm_ppi_init(TPMPPI *tpmppi, struct MemoryRegion *m, hwaddr addr, Object *obj) diff --git a/hw/tpm/tpm_tis.c b/hw/tpm/tpm_tis.c index da8af8e0e0..225c675302 100644 --- a/hw/tpm/tpm_tis.c +++ b/hw/tpm/tpm_tis.c @@ -868,6 +868,7 @@ static void tpm_tis_reset(DeviceState *dev) s->be_buffer_size =3D MIN(tpm_backend_get_buffer_size(s->be_driver), TPM_TIS_BUFFER_MAX); =20 + tpm_ppi_reset(&s->ppi); tpm_backend_reset(s->be_driver); =20 s->active_locty =3D TPM_TIS_NO_LOCALITY; diff --git a/hw/tpm/trace-events b/hw/tpm/trace-events index 25bee0cecf..920d32ad55 100644 --- a/hw/tpm/trace-events +++ b/hw/tpm/trace-events @@ -51,3 +51,6 @@ tpm_tis_mmio_write_init_abort(void) "Initiating abort" tpm_tis_mmio_write_lowering_irq(void) "Lowering IRQ" tpm_tis_mmio_write_data2send(uint32_t value, unsigned size) "Data to send = to TPM: 0x%08x (size=3D%d)" tpm_tis_pre_save(uint8_t locty, uint32_t rw_offset) "locty: %d, rw_offset = =3D %u" + +# hw/tpm/tpm_ppi.c +tpm_ppi_memset(uint8_t *ptr, size_t size) "memset: %p %zu" --=20 2.20.0