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X-Received-From: 2607:f8b0:4864:20::542 Subject: [Qemu-devel] [PATCH 1/2] aspeed: Add syscon-poweroff to guest device tree X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jeffery , qemu-arm@nongnu.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" This adds a node to the guest's device tree that allows it to cause Qemu to exit when the guest shuts down. Signed-off-by: Joel Stanley Reviewed-by: C=C3=A9dric Le Goater --- hw/arm/aspeed.c | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 515898548284..00060d44ad51 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -21,8 +21,10 @@ #include "hw/i2c/smbus.h" #include "qemu/log.h" #include "sysemu/block-backend.h" +#include "sysemu/device_tree.h" #include "hw/loader.h" #include "qemu/error-report.h" +#include =20 static struct arm_boot_info aspeed_board_binfo =3D { .board_id =3D -1, /* device-tree-only board */ @@ -126,6 +128,36 @@ static void write_boot_rom(DriveInfo *dinfo, hwaddr ad= dr, size_t rom_size, g_free(storage); } =20 +static void fdt_add_shutdown_node(void *fdt) +{ + const char *nodename =3D "/syscon-poweroff"; + uint32_t phandle; + int offset; + + /* Find the scu phandle */ + offset =3D fdt_path_offset(fdt, "/ahb/apb/syscon@1e6e2000"); + if (offset < 0) { + error_report("%s couldn't find syscon, guest shutdown unavailable:= %s", + __func__, fdt_strerror(offset)); + return; + } + phandle =3D fdt_get_phandle(fdt, offset); + + /* Add syscon-poweroff node and use 0x1A0, an un-used SCU register */ + qemu_fdt_add_subnode(fdt, nodename); + qemu_fdt_setprop_string(fdt, nodename, "compatible", "syscon-poweroff"= ); + qemu_fdt_setprop_cells(fdt, nodename, "regmap", phandle); + qemu_fdt_setprop_cells(fdt, nodename, "offset", 0x1A0); + qemu_fdt_setprop_cells(fdt, nodename, "value", 1); +} + +static void aspeed_board_modify_dtb(const struct arm_boot_info *binfo, + void *fdt) +{ + fdt_add_shutdown_node(fdt); +} + + static void aspeed_board_init_flashes(AspeedSMCState *s, const char *flash= type, Error **errp) { @@ -228,6 +260,7 @@ static void aspeed_board_init(MachineState *machine, aspeed_board_binfo.kernel_cmdline =3D machine->kernel_cmdline; aspeed_board_binfo.ram_size =3D ram_size; aspeed_board_binfo.loader_start =3D sc->info->sdram_base; + aspeed_board_binfo.modify_dtb =3D aspeed_board_modify_dtb; =20 if (cfg->i2c_init) { cfg->i2c_init(bmc); --=20 2.19.1 From nobody Fri May 3 05:49:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; 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X-Received-From: 2607:f8b0:4864:20::541 Subject: [Qemu-devel] [PATCH 2/2] aspeed/scu: Implement power off register X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jeffery , qemu-arm@nongnu.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" This register does not exist in hardware. It is here to allow the guest code to cause Qemu to exit when required. The register address chosen is unused in the emulated machines datasheets. Signed-off-by: Joel Stanley Reviewed-by: C=C3=A9dric Le Goater --- hw/misc/aspeed_scu.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c index c8217740efc1..aa17d032ba93 100644 --- a/hw/misc/aspeed_scu.c +++ b/hw/misc/aspeed_scu.c @@ -16,6 +16,7 @@ #include "qapi/visitor.h" #include "qemu/bitops.h" #include "qemu/log.h" +#include "sysemu/sysemu.h" #include "crypto/random.h" #include "trace.h" =20 @@ -84,6 +85,7 @@ #define SRAM_DECODE_BASE1 TO_REG(0x194) #define SRAM_DECODE_BASE2 TO_REG(0x198) #define BMC_REV TO_REG(0x19C) +#define POWEROFF TO_REG(0x1A0) #define BMC_DEV_ID TO_REG(0x1A4) =20 #define SCU_IO_REGION_SIZE 0x1000 @@ -264,6 +266,9 @@ static void aspeed_scu_write(void *opaque, hwaddr offse= t, uint64_t data, } /* Avoid assignment below, we've handled everything */ return; + case POWEROFF: + qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); + break; case FREQ_CNTR_EVAL: case VGA_SCRATCH1 ... VGA_SCRATCH8: case RNG_DATA: --=20 2.19.1