From nobody Sat Apr 27 06:00:19 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1544461106373710.5109671466705; Mon, 10 Dec 2018 08:58:26 -0800 (PST) Received: from localhost ([::1]:33698 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gWOsz-0002at-8Z for importer@patchew.org; Mon, 10 Dec 2018 11:58:25 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37121) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gWOrL-0001OF-DD for qemu-devel@nongnu.org; Mon, 10 Dec 2018 11:56:44 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gWOrK-00083W-Cr for qemu-devel@nongnu.org; Mon, 10 Dec 2018 11:56:43 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:53426) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gWOrK-00080R-3x for qemu-devel@nongnu.org; Mon, 10 Dec 2018 11:56:42 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1gWOrF-0000MR-TT; Mon, 10 Dec 2018 16:56:37 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Mon, 10 Dec 2018 16:56:34 +0000 Message-Id: <20181210165636.28366-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181210165636.28366-1-peter.maydell@linaro.org> References: <20181210165636.28366-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [RFC 1/3] target/m68k: In dump_address_map() check for memory access failures X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland , Laurent Vivier , patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" In dump_address_map(), use address_space_ldl() instead of ldl_phys(). This allows us to check whether the memory access failed. Signed-off-by: Peter Maydell Reviewed-by: Laurent Vivier Tested-by: Laurent Vivier --- target/m68k/helper.c | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/target/m68k/helper.c b/target/m68k/helper.c index 917d46efcc3..374e4861886 100644 --- a/target/m68k/helper.c +++ b/target/m68k/helper.c @@ -411,6 +411,7 @@ static void dump_address_map(FILE *f, fprintf_function = cpu_fprintf, int last_attr =3D -1, attr =3D -1; M68kCPU *cpu =3D m68k_env_get_cpu(env); CPUState *cs =3D CPU(cpu); + MemTxResult txres; =20 if (env->mmu.tcr & M68K_TCR_PAGE_8K) { /* 8k page */ @@ -424,22 +425,29 @@ static void dump_address_map(FILE *f, fprintf_functio= n cpu_fprintf, tib_mask =3D M68K_4K_PAGE_MASK; } for (i =3D 0; i < M68K_ROOT_POINTER_ENTRIES; i++) { - tia =3D ldl_phys(cs->as, M68K_POINTER_BASE(root_pointer) + i * 4); - if (!M68K_UDT_VALID(tia)) { + tia =3D address_space_ldl(cs->as, M68K_POINTER_BASE(root_pointer) = + i * 4, + MEMTXATTRS_UNSPECIFIED, &txres); + if (txres !=3D MEMTX_OK || !M68K_UDT_VALID(tia)) { continue; } for (j =3D 0; j < M68K_ROOT_POINTER_ENTRIES; j++) { - tib =3D ldl_phys(cs->as, M68K_POINTER_BASE(tia) + j * 4); - if (!M68K_UDT_VALID(tib)) { + tib =3D address_space_ldl(cs->as, M68K_POINTER_BASE(tia) + j *= 4, + MEMTXATTRS_UNSPECIFIED, &txres); + if (txres !=3D MEMTX_OK || !M68K_UDT_VALID(tib)) { continue; } for (k =3D 0; k < tic_size; k++) { - tic =3D ldl_phys(cs->as, (tib & tib_mask) + k * 4); - if (!M68K_PDT_VALID(tic)) { + tic =3D address_space_ldl(cs->as, (tib & tib_mask) + k * 4, + MEMTXATTRS_UNSPECIFIED, &txres); + if (txres !=3D MEMTX_OK || !M68K_PDT_VALID(tic)) { continue; } if (M68K_PDT_INDIRECT(tic)) { - tic =3D ldl_phys(cs->as, M68K_INDIRECT_POINTER(tic)); + tic =3D address_space_ldl(cs->as, M68K_INDIRECT_POINTE= R(tic), + MEMTXATTRS_UNSPECIFIED, &txres= ); + if (txres !=3D MEMTX_OK) { + continue; + } } =20 last_logical =3D logical; --=20 2.19.2 From nobody Sat Apr 27 06:00:19 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1544462720377512.1443213936342; Mon, 10 Dec 2018 09:25:20 -0800 (PST) Received: from localhost ([::1]:33918 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gWPIw-0001wV-TD for importer@patchew.org; Mon, 10 Dec 2018 12:25:14 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44276) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gWPHm-0001SB-3q for qemu-devel@nongnu.org; Mon, 10 Dec 2018 12:24:03 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gWPHk-0008CJ-6G for qemu-devel@nongnu.org; Mon, 10 Dec 2018 12:24:02 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:53442) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gWPHj-0008BI-Rg for qemu-devel@nongnu.org; Mon, 10 Dec 2018 12:24:00 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1gWOrG-0000Me-EI; Mon, 10 Dec 2018 16:56:38 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Mon, 10 Dec 2018 16:56:35 +0000 Message-Id: <20181210165636.28366-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181210165636.28366-1-peter.maydell@linaro.org> References: <20181210165636.28366-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [RFC 2/3] target/m68k: In get_physical_address() check for memory access failures X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland , Laurent Vivier , patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" In get_physical_address(), use address_space_ldl() and address_space_stl() instead of ldl_phys() and stl_phys(). This allows us to check whether the memory access failed. For the moment, we simply return -1 in this case; add a TODO comment that we should ideally generate the appropriate kind of fault. Signed-off-by: Peter Maydell Reviewed-by: Laurent Vivier Tested-by: Laurent Vivier --- target/m68k/helper.c | 62 +++++++++++++++++++++++++++++++++++++------- 1 file changed, 52 insertions(+), 10 deletions(-) diff --git a/target/m68k/helper.c b/target/m68k/helper.c index 374e4861886..b5fa2f8056d 100644 --- a/target/m68k/helper.c +++ b/target/m68k/helper.c @@ -660,6 +660,7 @@ static int get_physical_address(CPUM68KState *env, hwad= dr *physical, bool debug =3D access_type & ACCESS_DEBUG; int page_bits; int i; + MemTxResult txres; =20 /* Transparent Translation (physical =3D logical) */ for (i =3D 0; i < M68K_MAX_TTR; i++) { @@ -689,12 +690,19 @@ static int get_physical_address(CPUM68KState *env, hw= addr *physical, /* Root Index */ entry =3D M68K_POINTER_BASE(next) | M68K_ROOT_INDEX(address); =20 - next =3D ldl_phys(cs->as, entry); + next =3D address_space_ldl(cs->as, entry, MEMTXATTRS_UNSPECIFIED, &txr= es); + if (txres !=3D MEMTX_OK) { + goto txfail; + } if (!M68K_UDT_VALID(next)) { return -1; } if (!(next & M68K_DESC_USED) && !debug) { - stl_phys(cs->as, entry, next | M68K_DESC_USED); + address_space_stl(cs->as, entry, next | M68K_DESC_USED, + MEMTXATTRS_UNSPECIFIED, &txres); + if (txres !=3D MEMTX_OK) { + goto txfail; + } } if (next & M68K_DESC_WRITEPROT) { if (access_type & ACCESS_PTEST) { @@ -709,12 +717,19 @@ static int get_physical_address(CPUM68KState *env, hw= addr *physical, /* Pointer Index */ entry =3D M68K_POINTER_BASE(next) | M68K_POINTER_INDEX(address); =20 - next =3D ldl_phys(cs->as, entry); + next =3D address_space_ldl(cs->as, entry, MEMTXATTRS_UNSPECIFIED, &txr= es); + if (txres !=3D MEMTX_OK) { + goto txfail; + } if (!M68K_UDT_VALID(next)) { return -1; } if (!(next & M68K_DESC_USED) && !debug) { - stl_phys(cs->as, entry, next | M68K_DESC_USED); + address_space_stl(cs->as, entry, next | M68K_DESC_USED, + MEMTXATTRS_UNSPECIFIED, &txres); + if (txres !=3D MEMTX_OK) { + goto txfail; + } } if (next & M68K_DESC_WRITEPROT) { if (access_type & ACCESS_PTEST) { @@ -733,27 +748,46 @@ static int get_physical_address(CPUM68KState *env, hw= addr *physical, entry =3D M68K_4K_PAGE_BASE(next) | M68K_4K_PAGE_INDEX(address); } =20 - next =3D ldl_phys(cs->as, entry); + next =3D address_space_ldl(cs->as, entry, MEMTXATTRS_UNSPECIFIED, &txr= es); + if (txres !=3D MEMTX_OK) { + goto txfail; + } =20 if (!M68K_PDT_VALID(next)) { return -1; } if (M68K_PDT_INDIRECT(next)) { - next =3D ldl_phys(cs->as, M68K_INDIRECT_POINTER(next)); + next =3D address_space_ldl(cs->as, M68K_INDIRECT_POINTER(next), + MEMTXATTRS_UNSPECIFIED, &txres); + if (txres !=3D MEMTX_OK) { + goto txfail; + } } if (access_type & ACCESS_STORE) { if (next & M68K_DESC_WRITEPROT) { if (!(next & M68K_DESC_USED) && !debug) { - stl_phys(cs->as, entry, next | M68K_DESC_USED); + address_space_stl(cs->as, entry, next | M68K_DESC_USED, + MEMTXATTRS_UNSPECIFIED, &txres); + if (txres !=3D MEMTX_OK) { + goto txfail; + } } } else if ((next & (M68K_DESC_MODIFIED | M68K_DESC_USED)) !=3D (M68K_DESC_MODIFIED | M68K_DESC_USED) && !debug= ) { - stl_phys(cs->as, entry, - next | (M68K_DESC_MODIFIED | M68K_DESC_USED)); + address_space_stl(cs->as, entry, + next | (M68K_DESC_MODIFIED | M68K_DESC_USED), + MEMTXATTRS_UNSPECIFIED, &txres); + if (txres !=3D MEMTX_OK) { + goto txfail; + } } } else { if (!(next & M68K_DESC_USED) && !debug) { - stl_phys(cs->as, entry, next | M68K_DESC_USED); + address_space_stl(cs->as, entry, next | M68K_DESC_USED, + MEMTXATTRS_UNSPECIFIED, &txres); + if (txres !=3D MEMTX_OK) { + goto txfail; + } } } =20 @@ -785,6 +819,14 @@ static int get_physical_address(CPUM68KState *env, hwa= ddr *physical, } =20 return 0; + +txfail: + /* + * A page table load/store failed. TODO: we should really raise a + * suitable guest fault here if this is not a debug access. + * For now just return that the translation failed. + */ + return -1; } =20 hwaddr m68k_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) --=20 2.19.2 From nobody Sat Apr 27 06:00:19 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1544461106749483.9671056798909; Mon, 10 Dec 2018 08:58:26 -0800 (PST) Received: from localhost ([::1]:33697 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gWOsz-0002VK-NV for importer@patchew.org; Mon, 10 Dec 2018 11:58:25 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37108) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gWOrK-0001O8-Dw for qemu-devel@nongnu.org; Mon, 10 Dec 2018 11:56:43 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gWOrJ-00082w-CD for qemu-devel@nongnu.org; Mon, 10 Dec 2018 11:56:42 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:53426) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gWOrJ-00080R-0x for qemu-devel@nongnu.org; Mon, 10 Dec 2018 11:56:41 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1gWOrH-0000Mz-0D; Mon, 10 Dec 2018 16:56:39 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Mon, 10 Dec 2018 16:56:36 +0000 Message-Id: <20181210165636.28366-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181210165636.28366-1-peter.maydell@linaro.org> References: <20181210165636.28366-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [RFC 3/3] target/m68k: Switch to transaction_failed hook X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland , Laurent Vivier , patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Switch the m68k target from the old unassigned_access hook to the transaction_failed hook. The notable difference is that rather than it being called for all physical memory accesses which fail (including those made by DMA devices or by the gdbstub), it is only called for those made by the CPU via its MMU. (In previous commits we put in explicit checks for the direct physical loads made by the target/m68k code which will no longer be handled by calling the unassigned_access hook.) Signed-off-by: Peter Maydell Reviewed-by: Laurent Vivier Tested-by: Laurent Vivier --- target/m68k/cpu.h | 7 ++++--- target/m68k/cpu.c | 2 +- target/m68k/op_helper.c | 20 ++++++++------------ 3 files changed, 13 insertions(+), 16 deletions(-) diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index b288a3864e0..08828b0581b 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -545,9 +545,10 @@ static inline int cpu_mmu_index (CPUM68KState *env, bo= ol ifetch) =20 int m68k_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, int = rw, int mmu_idx); -void m68k_cpu_unassigned_access(CPUState *cs, hwaddr addr, - bool is_write, bool is_exec, int is_asi, - unsigned size); +void m68k_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr, + unsigned size, MMUAccessType access_type, + int mmu_idx, MemTxAttrs attrs, + MemTxResult response, uintptr_t retaddr); =20 #include "exec/cpu-all.h" =20 diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 582e3a73b37..6d09c630b0e 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -271,7 +271,7 @@ static void m68k_cpu_class_init(ObjectClass *c, void *d= ata) cc->gdb_write_register =3D m68k_cpu_gdb_write_register; cc->handle_mmu_fault =3D m68k_cpu_handle_mmu_fault; #if defined(CONFIG_SOFTMMU) - cc->do_unassigned_access =3D m68k_cpu_unassigned_access; + cc->do_transaction_failed =3D m68k_cpu_transaction_failed; cc->get_phys_page_debug =3D m68k_cpu_get_phys_page_debug; #endif cc->disas_set_info =3D m68k_cpu_disas_set_info; diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index 8d09ed91c49..6739ab8e436 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -454,19 +454,15 @@ static inline void do_interrupt_m68k_hardirq(CPUM68KS= tate *env) do_interrupt_all(env, 1); } =20 -void m68k_cpu_unassigned_access(CPUState *cs, hwaddr addr, bool is_write, - bool is_exec, int is_asi, unsigned size) +void m68k_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr, + unsigned size, MMUAccessType access_type, + int mmu_idx, MemTxAttrs attrs, + MemTxResult response, uintptr_t retaddr) { M68kCPU *cpu =3D M68K_CPU(cs); CPUM68KState *env =3D &cpu->env; -#ifdef DEBUG_UNASSIGNED - qemu_log_mask(CPU_LOG_INT, "Unassigned " TARGET_FMT_plx " wr=3D%d exe= =3D%d\n", - addr, is_write, is_exec); -#endif - if (env =3D=3D NULL) { - /* when called from gdb, env is NULL */ - return; - } + + cpu_restore_state(cs, retaddr, true); =20 if (m68k_feature(env, M68K_FEATURE_M68040)) { env->mmu.mmusr =3D 0; @@ -476,7 +472,7 @@ void m68k_cpu_unassigned_access(CPUState *cs, hwaddr ad= dr, bool is_write, if (env->sr & SR_S) { /* SUPERVISOR */ env->mmu.ssw |=3D M68K_TM_040_SUPER; } - if (is_exec) { /* instruction or data */ + if (access_type =3D=3D MMU_INST_FETCH) { /* instruction or data */ env->mmu.ssw |=3D M68K_TM_040_CODE; } else { env->mmu.ssw |=3D M68K_TM_040_DATA; @@ -494,7 +490,7 @@ void m68k_cpu_unassigned_access(CPUState *cs, hwaddr ad= dr, bool is_write, break; } =20 - if (!is_write) { + if (access_type !=3D MMU_DATA_STORE) { env->mmu.ssw |=3D M68K_RW_040; } =20 --=20 2.19.2