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[189.204.159.172]) by smtp.gmail.com with ESMTPSA id c19sm2037594otl.16.2018.12.07.02.37.01 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 07 Dec 2018 02:37:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=offWiYQFX6nV0RjdB1cFsP2+NJhS8A/OLt/978IHcjg=; b=jdTuc7UTLxakTXJoDEcLuj92E6HS4WIqNWatLV19tr8AojY6hmvxZRiGCxk4Vc0+dT /W4PfTm78t1ky6eKraYBXyXDL9IqYw2edaB5/IVPZL3peKD4xWMCEkraxKDMpYIBJ9U9 PfKmyPAAeSlafuCUSJ9zuEcD4RQA9HVkd/Gr0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=offWiYQFX6nV0RjdB1cFsP2+NJhS8A/OLt/978IHcjg=; b=oDS3KEoIBAo88TPfX59wV5jflKQKPATkwa1VEELmWZFoRlkW53cNKu2SFBlhq/t+zX 9CF5MAqm2nb5Ho3ZYGUuAVM/Ea9rqk9AB3dZWVzWQADCCFReT6qaK+drmCd+GSx8Vaxo JRHKzL9R2BtILSzvParf1/BVZuBrDdn8FZ2Osp4tvg1KXd8RnmwDCCisXTN8k+WIS1AI qwZ0ZOVmWjI3OyQ12jyBAfJMp4xY1ExVG/xoWaDdvPM328wHNKTCHSTR/WrTZgVRihzl DWJM9n85Mvn2sfcslqRqldxfACB+Qu7CSTfD2BYf79TcBUApKUsrgjrI/egsDuch2DeP g8xw== X-Gm-Message-State: AA+aEWZSGckHMS4sp94+2aV6D4KMm6vs1JiHMIQJaptqDXgly6dHHfmY JaagU5I9YcIeEIv2xnirXYefh+83iQA= X-Google-Smtp-Source: AFSGD/V3UuUAyqdTH6p/4hGOhaFgeOeeFKiioZygaKzT5eClQrHkmp9KxETO7L9lscCMXUDiI/Gg8Q== X-Received: by 2002:aca:b58b:: with SMTP id e133mr958099oif.25.1544179022546; Fri, 07 Dec 2018 02:37:02 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 7 Dec 2018 04:36:23 -0600 Message-Id: <20181207103631.28193-19-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181207103631.28193-1-richard.henderson@linaro.org> References: <20181207103631.28193-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::243 Subject: [Qemu-devel] [PATCH 18/26] target/arm: Export aa64_va_parameters to internals.h X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, ramana.radhakrishnan@arm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" We need to reuse this from helper-a64.c. Provide a stub definition for CONFIG_USER_ONLY. This matches the stub definitions that we removed for arm_regime_tbi{0,1} before. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/internals.h | 29 +++++++++++++++++++++++++++++ target/arm/helper.c | 16 ++-------------- 2 files changed, 31 insertions(+), 14 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index 6bc0daf560..4d25b267e8 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -912,4 +912,33 @@ void arm_cpu_update_virq(ARMCPU *cpu); */ void arm_cpu_update_vfiq(ARMCPU *cpu); =20 +typedef struct ARMVAParameters { + unsigned tsz : 8; + unsigned select : 1; + bool tbi : 1; + bool epd : 1; + bool hpd : 1; + bool ha : 1; + bool hd : 1; + bool using16k : 1; + bool using64k : 1; +} ARMVAParameters; + +#ifdef CONFIG_USER_ONLY +static inline ARMVAParameters aa64_va_parameters(CPUARMState *env, + uint64_t va, + ARMMMUIdx mmu_idx, bool d= ata) +{ + return (ARMVAParameters) { + /* 48-bit address space */ + .tsz =3D 16, + /* We can't handle tagged addresses properly in user-only mode */ + .tbi =3D false, + }; +} +#else +ARMVAParameters aa64_va_parameters(CPUARMState *env, uint64_t va, + ARMMMUIdx mmu_idx, bool data); +#endif + #endif diff --git a/target/arm/helper.c b/target/arm/helper.c index 3ad5909b1e..c73525f813 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -9712,20 +9712,8 @@ static uint8_t convert_stage2_attrs(CPUARMState *env= , uint8_t s2attrs) return (hiattr << 6) | (hihint << 4) | (loattr << 2) | lohint; } =20 -typedef struct ARMVAParameters { - unsigned tsz : 8; - unsigned select : 1; - bool tbi : 1; - bool epd : 1; - bool hpd : 1; - bool ha : 1; - bool hd : 1; - bool using16k : 1; - bool using64k : 1; -} ARMVAParameters; - -static ARMVAParameters aa64_va_parameters(CPUARMState *env, uint64_t va, - ARMMMUIdx mmu_idx, bool data) +ARMVAParameters aa64_va_parameters(CPUARMState *env, uint64_t va, + ARMMMUIdx mmu_idx, bool data) { uint64_t tcr =3D regime_tcr(env, mmu_idx)->raw_tcr; uint32_t el =3D regime_el(env, mmu_idx); --=20 2.17.2