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[97.113.170.180]) by smtp.gmail.com with ESMTPSA id a18sm6973967pgj.30.2018.11.30.13.52.40 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 30 Nov 2018 13:52:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=bmUmb8zTaahVnT4oIhk8zyyRNcm/80ZCLJTuwVNXCf8=; b=KEtaNMs2TsPv8UqimAS6HAQc6Qi5a/W2i45sjrFZtuHnr1lnzDKNEOHm2ocWbjkbD1 mkfWpwaX+R/SBK0eYB+XtbMUxvxxU72GUC6GfJMjcZg+mjwVFZbnBeoqitDY4M5/sUnC rr6O08+RYSl4Q1Nxh1HzETSNf8fECRsPBg0qk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=bmUmb8zTaahVnT4oIhk8zyyRNcm/80ZCLJTuwVNXCf8=; b=Ei3efNrDYAvSwWCYG8cTqzVYmPyV6XV69PWjBe/TovuiKrrflCWw+b+yr6M68gVG7s mfdD7uSNNjYSixGf8TnJHiAITIFuPtZsaAXx1rFNLrePXu5CO1ZJbyk1AH9CtCENULeM XDtNSTfunXJi7tRWoxp4LhJN26vt3VL7y+Qt9rFyd3qdjC0dwANOsxx+or5Bc9kW06L9 NNanyl/WT67m8oWF7TQJImtm4w3F0TCbb37krm5q+jEmaJYMhcNRAT3F6KO+5llRRXxY euH7bAMpRsv1dmTdXJPDaTeIRPzeuSMIozJN8BDsA9sJTbwce1RSJ0eZSI535PISBQ/D eZfQ== X-Gm-Message-State: AA+aEWb0CfbysIMJAmOArGTJ96ZlcxQiWfcyBCzFVIxv6plVz+3IyyRK m1asA20U6zS+bE4d6OoispoyrsKQsg4= X-Google-Smtp-Source: AFSGD/UBWiSfxKpJvLJ+SSfx9NSoXNVNR0HFKpN6oLbgRt88wlYyenhwGceYqXTbDQSN9BNFP/pSjw== X-Received: by 2002:a63:5f95:: with SMTP id t143mr6237306pgb.395.1543614761989; Fri, 30 Nov 2018 13:52:41 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 30 Nov 2018 13:52:20 -0800 Message-Id: <20181130215221.20554-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181130215221.20554-1-richard.henderson@linaro.org> References: <20181130215221.20554-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::542 Subject: [Qemu-devel] [PATCH v3 15/16] tcg/ppc: Return false on failure from patch_reloc X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The reloc_pc{14,24}_val routines retain their asserts. Use these directly within the slow paths. Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e --- tcg/ppc/tcg-target.inc.c | 32 +++++++++++++++++++++----------- 1 file changed, 21 insertions(+), 11 deletions(-) diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c index 860b0d36e1..8c1cfdd7ac 100644 --- a/tcg/ppc/tcg-target.inc.c +++ b/tcg/ppc/tcg-target.inc.c @@ -193,9 +193,14 @@ static uint32_t reloc_pc24_val(tcg_insn_unit *pc, tcg_= insn_unit *target) return disp & 0x3fffffc; } =20 -static void reloc_pc24(tcg_insn_unit *pc, tcg_insn_unit *target) +static bool reloc_pc24(tcg_insn_unit *pc, tcg_insn_unit *target) { - *pc =3D (*pc & ~0x3fffffc) | reloc_pc24_val(pc, target); + ptrdiff_t disp =3D tcg_ptr_byte_diff(target, pc); + if (in_range_b(disp)) { + *pc =3D (*pc & ~0x3fffffc) | (disp & 0x3fffffc); + return true; + } + return false; } =20 static uint16_t reloc_pc14_val(tcg_insn_unit *pc, tcg_insn_unit *target) @@ -205,9 +210,14 @@ static uint16_t reloc_pc14_val(tcg_insn_unit *pc, tcg_= insn_unit *target) return disp & 0xfffc; } =20 -static void reloc_pc14(tcg_insn_unit *pc, tcg_insn_unit *target) +static bool reloc_pc14(tcg_insn_unit *pc, tcg_insn_unit *target) { - *pc =3D (*pc & ~0xfffc) | reloc_pc14_val(pc, target); + ptrdiff_t disp =3D tcg_ptr_byte_diff(target, pc); + if (disp =3D=3D (int16_t) disp) { + *pc =3D (*pc & ~0xfffc) | (disp & 0xfffc); + return true; + } + return false; } =20 /* parse target specific constraints */ @@ -524,11 +534,9 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int t= ype, =20 switch (type) { case R_PPC_REL14: - reloc_pc14(code_ptr, target); - break; + return reloc_pc14(code_ptr, target); case R_PPC_REL24: - reloc_pc24(code_ptr, target); - break; + return reloc_pc24(code_ptr, target); case R_PPC_ADDR16: /* We are abusing this relocation type. This points to a pair of insns, addis + load. If the displacement is small, we @@ -540,7 +548,9 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int ty= pe, } else { int16_t lo =3D value; int hi =3D value - lo; - assert(hi + lo =3D=3D value); + if (hi + lo !=3D value) { + return false; + } code_ptr[0] =3D deposit32(code_ptr[0], 0, 16, hi >> 16); code_ptr[1] =3D deposit32(code_ptr[1], 0, 16, lo); } @@ -1638,7 +1648,7 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, = TCGLabelQemuLdst *lb) TCGMemOp opc =3D get_memop(oi); TCGReg hi, lo, arg =3D TCG_REG_R3; =20 - reloc_pc14(lb->label_ptr[0], s->code_ptr); + **lb->label_ptr |=3D reloc_pc14_val(*lb->label_ptr, s->code_ptr); =20 tcg_out_mov(s, TCG_TYPE_PTR, arg++, TCG_AREG0); =20 @@ -1683,7 +1693,7 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, = TCGLabelQemuLdst *lb) TCGMemOp s_bits =3D opc & MO_SIZE; TCGReg hi, lo, arg =3D TCG_REG_R3; =20 - reloc_pc14(lb->label_ptr[0], s->code_ptr); + **lb->label_ptr |=3D reloc_pc14_val(*lb->label_ptr, s->code_ptr); =20 tcg_out_mov(s, TCG_TYPE_PTR, arg++, TCG_AREG0); =20 --=20 2.17.2