From nobody Mon Feb 9 13:38:50 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 154290749350565.90526161913408; Thu, 22 Nov 2018 09:24:53 -0800 (PST) Received: from localhost ([::1]:48170 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gPsib-0004IH-K2 for importer@patchew.org; Thu, 22 Nov 2018 12:24:45 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49941) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gPsbM-0005fd-9h for qemu-devel@nongnu.org; Thu, 22 Nov 2018 12:17:18 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gPsbK-00072U-D8 for qemu-devel@nongnu.org; Thu, 22 Nov 2018 12:17:16 -0500 Received: from mx1.redhat.com ([209.132.183.28]:58670) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gPsbD-0006oP-Sq; Thu, 22 Nov 2018 12:17:08 -0500 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 6453F234; Thu, 22 Nov 2018 17:17:06 +0000 (UTC) Received: from laptop.redhat.com (ovpn-116-235.ams2.redhat.com [10.36.116.235]) by smtp.corp.redhat.com (Postfix) with ESMTP id 1CD6C6061E; Thu, 22 Nov 2018 17:17:03 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, mst@redhat.com, jean-philippe.brucker@arm.com Date: Thu, 22 Nov 2018 18:15:38 +0100 Message-Id: <20181122171538.12359-18-eric.auger@redhat.com> In-Reply-To: <20181122171538.12359-1-eric.auger@redhat.com> References: <20181122171538.12359-1-eric.auger@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Thu, 22 Nov 2018 17:17:06 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v9 17/17] hw/arm/virt-acpi-build: Add virtio-iommu node in IORT table X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tn@semihalf.com, kevin.tian@intel.com, bharat.bhushan@nxp.com, peterx@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This patch builds the virtio-iommu node in the ACPI IORT table. The RID space of the root complex, which spans 0x0-0x10000 maps to streamid space 0x0-0x10000 in the virtio-iommu which in turn maps to deviceid space 0x0-0x10000 in the ITS group. The iommu RID is excluded as described in virtio-iommu specification. Signed-off-by: Eric Auger --- v8 -> v9: - iommu RID is not fixed anymore v7 -> v8: - exclude the iommu RID (0x8) in the root complex ID mapping --- hw/arm/virt-acpi-build.c | 50 ++++++++++++++++++++++++++++++------- include/hw/acpi/acpi-defs.h | 21 +++++++++++++++- 2 files changed, 61 insertions(+), 10 deletions(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index ec7c4835fe..0e621f6551 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -414,14 +414,14 @@ build_iort(GArray *table_data, BIOSLinker *linker, Vi= rtMachineState *vms) AcpiIortIdMapping *idmap; AcpiIortItsGroup *its; AcpiIortTable *iort; - AcpiIortSmmu3 *smmu; - size_t node_size, iort_node_offset, iort_length, smmu_offset =3D 0; + size_t node_size, iort_node_offset, iort_length, iommu_offset =3D 0; AcpiIortRC *rc; + int nb_rc_idmappings =3D 1; =20 iort =3D acpi_data_push(table_data, sizeof(*iort)); =20 - if (vms->iommu =3D=3D VIRT_IOMMU_SMMUV3) { - nb_nodes =3D 3; /* RC, ITS, SMMUv3 */ + if (vms->iommu) { + nb_nodes =3D 3; /* RC, ITS, IOMMU */ } else { nb_nodes =3D 2; /* RC, ITS */ } @@ -446,10 +446,10 @@ build_iort(GArray *table_data, BIOSLinker *linker, Vi= rtMachineState *vms) its->identifiers[0] =3D 0; /* MADT translation_id */ =20 if (vms->iommu =3D=3D VIRT_IOMMU_SMMUV3) { + AcpiIortSmmu3 *smmu; int irq =3D vms->irqmap[VIRT_SMMU]; =20 - /* SMMUv3 node */ - smmu_offset =3D iort_node_offset + node_size; + iommu_offset =3D iort_node_offset + node_size; node_size =3D sizeof(*smmu) + sizeof(*idmap); iort_length +=3D node_size; smmu =3D acpi_data_push(table_data, node_size); @@ -470,16 +470,38 @@ build_iort(GArray *table_data, BIOSLinker *linker, Vi= rtMachineState *vms) */ fill_iort_idmap(smmu->id_mapping_array, 0, 0, 0xffff, 0, iort_node_offset); + } else if (vms->iommu =3D=3D VIRT_IOMMU_VIRTIO) { + AcpiIortPVIommuPCI *iommu; + + nb_rc_idmappings =3D 2; + iommu_offset =3D iort_node_offset + node_size; + node_size =3D sizeof(*iommu) + sizeof(*idmap); + iort_length +=3D node_size; + iommu =3D acpi_data_push(table_data, node_size); + + iommu->type =3D ACPI_IORT_NODE_PARAVIRT; + iommu->length =3D cpu_to_le16(node_size); + iommu->mapping_count =3D cpu_to_le32(2); + iommu->mapping_offset =3D cpu_to_le32(sizeof(*iommu)); + iommu->devid =3D cpu_to_le32(vms->virtio_iommu_bdf); + iommu->model =3D cpu_to_le32(ACPI_IORT_NODE_PV_VIRTIO_IOMMU_PCI); + + /* + * Identity RID mapping covering the whole input RID range + * output IORT node is the ITS group node (the first node) + */ + fill_iort_idmap(iommu->id_mapping_array, 0, 0, 0xffff, 0, + iort_node_offset); } =20 /* Root Complex Node */ - node_size =3D sizeof(*rc) + sizeof(*idmap); + node_size =3D sizeof(*rc) + nb_rc_idmappings * sizeof(*idmap); iort_length +=3D node_size; rc =3D acpi_data_push(table_data, node_size); =20 rc->type =3D ACPI_IORT_NODE_PCI_ROOT_COMPLEX; rc->length =3D cpu_to_le16(node_size); - rc->mapping_count =3D cpu_to_le32(1); + rc->mapping_count =3D cpu_to_le32(nb_rc_idmappings); rc->mapping_offset =3D cpu_to_le32(sizeof(*rc)); =20 /* fully coherent device */ @@ -490,7 +512,17 @@ build_iort(GArray *table_data, BIOSLinker *linker, Vir= tMachineState *vms) if (vms->iommu =3D=3D VIRT_IOMMU_SMMUV3) { /* Identity RID mapping and output IORT node is the iommu node */ fill_iort_idmap(rc->id_mapping_array, 0, 0, 0xFFFF, 0, - smmu_offset); + iommu_offset); + } else if (vms->iommu =3D=3D VIRT_IOMMU_VIRTIO) { + /* + * Identity mapping with the IOMMU RID (0x8) excluded. The output + * IORT node is the iommu node. + */ + fill_iort_idmap(rc->id_mapping_array, 0, 0, vms->virtio_iommu_bdf,= 0, + iommu_offset); + fill_iort_idmap(rc->id_mapping_array, 1, vms->virtio_iommu_bdf + 1, + 0xFFFF - vms->virtio_iommu_bdf, + vms->virtio_iommu_bdf + 1, iommu_offset); } else { /* * Identity RID mapping and the output IORT node is the ITS group diff --git a/include/hw/acpi/acpi-defs.h b/include/hw/acpi/acpi-defs.h index af8e023968..b14aa95dc1 100644 --- a/include/hw/acpi/acpi-defs.h +++ b/include/hw/acpi/acpi-defs.h @@ -601,7 +601,8 @@ enum { ACPI_IORT_NODE_NAMED_COMPONENT =3D 0x01, ACPI_IORT_NODE_PCI_ROOT_COMPLEX =3D 0x02, ACPI_IORT_NODE_SMMU =3D 0x03, - ACPI_IORT_NODE_SMMU_V3 =3D 0x04 + ACPI_IORT_NODE_SMMU_V3 =3D 0x04, + ACPI_IORT_NODE_PARAVIRT =3D 0x80 }; =20 struct AcpiIortIdMapping { @@ -628,6 +629,24 @@ struct AcpiIortItsGroup { } QEMU_PACKED; typedef struct AcpiIortItsGroup AcpiIortItsGroup; =20 +struct AcpiIortPVIommuPCI { + ACPI_IORT_NODE_HEADER_DEF + uint32_t devid; + uint8_t reserved2[12]; + uint32_t model; + uint32_t flags; + uint8_t reserved3[16]; + AcpiIortIdMapping id_mapping_array[0]; +} QEMU_PACKED; +typedef struct AcpiIortPVIommuPCI AcpiIortPVIommuPCI; + +enum { + ACPI_IORT_NODE_PV_VIRTIO_IOMMU =3D 0x0, + ACPI_IORT_NODE_PV_VIRTIO_IOMMU_PCI =3D 0x1, +}; + +#define ACPI_IORT_NODE_PV_CACHE_COHERENT (1 << 0) + struct AcpiIortSmmu3 { ACPI_IORT_NODE_HEADER_DEF uint64_t base_address; --=20 2.17.2