From nobody Mon Feb 9 13:38:50 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1542908137019929.4567951036566; Thu, 22 Nov 2018 09:35:37 -0800 (PST) Received: from localhost ([::1]:48368 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gPst0-0005C9-IP for importer@patchew.org; Thu, 22 Nov 2018 12:35:30 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49854) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gPsbH-0005aW-1O for qemu-devel@nongnu.org; Thu, 22 Nov 2018 12:17:14 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gPsbE-0006sk-TP for qemu-devel@nongnu.org; Thu, 22 Nov 2018 12:17:11 -0500 Received: from mx1.redhat.com ([209.132.183.28]:47250) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gPsb8-0006dl-Py; Thu, 22 Nov 2018 12:17:03 -0500 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 413DCC049D79; Thu, 22 Nov 2018 17:17:01 +0000 (UTC) Received: from laptop.redhat.com (ovpn-116-235.ams2.redhat.com [10.36.116.235]) by smtp.corp.redhat.com (Postfix) with ESMTP id D75D96061E; Thu, 22 Nov 2018 17:16:55 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, mst@redhat.com, jean-philippe.brucker@arm.com Date: Thu, 22 Nov 2018 18:15:36 +0100 Message-Id: <20181122171538.12359-16-eric.auger@redhat.com> In-Reply-To: <20181122171538.12359-1-eric.auger@redhat.com> References: <20181122171538.12359-1-eric.auger@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Thu, 22 Nov 2018 17:17:01 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v9 15/17] hw/arm/virt: Add the virtio-iommu device tree mappings X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tn@semihalf.com, kevin.tian@intel.com, bharat.bhushan@nxp.com, peterx@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Adds the "virtio,pci-iommu" node in the host bridge node and the RID mapping, excluding the IOMMU RID. Signed-off-by: Eric Auger Reviewed-by: Bharat Bhushan --- v8 -> v9: - disable msi-bypass property - addition of the subnode is handled is the hotplug handler and IOMMU RID is notimposed anymore v6 -> v7: - align to the smmu instantiation code v4 -> v5: - VirtMachineClass no_iommu added in this patch - Use object_resolve_path_type --- hw/arm/virt.c | 57 +++++++++++++++++++++++++++++++++++++------ include/hw/arm/virt.h | 2 ++ 2 files changed, 52 insertions(+), 7 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index a2b8d8f7c2..b2bbb0ef49 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -29,6 +29,7 @@ */ =20 #include "qemu/osdep.h" +#include "monitor/qdev.h" #include "qapi/error.h" #include "hw/sysbus.h" #include "hw/arm/arm.h" @@ -49,6 +50,7 @@ #include "qemu/bitops.h" #include "qemu/error-report.h" #include "hw/pci-host/gpex.h" +#include "hw/virtio/virtio-pci.h" #include "hw/arm/sysbus-fdt.h" #include "hw/platform-bus.h" #include "hw/arm/fdt.h" @@ -59,6 +61,7 @@ #include "qapi/visitor.h" #include "standard-headers/linux/input.h" #include "hw/arm/smmuv3.h" +#include "hw/virtio/virtio-iommu.h" =20 #define DEFINE_VIRT_MACHINE_LATEST(major, minor, latest) \ static void virt_##major##_##minor##_class_init(ObjectClass *oc, \ @@ -1085,6 +1088,33 @@ static void create_smmu(const VirtMachineState *vms,= qemu_irq *pic, g_free(node); } =20 +static void create_virtio_iommu(VirtMachineState *vms, Error **errp) +{ + const char compat[] =3D "virtio,pci-iommu"; + uint16_t bdf =3D vms->virtio_iommu_bdf; + char *node; + + vms->iommu_phandle =3D qemu_fdt_alloc_phandle(vms->fdt); + + node =3D g_strdup_printf("%s/virtio_iommu@%d", vms->pciehb_nodename, b= df); + qemu_fdt_add_subnode(vms->fdt, node); + qemu_fdt_setprop(vms->fdt, node, "compatible", compat, sizeof(compat)); + qemu_fdt_setprop_sized_cells(vms->fdt, node, "reg", + 1, bdf << 8 /* phys.hi */, + 1, 0 /* phys.mid */, + 1, 0 /* phys.lo */, + 1, 0 /* size.hi */, + 1, 0 /* size.low */); + + qemu_fdt_setprop_cell(vms->fdt, node, "#iommu-cells", 1); + qemu_fdt_setprop_cell(vms->fdt, node, "phandle", vms->iommu_phandle); + g_free(node); + + qemu_fdt_setprop_cells(vms->fdt, vms->pciehb_nodename, "iommu-map", + 0x0, vms->iommu_phandle, 0x0, bdf, + bdf + 1, vms->iommu_phandle, bdf + 1, 0xffff - = bdf); +} + static void create_pcie(VirtMachineState *vms, qemu_irq *pic) { hwaddr base_mmio =3D vms->memmap[VIRT_PCIE_MMIO].base; @@ -1162,7 +1192,7 @@ static void create_pcie(VirtMachineState *vms, qemu_i= rq *pic) } } =20 - nodename =3D g_strdup_printf("/pcie@%" PRIx64, base); + nodename =3D vms->pciehb_nodename =3D g_strdup_printf("/pcie@%" PRIx64= , base); qemu_fdt_add_subnode(vms->fdt, nodename); qemu_fdt_setprop_string(vms->fdt, nodename, "compatible", "pci-host-ecam-generic"); @@ -1205,13 +1235,17 @@ static void create_pcie(VirtMachineState *vms, qemu= _irq *pic) if (vms->iommu) { vms->iommu_phandle =3D qemu_fdt_alloc_phandle(vms->fdt); =20 - create_smmu(vms, pic, pci->bus); + switch (vms->iommu) { + case VIRT_IOMMU_SMMUV3: + create_smmu(vms, pic, pci->bus); + qemu_fdt_setprop_cells(vms->fdt, nodename, "iommu-map", + 0x0, vms->iommu_phandle, 0x0, 0x10000); + break; + default: + g_assert_not_reached(); + } =20 - qemu_fdt_setprop_cells(vms->fdt, nodename, "iommu-map", - 0x0, vms->iommu_phandle, 0x0, 0x10000); } - - g_free(nodename); } =20 static void create_platform_bus(VirtMachineState *vms, qemu_irq *pic) @@ -1736,12 +1770,21 @@ static void virt_machine_device_plug_cb(HotplugHand= ler *hotplug_dev, SYS_BUS_DEVICE(dev)); } } + if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) { + PCIDevice *pdev =3D PCI_DEVICE(dev); + + vms->iommu =3D VIRT_IOMMU_VIRTIO; + vms->virtio_iommu_bdf =3D pci_get_bdf(pdev); + object_property_set_bool(OBJECT(dev), false, "msi-bypass", errp); + create_virtio_iommu(vms, errp); + } } =20 static HotplugHandler *virt_machine_get_hotplug_handler(MachineState *mach= ine, DeviceState *dev) { - if (object_dynamic_cast(OBJECT(dev), TYPE_SYS_BUS_DEVICE)) { + if (object_dynamic_cast(OBJECT(dev), TYPE_SYS_BUS_DEVICE) || + object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) { return HOTPLUG_HANDLER(machine); } =20 diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 4cc57a7ef6..c330f6f4b7 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -115,7 +115,9 @@ typedef struct { bool virt; int32_t gic_version; VirtIOMMUType iommu; + uint16_t virtio_iommu_bdf; struct arm_boot_info bootinfo; + char *pciehb_nodename; const MemMapEntry *memmap; const int *irqmap; int smp_cpus; --=20 2.17.2