[Qemu-devel] [RFC PATCH 00/11] decodetree: Add tokens to ease checking ISA flags

Philippe Mathieu-Daudé posted 11 patches 5 years, 4 months ago
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git fetch https://github.com/patchew-project/qemu tags/patchew/20181111233622.8976-1-f4bug@amsat.org
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MAINTAINERS                 |  1 +
scripts/decodetree.py       | 62 ++++++++++++++++++++++++++++++-------
target/mips/Makefile.objs   |  8 +++++
target/mips/insns.decode    | 22 +++++++++++++
target/mips/translate.c     | 20 ++++++------
target/mips/translate.inc.c | 32 +++++++++++++++++++
6 files changed, 123 insertions(+), 22 deletions(-)
create mode 100644 target/mips/insns.decode
create mode 100644 target/mips/translate.inc.c
[Qemu-devel] [RFC PATCH 00/11] decodetree: Add tokens to ease checking ISA flags
Posted by Philippe Mathieu-Daudé 5 years, 4 months ago
Hi Richard,

I have been wondering how we can simplify when dealing with multiple ISAs.
I used the MIPS arch because it aims to be simple, but handling the multiple
ISAs/ASEs as once is a mess, with the particular case of the MIPS32R6.

First I wanted to split the translate.c in various ISA/ASE-related files,
but this there are too many inlined func involved, I found it handy to use
the ?cond token, so we can link all translate functions without worrying
about #ifdef'ry.
The translating functions are now smaller/easier to read.

Then I wanted to add stricter ISA check, to not deal with multiple
specifications included more than once, and ease overlapping patterns.

I'm not super happy with this series (in particular the token added
are MIPS oriented, you can not use spaces in the condition), but I'm
interested by what you think :)

Rebasing decodetree specs is painful, so better figure what's the best
now before continuing.

At some point I'd like to get to the one ISA/ASE per file, so we can share
compilation units between targets (via $common-obj) and also be able to
disable completely some ISAs, for whatever reason (downstream/obsolete/...).

Regards,

Phil.

Philippe Mathieu-Daudé (11):
  MAINTAINERS: Add scripts/decodetree.py to the TCG section
  decodetree: Add multiple include guard
  target/mips: Move the !ISA_MIPS32R6 check out of
    decode_opc_special2_legacy
  target/mips: Avoid access to CPUMIPSState from decode* functions
  decodetree: Force Python to print unsigned values
  scripts/decodetree: Allow empty specifications
  scripts/decodetree: Add add_func_check()
  target/mips: Add a decodetree stub
  target/mips: Port SYNCI to decodetree
  scripts/decodetree: Add add_cond_check()
  target/mips: Port MIPS64 DCL[Z/O] to decodetree

 MAINTAINERS                 |  1 +
 scripts/decodetree.py       | 62 ++++++++++++++++++++++++++++++-------
 target/mips/Makefile.objs   |  8 +++++
 target/mips/insns.decode    | 22 +++++++++++++
 target/mips/translate.c     | 20 ++++++------
 target/mips/translate.inc.c | 32 +++++++++++++++++++
 6 files changed, 123 insertions(+), 22 deletions(-)
 create mode 100644 target/mips/insns.decode
 create mode 100644 target/mips/translate.inc.c

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2.17.2