From nobody Tue Feb 10 07:23:35 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1541595089892622.5705549790302; Wed, 7 Nov 2018 04:51:29 -0800 (PST) Received: from localhost ([::1]:47712 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gKNIm-0004de-7t for importer@patchew.org; Wed, 07 Nov 2018 07:51:20 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37902) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gKN7F-0008Aj-8l for qemu-devel@nongnu.org; Wed, 07 Nov 2018 07:39:26 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gKN79-0007Q7-VJ for qemu-devel@nongnu.org; Wed, 07 Nov 2018 07:39:23 -0500 Received: from mx1.redhat.com ([209.132.183.28]:53246) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gKN6z-0007AF-0Z; Wed, 07 Nov 2018 07:39:09 -0500 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 443BDC0C7CA2; Wed, 7 Nov 2018 12:39:00 +0000 (UTC) Received: from localhost (ovpn-112-43.ams2.redhat.com [10.36.112.43]) by smtp.corp.redhat.com (Postfix) with ESMTP id 3BBB15D75C; Wed, 7 Nov 2018 12:38:54 +0000 (UTC) From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= To: qemu-devel@nongnu.org Date: Wed, 7 Nov 2018 16:36:51 +0400 Message-Id: <20181107123652.23417-14-marcandre.lureau@redhat.com> In-Reply-To: <20181107123652.23417-1-marcandre.lureau@redhat.com> References: <20181107123652.23417-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Wed, 07 Nov 2018 12:39:00 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH for-3.2 v3 13/14] hw/i386: add pc-i440fx-3.2 & pc-q35-3.2 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Stefano Stabellini , xen-devel@lists.xenproject.org, Corey Minyard , Amit Shah , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , "Michael S. Tsirkin" , Mark Cave-Ayland , dgilbert@redhat.com, Eduardo Habkost , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Igor Mammedov , Anthony Perard , Paolo Bonzini , Stefan Berger , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Artyom Tarasenko , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" The following patch is going to add compatiblity parameters for qemu <=3D 3.1. Signed-off-by: Marc-Andr=C3=A9 Lureau --- include/hw/compat.h | 3 +++ include/hw/i386/pc.h | 3 +++ hw/i386/pc_piix.c | 21 ++++++++++++++++++--- hw/i386/pc_q35.c | 19 +++++++++++++++++-- 4 files changed, 41 insertions(+), 5 deletions(-) diff --git a/include/hw/compat.h b/include/hw/compat.h index 6f4d5fc647..70958328fe 100644 --- a/include/hw/compat.h +++ b/include/hw/compat.h @@ -1,6 +1,9 @@ #ifndef HW_COMPAT_H #define HW_COMPAT_H =20 +#define HW_COMPAT_3_1 \ + /* empty */ + #define HW_COMPAT_3_0 \ /* empty */ =20 diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 136fe497b6..c37d4333a0 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -294,6 +294,9 @@ int e820_add_entry(uint64_t, uint64_t, uint32_t); int e820_get_num_entries(void); bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); =20 +#define PC_COMPAT_3_1 \ + HW_COMPAT_3_1 + #define PC_COMPAT_3_0 \ HW_COMPAT_3_0 \ {\ diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index dc09466b3e..ba371bfcd7 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -428,21 +428,36 @@ static void pc_i440fx_machine_options(MachineClass *m) machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE); } =20 -static void pc_i440fx_3_0_machine_options(MachineClass *m) +static void pc_i440fx_3_2_machine_options(MachineClass *m) { pc_i440fx_machine_options(m); m->alias =3D "pc"; m->is_default =3D 1; } =20 +DEFINE_I440FX_MACHINE(v3_2, "pc-i440fx-3.2", NULL, + pc_i440fx_3_2_machine_options); + +static void pc_i440fx_3_1_machine_options(MachineClass *m) +{ + pc_i440fx_3_2_machine_options(m); + m->is_default =3D 0; + m->alias =3D NULL; + SET_MACHINE_COMPAT(m, PC_COMPAT_3_1); +} + +static void pc_i440fx_3_0_machine_options(MachineClass *m) +{ + pc_i440fx_3_1_machine_options(m); + SET_MACHINE_COMPAT(m, PC_COMPAT_3_0); +} + DEFINE_I440FX_MACHINE(v3_0, "pc-i440fx-3.0", NULL, pc_i440fx_3_0_machine_options); =20 static void pc_i440fx_2_12_machine_options(MachineClass *m) { pc_i440fx_3_0_machine_options(m); - m->is_default =3D 0; - m->alias =3D NULL; SET_MACHINE_COMPAT(m, PC_COMPAT_2_12); } =20 diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 532241e3f8..64d6ea65d5 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -311,19 +311,34 @@ static void pc_q35_machine_options(MachineClass *m) m->max_cpus =3D 288; } =20 -static void pc_q35_3_0_machine_options(MachineClass *m) +static void pc_q35_3_2_machine_options(MachineClass *m) { pc_q35_machine_options(m); m->alias =3D "q35"; } =20 +DEFINE_Q35_MACHINE(v3_2, "pc-q35-3.2", NULL, + pc_q35_3_2_machine_options); + +static void pc_q35_3_1_machine_options(MachineClass *m) +{ + pc_q35_3_2_machine_options(m); + m->alias =3D NULL; + SET_MACHINE_COMPAT(m, PC_COMPAT_3_1); +} + +static void pc_q35_3_0_machine_options(MachineClass *m) +{ + pc_q35_3_1_machine_options(m); + SET_MACHINE_COMPAT(m, PC_COMPAT_3_0); +} + DEFINE_Q35_MACHINE(v3_0, "pc-q35-3.0", NULL, pc_q35_3_0_machine_options); =20 static void pc_q35_2_12_machine_options(MachineClass *m) { pc_q35_3_0_machine_options(m); - m->alias =3D NULL; SET_MACHINE_COMPAT(m, PC_COMPAT_2_12); } =20 --=20 2.19.1.708.g4ede3d42df