From nobody Thu Dec 18 19:31:04 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1541504485514763.9770272732155; Tue, 6 Nov 2018 03:41:25 -0800 (PST) Received: from localhost ([::1]:40542 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gJzjY-0001bN-AB for importer@patchew.org; Tue, 06 Nov 2018 06:41:24 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60294) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gJzh3-0008JE-Bq for qemu-devel@nongnu.org; Tue, 06 Nov 2018 06:38:50 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gJzh2-0004Pi-CY for qemu-devel@nongnu.org; Tue, 06 Nov 2018 06:38:49 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:52310) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gJzh2-00049H-5p for qemu-devel@nongnu.org; Tue, 06 Nov 2018 06:38:48 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1gJzgk-0007cb-Aq for qemu-devel@nongnu.org; Tue, 06 Nov 2018 11:38:30 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 6 Nov 2018 11:38:22 +0000 Message-Id: <20181106113826.25810-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181106113826.25810-1-peter.maydell@linaro.org> References: <20181106113826.25810-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 1/5] target/arm: Remove can't-happen if() from handle_vec_simd_shli() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" In handle_vec_simd_shli() we have a check: if (size > 3 && !is_q) { unallocated_encoding(s); return; } However this can never be true, because we calculate int size =3D 32 - clz32(immh) - 1; where immh is a 4 bit field which we know cannot be all-zeroes. So the clz32() return must be in {28,29,30,31} and the resulting size is in {0,1,2,3}, and "size > 3" is never true. This unnecessary code confuses Coverity's analysis: in CID 1396476 it thinks we might later index off the end of an array because the condition implies that we might have a size > 3. Remove the code, and instead assert that the size is in [0..3], since the decode that enforces that is somewhat distant from this function. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alex Benn=C3=A9e Tested-by: Alex Benn=C3=A9e Message-id: 20181030162517.21816-1-peter.maydell@linaro.org --- target/arm/translate-a64.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 88195ab9490..fd36425f1ae 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -9483,12 +9483,10 @@ static void handle_vec_simd_shli(DisasContext *s, b= ool is_q, bool insert, int immhb =3D immh << 3 | immb; int shift =3D immhb - (8 << size); =20 - if (extract32(immh, 3, 1) && !is_q) { - unallocated_encoding(s); - return; - } + /* Range of size is limited by decode: immh is a non-zero 4 bit field = */ + assert(size >=3D 0 && size <=3D 3); =20 - if (size > 3 && !is_q) { + if (extract32(immh, 3, 1) && !is_q) { unallocated_encoding(s); return; } --=20 2.19.1 From nobody Thu Dec 18 19:31:04 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1541504449051815.5857642505571; Tue, 6 Nov 2018 03:40:49 -0800 (PST) Received: from localhost ([::1]:40541 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gJzix-000165-NM for importer@patchew.org; Tue, 06 Nov 2018 06:40:47 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60278) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gJzh2-0008If-BN for qemu-devel@nongnu.org; Tue, 06 Nov 2018 06:38:49 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gJzh1-0004PE-FJ for qemu-devel@nongnu.org; Tue, 06 Nov 2018 06:38:48 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:52310) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gJzh1-00049H-9E for qemu-devel@nongnu.org; Tue, 06 Nov 2018 06:38:47 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1gJzgl-0007cp-7j for qemu-devel@nongnu.org; Tue, 06 Nov 2018 11:38:31 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 6 Nov 2018 11:38:23 +0000 Message-Id: <20181106113826.25810-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181106113826.25810-1-peter.maydell@linaro.org> References: <20181106113826.25810-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 2/5] milkymist: Check for failure trying to load BIOS image X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Check the return value from load_image_targphys(), which tells us whether our attempt to load the BIOS image into RAM failed. (Spotted by Coverity, CID 1190305.) Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Acked-by: Michael Walle Message-id: 20181030170032.1844-1-peter.maydell@linaro.org --- hw/lm32/milkymist.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/hw/lm32/milkymist.c b/hw/lm32/milkymist.c index 321f184595e..63c6894c955 100644 --- a/hw/lm32/milkymist.c +++ b/hw/lm32/milkymist.c @@ -138,7 +138,10 @@ milkymist_init(MachineState *machine) bios_filename =3D qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); =20 if (bios_filename) { - load_image_targphys(bios_filename, BIOS_OFFSET, BIOS_SIZE); + if (load_image_targphys(bios_filename, BIOS_OFFSET, BIOS_SIZE) < 0= ) { + error_report("could not load bios '%s'", bios_filename); + exit(1); + } } =20 reset_info->bootstrap_pc =3D BIOS_OFFSET; --=20 2.19.1 From nobody Thu Dec 18 19:31:04 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1541504627482113.32760188345276; Tue, 6 Nov 2018 03:43:47 -0800 (PST) Received: from localhost ([::1]:40559 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gJzlp-0003mo-Dl for importer@patchew.org; Tue, 06 Nov 2018 06:43:45 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60266) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gJzh1-0008Id-BQ for qemu-devel@nongnu.org; Tue, 06 Nov 2018 06:38:48 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gJzh0-0004Ol-JL for qemu-devel@nongnu.org; Tue, 06 Nov 2018 06:38:47 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:52310) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gJzh0-00049H-D9 for qemu-devel@nongnu.org; Tue, 06 Nov 2018 06:38:46 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1gJzgm-0007d4-41 for qemu-devel@nongnu.org; Tue, 06 Nov 2018 11:38:32 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 6 Nov 2018 11:38:24 +0000 Message-Id: <20181106113826.25810-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181106113826.25810-1-peter.maydell@linaro.org> References: <20181106113826.25810-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 3/5] hw/arm/exynos4210: Zero memory allocated for Exynos4210State X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" In exynos4210_init() we allocate memory for an Exynos4210State struct. Generally devices can assume that the memory allocated for their state struct is zero-initialized; we broke that assumption here by using g_new(). Use g_new0() instead. (In particular, some code assumes that the various irq arrays in the Exynos4210Irq sub-struct are zero-initialized.) In the longer term, this code should be QOMified, and then the struct memory will be allocated elsewhere and by functions which always zero-initalize it; but for 3.1 this is a simple fix. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20181105151132.13884-1-peter.maydell@linaro.org --- hw/arm/exynos4210.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index 827318a0036..af82e955421 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -162,7 +162,7 @@ static uint64_t exynos4210_calc_affinity(int cpu) =20 Exynos4210State *exynos4210_init(MemoryRegion *system_mem) { - Exynos4210State *s =3D g_new(Exynos4210State, 1); + Exynos4210State *s =3D g_new0(Exynos4210State, 1); qemu_irq gate_irq[EXYNOS4210_NCPUS][EXYNOS4210_IRQ_GATE_NINPUTS]; SysBusDevice *busdev; DeviceState *dev; --=20 2.19.1 From nobody Thu Dec 18 19:31:04 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1541504555493221.10558197244598; Tue, 6 Nov 2018 03:42:35 -0800 (PST) Received: from localhost ([::1]:40551 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gJzkg-0002hI-G2 for importer@patchew.org; Tue, 06 Nov 2018 06:42:34 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60252) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gJzh0-0008IZ-TI for qemu-devel@nongnu.org; Tue, 06 Nov 2018 06:38:48 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gJzgz-0004OG-NE for qemu-devel@nongnu.org; Tue, 06 Nov 2018 06:38:46 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:52310) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gJzgz-00049H-GJ for qemu-devel@nongnu.org; Tue, 06 Nov 2018 06:38:45 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1gJzgm-0007dI-WF for qemu-devel@nongnu.org; Tue, 06 Nov 2018 11:38:33 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 6 Nov 2018 11:38:25 +0000 Message-Id: <20181106113826.25810-5-peter.maydell@linaro.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181106113826.25810-1-peter.maydell@linaro.org> References: <20181106113826.25810-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 4/5] target/arm: Set S and PTW in 64-bit PAR format X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" In do_ats_write() we construct a PAR value based on the result of the translation. A comment says "S2WLK and FSTAGE are always zero, because we don't implement virtualization". Since we do in fact now implement virtualization, add the missing code that sets these bits based on the reported ARMMMUFaultInfo. (These bits are named PTW and S in ARMv8, so we follow that convention in the new comments in this patch.) Signed-off-by: Peter Maydell Reviewed-by: Edgar E. Iglesias Reviewed-by: Alex Benn=C3=A9e Message-id: 20181016093703.10637-2-peter.maydell@linaro.org --- target/arm/helper.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 0ea95b08151..69f684abd89 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -2347,10 +2347,12 @@ static uint64_t do_ats_write(CPUARMState *env, uint= 64_t value, =20 par64 |=3D 1; /* F */ par64 |=3D (fsr & 0x3f) << 1; /* FS */ - /* Note that S2WLK and FSTAGE are always zero, because we don't - * implement virtualization and therefore there can't be a sta= ge 2 - * fault. - */ + if (fi.stage2) { + par64 |=3D (1 << 9); /* S */ + } + if (fi.s1ptw) { + par64 |=3D (1 << 8); /* PTW */ + } } } else { /* fsr is a DFSR/IFSR value for the short descriptor --=20 2.19.1 From nobody Thu Dec 18 19:31:04 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1541504448235848.5081996087633; Tue, 6 Nov 2018 03:40:48 -0800 (PST) Received: from localhost ([::1]:40540 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gJzix-00014v-2L for importer@patchew.org; Tue, 06 Nov 2018 06:40:47 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60240) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gJzgz-0008II-Hv for qemu-devel@nongnu.org; Tue, 06 Nov 2018 06:38:48 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gJzgy-0004Ng-Q2 for qemu-devel@nongnu.org; Tue, 06 Nov 2018 06:38:45 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:52310) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gJzgx-00049H-0a for qemu-devel@nongnu.org; Tue, 06 Nov 2018 06:38:44 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1gJzgp-0007dW-Nc for qemu-devel@nongnu.org; Tue, 06 Nov 2018 11:38:35 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 6 Nov 2018 11:38:26 +0000 Message-Id: <20181106113826.25810-6-peter.maydell@linaro.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181106113826.25810-1-peter.maydell@linaro.org> References: <20181106113826.25810-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 5/5] target/arm: Fix ATS1Hx instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" ATS1HR and ATS1HW (which allow AArch32 EL2 to do address translations on the EL2 translation regime) were implemented in commit 14db7fe09a2c8. However, we got them wrong: these should do stage 1 address translations as defined for NS-EL2, which is ARMMMUIdx_S1E2. We were incorrectly making them perform stage 2 translations. A few years later in commit 1313e2d7e2cd we forgot entirely that we'd implemented ATS1Hx, and added a comment that ATS1Hx were "not supported yet". Remove the comment; there is no extra code needed to handle these operations in do_ats_write(), because arm_s1_regime_using_lpae_format() returns true for ARMMMUIdx_S1E2, which forces 64-bit PAR format. Signed-off-by: Peter Maydell Reviewed-by: Alex Benn=C3=A9e Message-id: 20181016093703.10637-3-peter.maydell@linaro.org Reviewed-by: Edgar E. Iglesias --- target/arm/helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 69f684abd89..96301930cc8 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -2319,7 +2319,7 @@ static uint64_t do_ats_write(CPUARMState *env, uint64= _t value, * * (Note that HCR.DC makes HCR.VM behave as if it is 1.) * - * ATS1Hx always uses the 64bit format (not supported yet). + * ATS1Hx always uses the 64bit format. */ format64 =3D arm_s1_regime_using_lpae_format(env, mmu_idx); =20 @@ -2444,7 +2444,7 @@ static void ats1h_write(CPUARMState *env, const ARMCP= RegInfo *ri, MMUAccessType access_type =3D ri->opc2 & 1 ? MMU_DATA_STORE : MMU_DATA= _LOAD; uint64_t par64; =20 - par64 =3D do_ats_write(env, value, access_type, ARMMMUIdx_S2NS); + par64 =3D do_ats_write(env, value, access_type, ARMMMUIdx_S1E2); =20 A32_BANKED_CURRENT_REG_SET(env, par, par64); } --=20 2.19.1