From nobody Thu Nov 6 14:35:52 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.intel.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1541383080381315.4650556254286; Sun, 4 Nov 2018 17:58:00 -0800 (PST) Received: from localhost ([::1]:60938 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gJU9P-0006D4-3r for importer@patchew.org; Sun, 04 Nov 2018 20:57:59 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47533) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gJTvi-0000xe-FS for qemu-devel@nongnu.org; Sun, 04 Nov 2018 20:43:51 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gJTvd-0003os-5F for qemu-devel@nongnu.org; Sun, 04 Nov 2018 20:43:50 -0500 Received: from mga01.intel.com ([192.55.52.88]:6359) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gJTvc-0003eP-R0; Sun, 04 Nov 2018 20:43:45 -0500 Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 04 Nov 2018 17:43:35 -0800 Received: from emurphy1-mobl1.ger.corp.intel.com (HELO localhost.localdomain) ([10.252.26.250]) by fmsmga005.fm.intel.com with ESMTP; 04 Nov 2018 17:43:30 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,466,1534834800"; d="scan'208";a="277074531" From: Samuel Ortiz To: qemu-devel@nongnu.org Date: Mon, 5 Nov 2018 02:40:45 +0100 Message-Id: <20181105014047.26447-23-sameo@linux.intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181105014047.26447-1-sameo@linux.intel.com> References: <20181105014047.26447-1-sameo@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.88 Subject: [Qemu-devel] [PATCH v5 22/24] hw: pci-host: piix: Return PCI host pointer instead of PCI bus X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Stefano Stabellini , Eduardo Habkost , "Michael S. Tsirkin" , Shannon Zhao , Igor Mammedov , qemu-arm@nongnu.org, Paolo Bonzini , Anthony Perard , xen-devel@lists.xenproject.org, Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" For building the MCFG table, we need to track a given machine type PCI host pointer, and we can't get it from the bus pointer alone. As piix returns a PCI bus pointer, we simply modify its builder to return a PCI host pointer instead. Signed-off-by: Samuel Ortiz --- include/hw/i386/pc.h | 21 +++++++++++---------- hw/i386/pc_piix.c | 18 +++++++++++------- hw/pci-host/piix.c | 24 ++++++++++++------------ 3 files changed, 34 insertions(+), 29 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 8e5f1464eb..b6b79e146d 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -244,16 +244,17 @@ typedef struct PCII440FXState PCII440FXState; */ #define RCR_IOPORT 0xcf9 =20 -PCIBus *i440fx_init(const char *host_type, const char *pci_type, - PCII440FXState **pi440fx_state, int *piix_devfn, - ISABus **isa_bus, qemu_irq *pic, - MemoryRegion *address_space_mem, - MemoryRegion *address_space_io, - ram_addr_t ram_size, - ram_addr_t below_4g_mem_size, - ram_addr_t above_4g_mem_size, - MemoryRegion *pci_memory, - MemoryRegion *ram_memory); +struct PCIHostState *i440fx_init(const char *host_type, const char *pci_ty= pe, + PCII440FXState **pi440fx_state, + int *piix_devfn, + ISABus **isa_bus, qemu_irq *pic, + MemoryRegion *address_space_mem, + MemoryRegion *address_space_io, + ram_addr_t ram_size, + ram_addr_t below_4g_mem_size, + ram_addr_t above_4g_mem_size, + MemoryRegion *pci_memory, + MemoryRegion *ram_memory); =20 /* piix4.c */ extern PCIDevice *piix4_dev; diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 0620d10715..f5b139a3eb 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -32,6 +32,7 @@ #include "hw/display/ramfb.h" #include "hw/smbios/smbios.h" #include "hw/pci/pci.h" +#include "hw/pci/pci_host.h" #include "hw/pci/pci_ids.h" #include "hw/usb.h" #include "net/net.h" @@ -75,6 +76,7 @@ static void pc_init1(MachineState *machine, MemoryRegion *system_memory =3D get_system_memory(); MemoryRegion *system_io =3D get_system_io(); int i; + struct PCIHostState *pci_host; PCIBus *pci_bus; ISABus *isa_bus; PCII440FXState *i440fx_state; @@ -196,15 +198,17 @@ static void pc_init1(MachineState *machine, } =20 if (pcmc->pci_enabled) { - pci_bus =3D i440fx_init(host_type, - pci_type, - &i440fx_state, &piix3_devfn, &isa_bus, pcms-= >gsi, - system_memory, system_io, machine->ram_size, - acpi_conf->below_4g_mem_size, - acpi_conf->above_4g_mem_size, - pci_memory, ram_memory); + pci_host =3D i440fx_init(host_type, + pci_type, + &i440fx_state, &piix3_devfn, &isa_bus, pcms= ->gsi, + system_memory, system_io, machine->ram_size, + acpi_conf->below_4g_mem_size, + acpi_conf->above_4g_mem_size, + pci_memory, ram_memory); + pci_bus =3D pci_host->bus; pcms->bus =3D pci_bus; } else { + pci_host =3D NULL; pci_bus =3D NULL; i440fx_state =3D NULL; isa_bus =3D isa_bus_new(NULL, get_system_memory(), system_io, diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c index 658460264b..4a412db44c 100644 --- a/hw/pci-host/piix.c +++ b/hw/pci-host/piix.c @@ -342,17 +342,17 @@ static void i440fx_realize(PCIDevice *dev, Error **er= rp) } } =20 -PCIBus *i440fx_init(const char *host_type, const char *pci_type, - PCII440FXState **pi440fx_state, - int *piix3_devfn, - ISABus **isa_bus, qemu_irq *pic, - MemoryRegion *address_space_mem, - MemoryRegion *address_space_io, - ram_addr_t ram_size, - ram_addr_t below_4g_mem_size, - ram_addr_t above_4g_mem_size, - MemoryRegion *pci_address_space, - MemoryRegion *ram_memory) +struct PCIHostState *i440fx_init(const char *host_type, const char *pci_ty= pe, + PCII440FXState **pi440fx_state, + int *piix3_devfn, + ISABus **isa_bus, qemu_irq *pic, + MemoryRegion *address_space_mem, + MemoryRegion *address_space_io, + ram_addr_t ram_size, + ram_addr_t below_4g_mem_size, + ram_addr_t above_4g_mem_size, + MemoryRegion *pci_address_space, + MemoryRegion *ram_memory) { DeviceState *dev; PCIBus *b; @@ -442,7 +442,7 @@ PCIBus *i440fx_init(const char *host_type, const char *= pci_type, =20 i440fx_update_memory_mappings(f); =20 - return b; + return s; } =20 /* PIIX3 PCI to ISA bridge */ --=20 2.19.1