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[82.27.106.120]) by smtp.gmail.com with ESMTPSA id x12-v6sm7125589wrt.87.2018.11.04.02.08.29 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 04 Nov 2018 02:08:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=XBvbV7bZ7xmGvf9wR9HFNrx3l0OJ+MsQiKY+YWKEmvk=; b=JOyfL+NQ4cXKNhFU+yS7tD8/auwVeJjf0gadNdlkrUaAdFg4aRM2vxgwVkRHHttEfE hgKvbCbiNLgPzedOL2u2JIDfV/dQ39Hhl+0R3s0SRopBpfdLb2YJtU2ck7JFrarS22Ll VbtyifARmL4ghQvbRzfIdC3uoUZJ8mT8/RAss= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=XBvbV7bZ7xmGvf9wR9HFNrx3l0OJ+MsQiKY+YWKEmvk=; b=Ur9/CnXoJgJqQ8RZf05ntkbw6FPORxOU94KbAbePVgjNY9PZUdY5K+0R1GUAXAfUmW 4LIPENN/JO0hZ4kEr0e91psCDsg9coUpNXanptCCkUzTu60/NL23JTY4Ngjrirz66j6+ xeih8AUCqa0Hmsj+iMi4TWH4HG7jh62RZvDBhQrII09Mne8qnKAgFP66N3yX2cizDrsA dHtmhPE+Ab79n/hY3v956+3huAGlGxhCZDbGuEGztw+10zv9GMvKRtsyhnY6GLZUCpXb QBltci8keMYY8Ut2CQATLQfgJMnrDF/DhNrqzgpA1txKDez9CFsdClCZctwB7Kqc+G/J C7dQ== X-Gm-Message-State: AGRZ1gJ4yndH1FLuYyUmnnBrNvH5sMaiXuJqj5SPml75RUU/C8HweTqR /nVUZmaSXh+zHprr76eH0Gg+Z6YYBmI= X-Google-Smtp-Source: AJdET5caO3LamLr8gLRt69laBnheXjFMbLbeUrKQ5eRHfOax50hDV9LR7RNSFsVUEtUflMRK4Ncc+g== X-Received: by 2002:adf:b453:: with SMTP id v19-v6mr14887300wrd.47.1541326110444; Sun, 04 Nov 2018 02:08:30 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sun, 4 Nov 2018 10:08:26 +0000 Message-Id: <20181104100826.15143-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181104100826.15143-1-richard.henderson@linaro.org> References: <20181104100826.15143-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42a Subject: [Qemu-devel] [PULL 1/1] softfloat: Don't execute divdeu without power7 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The divdeu instruction was added to ISA 2.06 (Power7). Exclude this block from older cpus. Fixes: 27ae5109a2ba (softfloat: Specialize udiv_qrnnd for ppc64) Reported-by: Laurent Vivier Signed-off-by: Richard Henderson --- include/fpu/softfloat-macros.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/fpu/softfloat-macros.h b/include/fpu/softfloat-macros.h index c86687fa5e..b1d772e6d4 100644 --- a/include/fpu/softfloat-macros.h +++ b/include/fpu/softfloat-macros.h @@ -647,8 +647,8 @@ static inline uint64_t udiv_qrnnd(uint64_t *r, uint64_t= n1, asm("dlgr %0, %1" : "+r"(n) : "r"(d)); *r =3D n >> 64; return n; -#elif defined(_ARCH_PPC64) - /* From Power ISA 3.0B, programming note for divdeu. */ +#elif defined(_ARCH_PPC64) && defined(_ARCH_PWR7) + /* From Power ISA 2.06, programming note for divdeu. */ uint64_t q1, q2, Q, r1, r2, R; asm("divdeu %0,%2,%4; divdu %1,%3,%4" : "=3D&r"(q1), "=3Dr"(q2) --=20 2.17.2