From nobody Wed Apr 16 16:47:03 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1541180034147998.6879373941506; Fri, 2 Nov 2018 10:33:54 -0700 (PDT) Received: from localhost ([::1]:52860 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gIdKT-00086O-2T for importer@patchew.org; Fri, 02 Nov 2018 13:33:53 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51028) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gId6A-0002Eg-Gb for qemu-devel@nongnu.org; Fri, 02 Nov 2018 13:19:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gId68-0004M9-K0 for qemu-devel@nongnu.org; Fri, 02 Nov 2018 13:19:06 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:52250) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gId67-0002Zn-9M for qemu-devel@nongnu.org; Fri, 02 Nov 2018 13:19:03 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1gId3s-0003Zq-Ba for qemu-devel@nongnu.org; Fri, 02 Nov 2018 17:16:44 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Fri, 2 Nov 2018 17:16:31 +0000 Message-Id: <20181102171638.24069-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181102171638.24069-1-peter.maydell@linaro.org> References: <20181102171638.24069-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 03/10] hw/arm/nrf51_soc: Connect UART to nRF51 SoC X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Julia Suvorova Wire up nRF51 UART in the corresponding SoC. Signed-off-by: Julia Suvorova Reviewed-by: Stefan Hajnoczi Reviewed-by: Alistair Francis Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- include/hw/arm/nrf51_soc.h | 3 +++ hw/arm/microbit.c | 2 ++ hw/arm/nrf51_soc.c | 20 ++++++++++++++++++++ 3 files changed, 25 insertions(+) diff --git a/include/hw/arm/nrf51_soc.h b/include/hw/arm/nrf51_soc.h index f4e092b554e..73fc92e9a8d 100644 --- a/include/hw/arm/nrf51_soc.h +++ b/include/hw/arm/nrf51_soc.h @@ -12,6 +12,7 @@ =20 #include "hw/sysbus.h" #include "hw/arm/armv7m.h" +#include "hw/char/nrf51_uart.h" =20 #define TYPE_NRF51_SOC "nrf51-soc" #define NRF51_SOC(obj) \ @@ -24,6 +25,8 @@ typedef struct NRF51State { /*< public >*/ ARMv7MState cpu; =20 + NRF51UARTState uart; + MemoryRegion iomem; MemoryRegion sram; MemoryRegion flash; diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c index e7d74116a50..a734e7f650e 100644 --- a/hw/arm/microbit.c +++ b/hw/arm/microbit.c @@ -12,6 +12,7 @@ #include "qapi/error.h" #include "hw/boards.h" #include "hw/arm/arm.h" +#include "sysemu/sysemu.h" #include "exec/address-spaces.h" =20 #include "hw/arm/nrf51_soc.h" @@ -35,6 +36,7 @@ static void microbit_init(MachineState *machine) =20 sysbus_init_child_obj(OBJECT(machine), "nrf51", soc, sizeof(s->nrf51), TYPE_NRF51_SOC); + qdev_prop_set_chr(DEVICE(&s->nrf51), "serial0", serial_hd(0)); object_property_set_link(soc, OBJECT(system_memory), "memory", &error_fatal); object_property_set_bool(soc, true, "realized", &error_fatal); diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c index 1a59ef45525..b89c1bdea08 100644 --- a/hw/arm/nrf51_soc.c +++ b/hw/arm/nrf51_soc.c @@ -43,9 +43,12 @@ #define NRF51822_FLASH_SIZE (256 * 1024) #define NRF51822_SRAM_SIZE (16 * 1024) =20 +#define BASE_TO_IRQ(base) ((base >> 12) & 0x1F) + static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp) { NRF51State *s =3D NRF51_SOC(dev_soc); + MemoryRegion *mr; Error *err =3D NULL; =20 if (!s->board_memory) { @@ -82,6 +85,18 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Erro= r **errp) } memory_region_add_subregion(&s->container, SRAM_BASE, &s->sram); =20 + /* UART */ + object_property_set_bool(OBJECT(&s->uart), true, "realized", &err); + if (err) { + error_propagate(errp, err); + return; + } + mr =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->uart), 0); + memory_region_add_subregion_overlap(&s->container, UART_BASE, mr, 0); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart), 0, + qdev_get_gpio_in(DEVICE(&s->cpu), + BASE_TO_IRQ(UART_BASE))); + create_unimplemented_device("nrf51_soc.io", IOMEM_BASE, IOMEM_SIZE); create_unimplemented_device("nrf51_soc.ficr", FICR_BASE, FICR_SIZE); create_unimplemented_device("nrf51_soc.private", @@ -99,6 +114,11 @@ static void nrf51_soc_init(Object *obj) qdev_prop_set_string(DEVICE(&s->cpu), "cpu-type", ARM_CPU_TYPE_NAME("cortex-m0")); qdev_prop_set_uint32(DEVICE(&s->cpu), "num-irq", 32); + + sysbus_init_child_obj(obj, "uart", &s->uart, sizeof(s->uart), + TYPE_NRF51_UART); + object_property_add_alias(obj, "serial0", OBJECT(&s->uart), "chardev", + &error_abort); } =20 static Property nrf51_soc_properties[] =3D { --=20 2.19.1