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X-Received-From: 2a00:1450:4864:20::443 Subject: [Qemu-devel] [PATCH for 3.2 v2 6/7] hw/arm/bcm2835: Add basic support for cprman (clock subsystem) X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm@nongnu.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Add basic support for BCM283x CPRMAN. Provide support for reading and writing CPRMAN registers and initialize registers with sensible default values. During runtime retain any written values. Basic CPRMAN support is necessary and sufficient to boot Linux on raspi2 and raspi3 systems. Without this change, recent Linux kernels fail to boot on raspi2 and raspi3. raspi2 images experience with various divide by 0 errors and hang. raspi3 images fail to initialize the console (ttyS1). Register addresses and fields taken from the "BCM2835 ARM Peripherals" datasheet from February 06 2012: https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf Signed-off-by: Guenter Roeck Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/bcm2835_peripherals.c | 16 +- hw/misc/Makefile.objs | 1 + hw/misc/bcm2835_cprman.c | 277 +++++++++++++++++++++++++++ hw/misc/trace-events | 8 + include/hw/arm/bcm2835_peripherals.h | 3 +- include/hw/misc/bcm2835_cprman.h | 28 +++ 6 files changed, 331 insertions(+), 2 deletions(-) create mode 100644 hw/misc/bcm2835_cprman.c create mode 100644 include/hw/misc/bcm2835_cprman.h diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c index 108c058d17..11fb098063 100644 --- a/hw/arm/bcm2835_peripherals.c +++ b/hw/arm/bcm2835_peripherals.c @@ -99,6 +99,11 @@ static void bcm2835_peripherals_init(Object *obj) object_property_add_const_link(OBJECT(&s->property), "dma-mr", OBJECT(&s->gpu_bus_mr), &error_abort); =20 + /* Clock subsystem */ + object_initialize(&s->cprman, sizeof(s->cprman), TYPE_BCM2835_CPRMAN); + object_property_add_child(obj, "cprman", OBJECT(&s->cprman), NULL); + qdev_set_parent_bus(DEVICE(&s->cprman), sysbus_get_default()); + /* Random Number Generator */ object_initialize(&s->rng, sizeof(s->rng), TYPE_BCM2835_RNG); object_property_add_child(obj, "rng", OBJECT(&s->rng), NULL); @@ -258,6 +263,13 @@ static void bcm2835_peripherals_realize(DeviceState *d= ev, Error **errp) sysbus_connect_irq(SYS_BUS_DEVICE(&s->property), 0, qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_PROPE= RTY)); =20 + /* Clock subsystem */ + object_property_set_bool(OBJECT(&s->cprman), true, "realized", &err); + if (err) { + error_propagate(errp, err); + return; + } + /* Random Number Generator */ object_property_set_bool(OBJECT(&s->rng), true, "realized", &err); if (err) { @@ -265,6 +277,9 @@ static void bcm2835_peripherals_realize(DeviceState *de= v, Error **errp) return; } =20 + memory_region_add_subregion(&s->peri_mr, CPRMAN_OFFSET, + sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->cprman), 0)); + memory_region_add_subregion(&s->peri_mr, RNG_OFFSET, sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->rng), 0)); =20 @@ -350,7 +365,6 @@ static void bcm2835_peripherals_realize(DeviceState *de= v, Error **errp) } =20 create_unimp(s, &s->pm, "bcm2835-pm", PM_OFFSET, 0x1000); - create_unimp(s, &s->cprman, "bcm2835-cprman", CPRMAN_OFFSET, 0x1000); create_unimp(s, &s->a2w, "bcm2835-a2w", 0x102000, 0x1000); create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100); create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100); diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs index 680350b3c3..93c11a2d4d 100644 --- a/hw/misc/Makefile.objs +++ b/hw/misc/Makefile.objs @@ -53,6 +53,7 @@ obj-$(CONFIG_OMAP) +=3D omap_tap.o obj-$(CONFIG_RASPI) +=3D bcm2835_mbox.o obj-$(CONFIG_RASPI) +=3D bcm2835_property.o obj-$(CONFIG_RASPI) +=3D bcm2835_rng.o +obj-$(CONFIG_RASPI) +=3D bcm2835_cprman.o obj-$(CONFIG_SLAVIO) +=3D slavio_misc.o obj-$(CONFIG_ZYNQ) +=3D zynq_slcr.o obj-$(CONFIG_ZYNQ) +=3D zynq-xadc.o diff --git a/hw/misc/bcm2835_cprman.c b/hw/misc/bcm2835_cprman.c new file mode 100644 index 0000000000..df7e92e77f --- /dev/null +++ b/hw/misc/bcm2835_cprman.c @@ -0,0 +1,277 @@ +/* + * BCM2835 Clock subsystem (poor man's version) + * https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals= .pdf + * + * Copyright (C) 2018 Guenter Roeck + * Copyright (C) 2018 Philippe Mathieu-Daud=C3=A9 + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qemu/log.h" +#include "hw/misc/bcm2835_cprman.h" +#include "hw/register.h" +#include "trace.h" + +FIELD(CM, PASSWD, 24, 8) + +FIELD(CM_CTL, SRC, 0, 4) +FIELD(CM_CTL, ENABLE, 4, 1) +FIELD(CM_CTL, KILL, 5, 1) +FIELD(CM_CTL, GATE, 6, 1) +FIELD(CM_CTL, BUSY, 7, 1) +FIELD(CM_CTL, BUSYD, 8, 1) +FIELD(CM_CTL, FRAC, 9, 1) + +FIELD(CM_DIV, FRAC, 0, 12) +FIELD(CM_DIV, INTEGER, 12, 12) + +enum cprman_clock_source { + SRC_GND =3D 0, + SRC_OSC =3D 1, + SRC_TEST_DBG0 =3D 2, + SRC_TEST_DBG1 =3D 3, + SRC_PLLA_CORE =3D 4, + SRC_PLLC_CORE0 =3D 5, + SRC_PLLD_CORE =3D 6, + SRC_PLLH_AUX =3D 7, + SRC_PLLC_CORE1 =3D 8, + SRC_PLLC_CORE2 =3D 9 +}; + +static const char *src_name(int src) +{ + static const char *src_names[16] =3D { + [SRC_GND] =3D "GND", + [SRC_OSC] =3D "OSC", + [SRC_TEST_DBG0] =3D "TEST_DBG0", + [SRC_TEST_DBG1] =3D "TEST_DBG1", + [SRC_PLLA_CORE] =3D "PLLA_CORE", + [SRC_PLLC_CORE0] =3D "PLLC_CORE0", + [SRC_PLLD_CORE] =3D "PLLD_CORE", + [SRC_PLLH_AUX] =3D "PLLH_AUX", + [SRC_PLLC_CORE1] =3D "PLLC_CORE1", + [SRC_PLLC_CORE2] =3D "PLLC_CORE2", + }; + return src_names[src] ? src_names[src] : "UNKN"; +} + +static const char *ctldiv_names[CPRMAN_NUM_REGS] =3D { + [0] =3D "GNRIC", + [1] =3D "VPU", + [2] =3D "SYS", + [3] =3D "PERIA", + [4] =3D "PERII", + [5] =3D "H264", + [6] =3D "ISP", + [7] =3D "V3D", + [8] =3D "CAM0", + [9] =3D "CAM1", + [10] =3D "CCP2", + [11] =3D "DSI0E", + [12] =3D "DSI0P", + [13] =3D "DPI", + [14] =3D "GP0", + [15] =3D "GP1", + [16] =3D "GP2", + [17] =3D "HSM", + [18] =3D "OTP", + [19] =3D "PCM", + [20] =3D "PWM", + [21] =3D "SLIM", + [22] =3D "SMI", + [24] =3D "TCNT", + [25] =3D "TEC", + [26] =3D "TD0", + [27] =3D "TD1", + [28] =3D "TSENS", + [29] =3D "TIMER", + [30] =3D "UART", + [31] =3D "VEC", + [43] =3D "DSI1E", + [44] =3D "DSI1P", + [45] =3D "DFT", + [50] =3D "PULSE", + [53] =3D "SDC", + [54] =3D "ARM", + [55] =3D "AVEO", + [56] =3D "EMMC", +}; + +static bool is_ctldiv(hwaddr addr) +{ + return !!ctldiv_names[addr / 8]; +} + +static const char *rname(hwaddr addr) +{ + addr &=3D ~3; + switch (addr) { + case 0x100: return "OSCCOUNT"; + case 0x104 ... 0x110: + case 0x170: return "PLLx"; + case 0x114: return "LOCK"; + case 0x118: return "EVENT"; + default: { + int idx =3D addr / 8; + return ctldiv_names[idx] ? ctldiv_names[idx] : "UNKN"; + } + } +} + +static uint32_t scale(uint32_t value) +{ + return (1000ull * value) / 1024; +} + +static uint64_t bcm2835_cprman_read(void *opaque, hwaddr addr, unsigned si= ze) +{ + BCM2835CprmanState *s =3D (BCM2835CprmanState *)opaque; + bool is_div =3D addr % 8; + uint64_t value =3D s->regs[addr >> 2]; + + trace_bcm2835_cprman_rd(size << 3, addr, rname(addr), value); + if (is_ctldiv(addr)) { + if (is_div) { + trace_bcm2835_cprman_rd_div(rname(addr), + FIELD_EX32(value, CM_DIV, INTEGER), + scale(FIELD_EX32(value, CM_DIV, FR= AC))); + } else { + trace_bcm2835_cprman_rd_ctl(rname(addr), src_name(value & 0xf), + FIELD_EX32(value, CM_CTL, ENABLE)); + } + } else { + switch (addr & ~3) { + case 0x100 ... 0x118: + case 0x170: + qemu_log_mask(LOG_UNIMP, "[CM]: unimp r%02d PLL? 0x%04" + HWADDR_PRIx " =3D 0x%"PRIx64 "\n", + size << 3, addr, value); + value =3D -1; /* FIXME PLL lock? */ + break; + default: + qemu_log_mask(LOG_UNIMP, "[CM]: unimp r%02d ??? 0x%04" + HWADDR_PRIx " =3D 0x%"PRIx64 "\n", + size << 3, addr, value); + } + } + return value; +} + +#define CM_PASSWD 'Z' + +static void bcm2835_cprman_write(void *opaque, hwaddr addr, + uint64_t value, unsigned size) +{ + BCM2835CprmanState *s =3D (BCM2835CprmanState *)opaque; + bool is_div =3D addr % 8; + const char *name =3D rname(addr); + + if (FIELD_EX32(value, CM, PASSWD) !=3D CM_PASSWD) { + qemu_log_mask(LOG_GUEST_ERROR, "[CM]: password key error w%02d *0x= %04" + HWADDR_PRIx " =3D 0x%" PRIx64 " (%s= )\n", + size << 3, addr, value, name); + return; + } + value &=3D ~R_CM_PASSWD_MASK; + trace_bcm2835_cprman_wr(size << 3, addr, name, value); + + s->regs[addr >> 2] =3D value; + if (is_ctldiv(addr)) { + if (is_div) { + trace_bcm2835_cprman_wr_div(name, + FIELD_EX32(value, CM_DIV, INTEGER), + scale(FIELD_EX32(value, CM_DIV, FR= AC))); + } else { + trace_bcm2835_cprman_wr_ctl(name, src_name(value & 0xf), + FIELD_EX32(value, CM_CTL, ENABLE)); + } + } else { + switch (addr & ~3) { + case 0x100 ... 0x118: + case 0x170: + qemu_log_mask(LOG_UNIMP, "[CM]: unimp w%02d PLL? *0x%04" + HWADDR_PRIx " =3D 0x%" PRIx64 "\n", + size << 3, addr, value); + break; + default: + qemu_log_mask(LOG_UNIMP, "[CM]: unimp w%02d ??? 0x%04" + HWADDR_PRIx " =3D 0x%"PRIx64 "\n", + size << 3, addr, value); + } + } +} + +static const MemoryRegionOps bcm2835_cprman_ops =3D { + .read =3D bcm2835_cprman_read, + .write =3D bcm2835_cprman_write, + .impl.min_access_size =3D 4, + .valid.min_access_size =3D 4, + .endianness =3D DEVICE_NATIVE_ENDIAN, +}; + +static const VMStateDescription vmstate_bcm2835_cprman =3D { + .name =3D TYPE_BCM2835_CPRMAN, + .version_id =3D 1, + .minimum_version_id =3D 1, + .fields =3D (VMStateField[]) { + VMSTATE_UINT32_ARRAY(regs, BCM2835CprmanState, CPRMAN_NUM_REGS), + VMSTATE_END_OF_LIST() + } +}; + +static void bcm2835_cprman_reset(DeviceState *dev) +{ + BCM2835CprmanState *s =3D BCM2835_CPRMAN(dev); + int i; + + /* + * Available information suggests that CPRMAN registers have default + * values which are not overwritten by ROMMON (u-boot). The hardware + * default values are unknown at this time. + * The default values selected here are necessary and sufficient + * to boot Linux directly (on raspi2 and raspi3). The selected + * values enable all clocks and set clock rates to match their + * parent rates. + */ + for (i =3D 0; i < CPRMAN_NUM_REGS; i +=3D 2) { + if (!is_ctldiv(i * 4)) { + continue; + } + s->regs[i] =3D R_CM_CTL_ENABLE_MASK | (SRC_OSC << R_CM_CTL_SRC_SHI= FT); + s->regs[i + 1] =3D (1 << R_CM_DIV_FRAC_SHIFT); + } +} + +static void bcm2835_cprman_init(Object *obj) +{ + BCM2835CprmanState *s =3D BCM2835_CPRMAN(obj); + + memory_region_init_io(&s->iomem, obj, &bcm2835_cprman_ops, s, + TYPE_BCM2835_CPRMAN, 0x200); + sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem); +} + +static void bcm2835_cprman_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + + dc->reset =3D bcm2835_cprman_reset; + dc->vmsd =3D &vmstate_bcm2835_cprman; +} + +static TypeInfo bcm2835_cprman_info =3D { + .name =3D TYPE_BCM2835_CPRMAN, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(BCM2835CprmanState), + .class_init =3D bcm2835_cprman_class_init, + .instance_init =3D bcm2835_cprman_init, +}; + +static void bcm2835_cprman_register_types(void) +{ + type_register_static(&bcm2835_cprman_info); +} + +type_init(bcm2835_cprman_register_types) diff --git a/hw/misc/trace-events b/hw/misc/trace-events index 52466c77c4..3dea1d10ff 100644 --- a/hw/misc/trace-events +++ b/hw/misc/trace-events @@ -132,3 +132,11 @@ iotkit_sysinfo_write(uint64_t offset, uint64_t data, u= nsigned size) "IoTKit SysI iotkit_sysctl_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit = SysCtl read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" iotkit_sysctl_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit= SysCtl write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" iotkit_sysctl_reset(void) "IoTKit SysCtl: reset" + +# hw/misc/bcm2835_cprman.c +bcm2835_cprman_rd(unsigned size, uint64_t offset, const char *reg_name, ui= nt32_t value) "cprman: rd%u @0x%03" PRIx64 " %s val:0x%x" +bcm2835_cprman_rd_div(const char *reg_name, uint32_t v0, uint32_t v1) "cpr= man: rd %s.DIV float:%u.%u" +bcm2835_cprman_rd_ctl(const char *reg_name, const char *src, uint32_t ena)= "cprman: rd %s.CTL src:%s enabled:%u" +bcm2835_cprman_wr(unsigned size, uint64_t offset, const char *reg_name, ui= nt32_t value) "cprman: wr%u @0x%03" PRIx64 " %s val:0x%x" +bcm2835_cprman_wr_div(const char *reg_name, uint32_t v0, uint32_t v1) "cpr= man: wr %s.DIV float:%u.%u" +bcm2835_cprman_wr_ctl(const char *reg_name, const char *src, uint32_t ena)= "cprman: wr %s.CTL src:%s enabled:%u" diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_= peripherals.h index 6fb52d20a8..4e7e26eaed 100644 --- a/include/hw/arm/bcm2835_peripherals.h +++ b/include/hw/arm/bcm2835_peripherals.h @@ -18,6 +18,7 @@ #include "hw/dma/bcm2835_dma.h" #include "hw/intc/bcm2835_ic.h" #include "hw/misc/bcm2835_property.h" +#include "hw/misc/bcm2835_cprman.h" #include "hw/misc/bcm2835_rng.h" #include "hw/misc/bcm2835_mbox.h" #include "hw/sd/sdhci.h" @@ -39,7 +40,7 @@ typedef struct BCM2835PeripheralState { qemu_irq irq, fiq; =20 UnimplementedDeviceState pm; - UnimplementedDeviceState cprman; + BCM2835CprmanState cprman; UnimplementedDeviceState a2w; SysBusDevice *uart0; BCM2835AuxState aux; diff --git a/include/hw/misc/bcm2835_cprman.h b/include/hw/misc/bcm2835_cpr= man.h new file mode 100644 index 0000000000..376dd7c3a5 --- /dev/null +++ b/include/hw/misc/bcm2835_cprman.h @@ -0,0 +1,28 @@ +/* + * BCM2835 Poor-man's version of CPRMAN + * + * Copyright (C) 2018 Guenter Roeck + * + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + */ + +#ifndef BCM2835_CPRMAN_H +#define BCM2835_CPRMAN_H + +#include "hw/sysbus.h" + +#define TYPE_BCM2835_CPRMAN "bcm2835-cprman" +#define BCM2835_CPRMAN(obj) \ + OBJECT_CHECK(BCM2835CprmanState, (obj), TYPE_BCM2835_CPRMAN) + +#define CPRMAN_NUM_REGS (0x200 / 4) + +typedef struct { + SysBusDevice busdev; + MemoryRegion iomem; + + uint32_t regs[CPRMAN_NUM_REGS]; +} BCM2835CprmanState; + +#endif --=20 2.17.2