From nobody Wed May 1 15:45:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 15411044197001002.2438157523878; Thu, 1 Nov 2018 13:33:39 -0700 (PDT) Received: from localhost ([::1]:43882 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gIJer-0001CC-KC for importer@patchew.org; Thu, 01 Nov 2018 16:33:37 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44601) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gIJdt-0000MC-LJ for qemu-devel@nongnu.org; Thu, 01 Nov 2018 16:32:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gIJXu-0001He-Jc for qemu-devel@nongnu.org; Thu, 01 Nov 2018 16:26:31 -0400 Received: from mail-wr1-x443.google.com ([2a00:1450:4864:20::443]:36002) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gIJXr-0001Dc-4g for qemu-devel@nongnu.org; Thu, 01 Nov 2018 16:26:23 -0400 Received: by mail-wr1-x443.google.com with SMTP id y16so21340278wrw.3 for ; Thu, 01 Nov 2018 13:26:21 -0700 (PDT) Received: from cloudburst.Home ([2a02:c7f:504f:6300:a3de:88d8:75ae:bf4c]) by smtp.gmail.com with ESMTPSA id d7-v6sm4603315wmb.31.2018.11.01.13.26.18 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 01 Nov 2018 13:26:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=XBvbV7bZ7xmGvf9wR9HFNrx3l0OJ+MsQiKY+YWKEmvk=; b=Q8p+ZiWsnePIa5gkFKO6cmwBW9vK9+A+BlbTMbf/lxlnHV4mRbo37tO+X+4OyMHTMU KCezYuLhzqgQMZngpAKh7RwgztkntoYGd/Fu5a7Kf+3rYAjyNR6fQoG4hsJG+W0VUWdY FSSTDeSBxWm3IinuPnQUhT1kOFwGxeTsqdu50= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=XBvbV7bZ7xmGvf9wR9HFNrx3l0OJ+MsQiKY+YWKEmvk=; b=DS+tp/KxvXWLucMPQ0BUAAFlJ4fIgC1qxmAjUbUytX0mXToG0L0qb5tfI/g/+G6Xzj 6lfIgkPdudSW5tAcLDxEWJGwkQBduESaHwBQPRiJuz2xSWAMCarYOfcg+r52MoPYm7Fa g8Gvbk5yTvvF7YALttTWOpC9fod3uRwbnHpSoYG+r+mRxgMMF95X+oMOTYnVknDKIJ+q 5m/U6w+2YYTeZ/y+404L7WnzATpLEzgjwby2f8PUlYtVBpAVkQW4R1ZfCCXN5dbgxq6I ARbHvfI+d4n1Y0nfqF72gMMtYlvvqsh12i2xKlSkgwUkLYxKeAyqTp0VTIy84YgE2rDg mRIg== X-Gm-Message-State: AGRZ1gJZKeppZXPltwn68P2Ar2Qi5g5gqiF68ZxccbXV0/LMpPYfRTiH durluxh24bRf1+vF+84Ms5rKB4o9B7s= X-Google-Smtp-Source: AJdET5fCJ/QU/Kyc5iuP+FLB9cwJDUplMQvEU3xOZI/kDK8vL6Q6rdhr6Y2+2Igrfb97eld77d0TNA== X-Received: by 2002:adf:f24d:: with SMTP id b13-v6mr7313646wrp.142.1541103980034; Thu, 01 Nov 2018 13:26:20 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 1 Nov 2018 20:26:17 +0000 Message-Id: <20181101202617.6437-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::443 Subject: [Qemu-devel] [PATCH] softfloat: Don't execute divdeu without power7 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The divdeu instruction was added to ISA 2.06 (Power7). Exclude this block from older cpus. Fixes: 27ae5109a2ba (softfloat: Specialize udiv_qrnnd for ppc64) Reported-by: Laurent Vivier Signed-off-by: Richard Henderson Reviewed-by: Laurent Vivier Tested-by: Laurent Vivier --- include/fpu/softfloat-macros.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/fpu/softfloat-macros.h b/include/fpu/softfloat-macros.h index c86687fa5e..b1d772e6d4 100644 --- a/include/fpu/softfloat-macros.h +++ b/include/fpu/softfloat-macros.h @@ -647,8 +647,8 @@ static inline uint64_t udiv_qrnnd(uint64_t *r, uint64_t= n1, asm("dlgr %0, %1" : "+r"(n) : "r"(d)); *r =3D n >> 64; return n; -#elif defined(_ARCH_PPC64) - /* From Power ISA 3.0B, programming note for divdeu. */ +#elif defined(_ARCH_PPC64) && defined(_ARCH_PWR7) + /* From Power ISA 2.06, programming note for divdeu. */ uint64_t q1, q2, Q, r1, r2, R; asm("divdeu %0,%2,%4; divdu %1,%3,%4" : "=3D&r"(q1), "=3Dr"(q2) --=20 2.17.2