From nobody Thu Nov 6 12:33:46 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 154091490854968.65594495567575; Tue, 30 Oct 2018 08:55:08 -0700 (PDT) Received: from localhost ([::1]:54047 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gHWMF-0003pU-A6 for importer@patchew.org; Tue, 30 Oct 2018 11:55:07 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38403) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gHWDG-0003Uu-69 for qemu-devel@nongnu.org; Tue, 30 Oct 2018 11:45:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gHWDA-0005gA-Dt for qemu-devel@nongnu.org; Tue, 30 Oct 2018 11:45:46 -0400 Received: from steffen-goertz.de ([88.198.119.201]:60202) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gHWDA-0005Uo-0S for qemu-devel@nongnu.org; Tue, 30 Oct 2018 11:45:44 -0400 Received: from gouranga.nyu.edu (unknown [192.76.177.125]) by steffen-goertz.de (Postfix) with ESMTPSA id B000C4FADA; Tue, 30 Oct 2018 16:43:07 +0100 (CET) From: =?UTF-8?q?Steffen=20G=C3=B6rtz?= To: qemu-devel@nongnu.org Date: Tue, 30 Oct 2018 11:45:08 -0400 Message-Id: <20181030154510.29868-8-contrib@steffen-goertz.de> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181030154510.29868-1-contrib@steffen-goertz.de> References: <20181030154510.29868-1-contrib@steffen-goertz.de> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 88.198.119.201 Subject: [Qemu-devel] [PATCH v2 7/8] tests/microbit-test: Add Tests for nRF51 GPIO X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Peter Maydell , Jim Mussared , Stefan Hajnoczi , =?UTF-8?q?Steffen=20G=C3=B6rtz?= , Thomas Huth , Joel Stanley , Paolo Bonzini , Julia Suvorova Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" The test suite for the nRF51 GPIO peripheral for now only tests initial state. Additionally a set of tests testing an implementation detail of the model are included. Signed-off-by: Steffen G=C3=B6rtz --- tests/microbit-test.c | 122 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 122 insertions(+) diff --git a/tests/microbit-test.c b/tests/microbit-test.c index 953e00b17b..c59be59ede 100644 --- a/tests/microbit-test.c +++ b/tests/microbit-test.c @@ -20,6 +20,7 @@ =20 #include "hw/arm/nrf51.h" #include "hw/nvram/nrf51_nvm.h" +#include "hw/gpio/nrf51_gpio.h" =20 #define FLASH_SIZE (256 * NRF51_PAGE_SIZE) =20 @@ -100,6 +101,126 @@ static void test_nrf51_nvmc(void) } } =20 +static void test_nrf51_gpio(void) +{ + size_t i; + uint32_t actual, expected; + + struct { + hwaddr addr; + uint32_t expected; + } reset_state[] =3D { + {NRF51_GPIO_REG_OUT, 0x00000000}, {NRF51_GPIO_REG_OUTSET, 0x000000= 00}, + {NRF51_GPIO_REG_OUTCLR, 0x00000000}, {NRF51_GPIO_REG_IN, 0x0000000= 0}, + {NRF51_GPIO_REG_DIR, 0x00000000}, {NRF51_GPIO_REG_DIRSET, 0x000000= 00}, + {NRF51_GPIO_REG_DIRCLR, 0x00000000} + }; + + /* Check reset state */ + for (i =3D 0; i < ARRAY_SIZE(reset_state); i++) { + expected =3D reset_state[i].expected; + actual =3D readl(NRF51_GPIO_BASE + reset_state[i].addr); + g_assert_cmpuint(actual, =3D=3D, expected); + } + + for (i =3D 0; i < NRF51_GPIO_PINS; i++) { + expected =3D 0x00000002; + actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START + i * = 4); + g_assert_cmpuint(actual, =3D=3D, expected); + } + + /* Check dir bit consistency between dir and cnf */ + /* Check set via DIRSET */ + expected =3D 0x80000001; + writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIRSET, expected); + actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR); + g_assert_cmpuint(actual, =3D=3D, expected); + actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) & 0x01; + g_assert_cmpuint(actual, =3D=3D, 0x01); + actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01; + g_assert_cmpuint(actual, =3D=3D, 0x01); + + /* Check clear via DIRCLR */ + writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIRCLR, 0x80000001); + actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR); + g_assert_cmpuint(actual, =3D=3D, 0x00000000); + actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) & 0x01; + g_assert_cmpuint(actual, =3D=3D, 0x00); + actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01; + g_assert_cmpuint(actual, =3D=3D, 0x00); + + /* Check set via DIR */ + expected =3D 0x80000001; + writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR, expected); + actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR); + g_assert_cmpuint(actual, =3D=3D, expected); + actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) & 0x01; + g_assert_cmpuint(actual, =3D=3D, 0x01); + actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01; + g_assert_cmpuint(actual, =3D=3D, 0x01); + + /* Reset DIR */ + writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR, 0x00000000); + + /* Check Input propagates */ + writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x00); + set_irq_in("/machine/nrf51", "unnamed-gpio-in", 0, 0); + actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + g_assert_cmpuint(actual, =3D=3D, 0x00); + set_irq_in("/machine/nrf51", "unnamed-gpio-in", 0, 1); + actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + g_assert_cmpuint(actual, =3D=3D, 0x01); + set_irq_in("/machine/nrf51", "unnamed-gpio-in", 0, -1); + actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + g_assert_cmpuint(actual, =3D=3D, 0x01); + writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02); + + /* Check pull-up working */ + set_irq_in("/machine/nrf51", "unnamed-gpio-in", 0, 0); + writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0000); + actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + g_assert_cmpuint(actual, =3D=3D, 0x00); + writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b1110); + actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + g_assert_cmpuint(actual, =3D=3D, 0x01); + writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02); + + /* Check pull-down working */ + set_irq_in("/machine/nrf51", "unnamed-gpio-in", 0, 1); + writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0000); + actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + g_assert_cmpuint(actual, =3D=3D, 0x01); + writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0110); + actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + g_assert_cmpuint(actual, =3D=3D, 0x00); + writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02); + set_irq_in("/machine/nrf51", "unnamed-gpio-in", 0, -1); + + /* Check Output propagates */ + irq_intercept_out("/machine/nrf51"); + writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0011); + writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01); + g_assert_true(get_irq(0)); + writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTCLR, 0x01); + g_assert_false(get_irq(0)); + + /* Check self-stimulation */ + writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b01); + writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01); + actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + g_assert_cmpuint(actual, =3D=3D, 0x01); + + writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTCLR, 0x01); + actual =3D readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01; + g_assert_cmpuint(actual, =3D=3D, 0x00); + + /* Check short-circuit - generates an guest_error which must be checked + manually as long as qtest can not scan qemu_log messages */ + writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b01); + writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01); + set_irq_in("/machine/nrf51", "unnamed-gpio-in", 0, 0); +} + int main(int argc, char **argv) { int ret; @@ -109,6 +230,7 @@ int main(int argc, char **argv) global_qtest =3D qtest_startf("-machine microbit"); =20 qtest_add_func("/microbit/nrf51/nvmc", test_nrf51_nvmc); + qtest_add_func("/microbit/nrf51/gpio", test_nrf51_gpio); =20 ret =3D g_test_run(); =20 --=20 2.19.1