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Cota" To: qemu-devel@nongnu.org Date: Thu, 25 Oct 2018 13:20:37 -0400 Message-Id: <20181025172057.20414-29-cota@braap.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181025172057.20414-1-cota@braap.org> References: <20181025172057.20414-1-cota@braap.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 66.111.4.27 Subject: [Qemu-devel] [RFC 28/48] target/i386: prepare for 2-pass translation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Llu=C3=ADs=20Vilanova?= , Pavel Dovgalyuk , Stefan Hajnoczi Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Emilio G. Cota --- target/i386/translate.c | 35 ++++++++++++++++++++++++++++------- 1 file changed, 28 insertions(+), 7 deletions(-) diff --git a/target/i386/translate.c b/target/i386/translate.c index 86e59d7bf7..1d7b20bce3 100644 --- a/target/i386/translate.c +++ b/target/i386/translate.c @@ -142,6 +142,7 @@ typedef struct DisasContext { TCGv_i32 tmp3_i32; TCGv_i64 tmp1_i64; =20 + struct qemu_plugin_insn *plugin_insn; sigjmp_buf jmpbuf; } DisasContext; =20 @@ -1900,28 +1901,43 @@ static uint64_t advance_pc(CPUX86State *env, DisasC= ontext *s, int num_bytes) =20 static inline uint8_t x86_ldub_code(CPUX86State *env, DisasContext *s) { - return cpu_ldub_code(env, advance_pc(env, s, 1)); + uint8_t ret =3D cpu_ldub_code(env, advance_pc(env, s, 1)); + + qemu_plugin_insn_append(s->plugin_insn, &ret, sizeof(ret)); + return ret; } =20 static inline int16_t x86_ldsw_code(CPUX86State *env, DisasContext *s) { - return cpu_ldsw_code(env, advance_pc(env, s, 2)); + int16_t ret =3D cpu_ldsw_code(env, advance_pc(env, s, 2)); + + qemu_plugin_insn_append(s->plugin_insn, &ret, sizeof(ret)); + return ret; } =20 static inline uint16_t x86_lduw_code(CPUX86State *env, DisasContext *s) { - return cpu_lduw_code(env, advance_pc(env, s, 2)); + uint16_t ret =3D cpu_lduw_code(env, advance_pc(env, s, 2)); + + qemu_plugin_insn_append(s->plugin_insn, &ret, sizeof(ret)); + return ret; } =20 static inline uint32_t x86_ldl_code(CPUX86State *env, DisasContext *s) { - return cpu_ldl_code(env, advance_pc(env, s, 4)); + uint32_t ret =3D cpu_ldl_code(env, advance_pc(env, s, 4)); + + qemu_plugin_insn_append(s->plugin_insn, &ret, sizeof(ret)); + return ret; } =20 #ifdef TARGET_X86_64 static inline uint64_t x86_ldq_code(CPUX86State *env, DisasContext *s) { - return cpu_ldq_code(env, advance_pc(env, s, 8)); + uint64_t ret =3D cpu_ldq_code(env, advance_pc(env, s, 8)); + + qemu_plugin_insn_append(s->plugin_insn, &ret, sizeof(ret)); + return ret; } #endif =20 @@ -4473,7 +4489,8 @@ static void gen_sse(CPUX86State *env, DisasContext *s= , int b, =20 /* convert one instruction. s->base.is_jmp is set if the translation must be stopped. Return the next pc value */ -static target_ulong disas_insn(DisasContext *s, CPUState *cpu) +static target_ulong disas_insn(DisasContext *s, CPUState *cpu, + struct qemu_plugin_insn *plugin_insn) { CPUX86State *env =3D cpu->env_ptr; int b, prefixes; @@ -4484,6 +4501,8 @@ static target_ulong disas_insn(DisasContext *s, CPUSt= ate *cpu) int rex_w, rex_r; target_ulong pc_start =3D s->base.pc_next; =20 + s->plugin_insn =3D plugin_insn; + s->pc_start =3D s->pc =3D pc_start; s->override =3D -1; #ifdef TARGET_X86_64 @@ -8529,7 +8548,7 @@ static void i386_tr_translate_insn(DisasContextBase *= dcbase, CPUState *cpu, struct qemu_plugin_insn *plugin_insn) { DisasContext *dc =3D container_of(dcbase, DisasContext, base); - target_ulong pc_next =3D disas_insn(dc, cpu); + target_ulong pc_next =3D disas_insn(dc, cpu, plugin_insn); =20 if (dc->tf || (dc->base.tb->flags & HF_INHIBIT_IRQ_MASK)) { /* if single step mode, we generate only one instruction and @@ -8584,6 +8603,8 @@ static const TranslatorOps i386_tr_ops =3D { .translate_insn =3D i386_tr_translate_insn, .tb_stop =3D i386_tr_tb_stop, .disas_log =3D i386_tr_disas_log, + .ctx_base_offset =3D offsetof(DisasContext, base), + .ctx_size =3D sizeof(DisasContext), }; =20 /* generate intermediate code for basic block 'tb'. */ --=20 2.17.1