From nobody Thu Nov 6 03:25:49 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1539682896129821.7769868738885; Tue, 16 Oct 2018 02:41:36 -0700 (PDT) Received: from localhost ([::1]:56864 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gCLr5-0001Nb-1I for importer@patchew.org; Tue, 16 Oct 2018 05:41:35 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33877) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gCLmy-0007II-9h for qemu-devel@nongnu.org; Tue, 16 Oct 2018 05:37:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gCLmx-00010f-KX for qemu-devel@nongnu.org; Tue, 16 Oct 2018 05:37:20 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:51888) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gCLmu-0000qT-T2; Tue, 16 Oct 2018 05:37:17 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1gCLml-0003Xq-Ld; Tue, 16 Oct 2018 10:37:07 +0100 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Tue, 16 Oct 2018 10:37:02 +0100 Message-Id: <20181016093703.10637-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.19.0 In-Reply-To: <20181016093703.10637-1-peter.maydell@linaro.org> References: <20181016093703.10637-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PATCH 1/2] target/arm: Set S and PTW in 64-bit PAR format X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RDMRC_1 RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" In do_ats_write() we construct a PAR value based on the result of the translation. A comment says "S2WLK and FSTAGE are always zero, because we don't implement virtualization". Since we do in fact now implement virtualization, add the missing code that sets these bits based on the reported ARMMMUFaultInfo. (These bits are named PTW and S in ARMv8, so we follow that convention in the new comments in this patch.) Signed-off-by: Peter Maydell Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Edgar E. Iglesias --- target/arm/helper.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 43afdd082e1..dc849b09893 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -2344,10 +2344,12 @@ static uint64_t do_ats_write(CPUARMState *env, uint= 64_t value, =20 par64 |=3D 1; /* F */ par64 |=3D (fsr & 0x3f) << 1; /* FS */ - /* Note that S2WLK and FSTAGE are always zero, because we don't - * implement virtualization and therefore there can't be a sta= ge 2 - * fault. - */ + if (fi.stage2) { + par64 |=3D (1 << 9); /* S */ + } + if (fi.s1ptw) { + par64 |=3D (1 << 8); /* PTW */ + } } } else { /* fsr is a DFSR/IFSR value for the short descriptor --=20 2.19.0 From nobody Thu Nov 6 03:25:49 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1539682792891455.9465888977991; Tue, 16 Oct 2018 02:39:52 -0700 (PDT) Received: from localhost ([::1]:56853 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gCLpP-0000HP-Qs for importer@patchew.org; Tue, 16 Oct 2018 05:39:51 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33869) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gCLmx-0007Hw-UU for qemu-devel@nongnu.org; Tue, 16 Oct 2018 05:37:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gCLmv-0000zt-LV for qemu-devel@nongnu.org; Tue, 16 Oct 2018 05:37:18 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:51888) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gCLmt-0000qT-Oi; Tue, 16 Oct 2018 05:37:15 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1gCLmm-0003Y7-Ja; Tue, 16 Oct 2018 10:37:08 +0100 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Tue, 16 Oct 2018 10:37:03 +0100 Message-Id: <20181016093703.10637-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.19.0 In-Reply-To: <20181016093703.10637-1-peter.maydell@linaro.org> References: <20181016093703.10637-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PATCH 2/2] target/arm: Fix ATS1Hx instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RDMRC_1 RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" ATS1HR and ATS1HW (which allow AArch32 EL2 to do address translations on the EL2 translation regime) were implemented in commit 14db7fe09a2c8. However, we got them wrong: these should do stage 1 address translations as defined for NS-EL2, which is ARMMMUIdx_S1E2. We were incorrectly making them perform stage 2 translations. A few years later in commit 1313e2d7e2cd we forgot entirely that we'd implemented ATS1Hx, and added a comment that ATS1Hx were "not supported yet". Remove the comment; there is no extra code needed to handle these operations in do_ats_write(), because arm_s1_regime_using_lpae_format() returns true for ARMMMUIdx_S1E2, which forces 64-bit PAR format. Signed-off-by: Peter Maydell Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Edgar E. Iglesias --- target/arm/helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index dc849b09893..903a832f1fa 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -2316,7 +2316,7 @@ static uint64_t do_ats_write(CPUARMState *env, uint64= _t value, * * (Note that HCR.DC makes HCR.VM behave as if it is 1.) * - * ATS1Hx always uses the 64bit format (not supported yet). + * ATS1Hx always uses the 64bit format. */ format64 =3D arm_s1_regime_using_lpae_format(env, mmu_idx); =20 @@ -2441,7 +2441,7 @@ static void ats1h_write(CPUARMState *env, const ARMCP= RegInfo *ri, MMUAccessType access_type =3D ri->opc2 & 1 ? MMU_DATA_STORE : MMU_DATA= _LOAD; uint64_t par64; =20 - par64 =3D do_ats_write(env, value, access_type, ARMMMUIdx_S2NS); + par64 =3D do_ats_write(env, value, access_type, ARMMMUIdx_S1E2); =20 A32_BANKED_CURRENT_REG_SET(env, par, par64); } --=20 2.19.0