From nobody Thu Nov 6 04:23:21 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=mail.uni-paderborn.de Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 15393670186201015.2318726472395; Fri, 12 Oct 2018 10:56:58 -0700 (PDT) Received: from localhost ([::1]:42034 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gB1gH-0004Nz-Gw for importer@patchew.org; Fri, 12 Oct 2018 13:56:57 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40103) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gB1Ht-00020N-DV for qemu-devel@nongnu.org; Fri, 12 Oct 2018 13:31:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gB1Hq-0000S6-5p for qemu-devel@nongnu.org; Fri, 12 Oct 2018 13:31:45 -0400 Received: from mail.uni-paderborn.de ([131.234.142.9]:42814) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gB1Hp-0000EH-RG for qemu-devel@nongnu.org; Fri, 12 Oct 2018 13:31:42 -0400 Received: from pova.uni-paderborn.de ([131.234.189.23] helo=localhost.localdomain) by mail.uni-paderborn.de with esmtp (Exim 4.89 amazonia) id 1gB1Hb-0000NG-7y; Fri, 12 Oct 2018 19:31:27 +0200 Received: from mail.uni-paderborn.de by pova with queue id 2932990-2; Fri, 12 Oct 2018 17:31:27 GMT Received: from aftr-95-222-26-80.unity-media.net ([95.222.26.80] helo=schnipp.lan) by mail.uni-paderborn.de with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.89 nylar) id 1gB1Hb-0006OT-NV; Fri, 12 Oct 2018 19:31:27 +0200 X-Envelope-From: From: Bastian Koppelmann To: mjc@sifive.com, palmer@sifive.com, sagark@eecs.berkeley.edu, kbastian@mail.uni-paderborn.de Date: Fri, 12 Oct 2018 19:30:40 +0200 Message-Id: <20181012173047.25420-22-kbastian@mail.uni-paderborn.de> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181012173047.25420-1-kbastian@mail.uni-paderborn.de> References: <20181012173047.25420-1-kbastian@mail.uni-paderborn.de> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-PMX-Version: 6.4.5.2775670, Antispam-Engine: 2.7.2.2107409, Antispam-Data: 2018.10.12.172416, AntiVirus-Engine: 5.53.0, AntiVirus-Data: 2018.10.10.5530001 X-IMT-Spam-Score: 0.0 () X-IMT-Authenticated-Sender: X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 131.234.142.9 Subject: [Qemu-devel] [PATCH 21/28] target/riscv: Replace gen_store() with trans_store() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peer.adelt@hni.uni-paderborn.de, Alistair.Francis@wdc.com, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RDMRC_1 RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" With decodetree we don't need to convert RISC-V opcodes into to MemOps as gen_store() did. Signed-off-by: Bastian Koppelmann Signed-off-by: Peer Adelt --- target/riscv/insn_trans/trans_rvi.inc.c | 31 ++++++++++++++++------ target/riscv/translate.c | 34 ------------------------- 2 files changed, 23 insertions(+), 42 deletions(-) diff --git a/target/riscv/insn_trans/trans_rvi.inc.c b/target/riscv/insn_tr= ans/trans_rvi.inc.c index 873a5e8b53..b09c52a708 100644 --- a/target/riscv/insn_trans/trans_rvi.inc.c +++ b/target/riscv/insn_trans/trans_rvi.inc.c @@ -192,27 +192,42 @@ static bool trans_ld(DisasContext *ctx, arg_ld *a, ui= nt32_t insn) #endif } =20 -static bool trans_sb(DisasContext *ctx, arg_sb *a, uint32_t insn) +static bool trans_store(DisasContext *ctx, arg_sb *a, int memop) { - gen_store(ctx, OPC_RISC_SB, a->rs1, a->rs2, a->imm); + TCGv t0 =3D tcg_temp_new(); + TCGv dat =3D tcg_temp_new(); + gen_get_gpr(t0, a->rs1); + tcg_gen_addi_tl(t0, t0, a->imm); + gen_get_gpr(dat, a->rs2); + + if (memop < 0) { + return false; + } + + tcg_gen_qemu_st_tl(dat, t0, ctx->mem_idx, memop); + tcg_temp_free(t0); + tcg_temp_free(dat); return true; } + +static bool trans_sb(DisasContext *ctx, arg_sb *a, uint32_t insn) +{ + return trans_store(ctx, a, MO_SB); +} static bool trans_sh(DisasContext *ctx, arg_sh *a, uint32_t insn) { - gen_store(ctx, OPC_RISC_SH, a->rs1, a->rs2, a->imm); - return true; + return trans_store(ctx, a, MO_TESW); } + static bool trans_sw(DisasContext *ctx, arg_sw *a, uint32_t insn) { - gen_store(ctx, OPC_RISC_SW, a->rs1, a->rs2, a->imm); - return true; + return trans_store(ctx, a, MO_TESL); } =20 static bool trans_sd(DisasContext *ctx, arg_sd *a, uint32_t insn) { #ifdef TARGET_RISCV64 - gen_store(ctx, OPC_RISC_SD, a->rs1, a->rs2, a->imm); - return true; + return trans_store(ctx, a, MO_TEQ); #else return false; #endif diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 544e71a46c..feae31cb94 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -54,20 +54,6 @@ typedef struct DisasContext { int frm; } DisasContext; =20 -/* convert riscv funct3 to qemu memop for load/store */ -static const int tcg_memop_lookup[8] =3D { - [0 ... 7] =3D -1, - [0] =3D MO_SB, - [1] =3D MO_TESW, - [2] =3D MO_TESL, - [4] =3D MO_UB, - [5] =3D MO_TEUW, -#ifdef TARGET_RISCV64 - [3] =3D MO_TEQ, - [6] =3D MO_TEUL, -#endif -}; - #ifdef TARGET_RISCV64 #define CASE_OP_32_64(X) case X: case glue(X, W) #else @@ -488,26 +474,6 @@ static void gen_jal(CPURISCVState *env, DisasContext *= ctx, int rd, ctx->base.is_jmp =3D DISAS_NORETURN; } =20 -static void gen_store(DisasContext *ctx, uint32_t opc, int rs1, int rs2, - target_long imm) -{ - TCGv t0 =3D tcg_temp_new(); - TCGv dat =3D tcg_temp_new(); - gen_get_gpr(t0, rs1); - tcg_gen_addi_tl(t0, t0, imm); - gen_get_gpr(dat, rs2); - int memop =3D tcg_memop_lookup[(opc >> 12) & 0x7]; - - if (memop < 0) { - gen_exception_illegal(ctx); - return; - } - - tcg_gen_qemu_st_tl(dat, t0, ctx->mem_idx, memop); - tcg_temp_free(t0); - tcg_temp_free(dat); -} - static void gen_set_rm(DisasContext *ctx, int rm) { TCGv_i32 t0; --=20 2.19.1