From nobody Thu Nov 6 04:23:59 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=mail.uni-paderborn.de Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1539366579864128.482679521323; Fri, 12 Oct 2018 10:49:39 -0700 (PDT) Received: from localhost ([::1]:41987 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gB1Z6-0007Ni-1h for importer@patchew.org; Fri, 12 Oct 2018 13:49:32 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40067) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gB1Hr-0001xt-AI for qemu-devel@nongnu.org; Fri, 12 Oct 2018 13:31:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gB1Ho-0000Qg-2A for qemu-devel@nongnu.org; Fri, 12 Oct 2018 13:31:43 -0400 Received: from mail.uni-paderborn.de ([131.234.142.9]:37146) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gB1Hn-0000EC-N1 for qemu-devel@nongnu.org; Fri, 12 Oct 2018 13:31:39 -0400 Received: from magmaria.uni-paderborn.de ([131.234.189.24] helo=localhost.localdomain) by mail.uni-paderborn.de with esmtp (Exim 4.89 telepax) id 1gB1Ha-0001Gg-6B; Fri, 12 Oct 2018 19:31:27 +0200 Received: from mail.uni-paderborn.de by magmaria with queue id 2927549-3; Fri, 12 Oct 2018 17:31:26 GMT Received: from aftr-95-222-26-80.unity-media.net ([95.222.26.80] helo=schnipp.lan) by mail.uni-paderborn.de with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.89 nylar) id 1gB1Ha-0006OT-Oy; Fri, 12 Oct 2018 19:31:26 +0200 X-Envelope-From: From: Bastian Koppelmann To: mjc@sifive.com, palmer@sifive.com, sagark@eecs.berkeley.edu, kbastian@mail.uni-paderborn.de Date: Fri, 12 Oct 2018 19:30:39 +0200 Message-Id: <20181012173047.25420-21-kbastian@mail.uni-paderborn.de> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181012173047.25420-1-kbastian@mail.uni-paderborn.de> References: <20181012173047.25420-1-kbastian@mail.uni-paderborn.de> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-PMX-Version: 6.4.5.2775670, Antispam-Engine: 2.7.2.2107409, Antispam-Data: 2018.10.12.172416, AntiVirus-Engine: 5.53.0, AntiVirus-Data: 2018.10.10.5530001 X-IMT-Spam-Score: 0.0 () X-IMT-Authenticated-Sender: X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 131.234.142.9 Subject: [Qemu-devel] [PATCH 20/28] target/riscv: Replace gen_load() with trans_load() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peer.adelt@hni.uni-paderborn.de, Alistair.Francis@wdc.com, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RDMRC_1 RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" With decodetree we don't need to convert RISC-V opcodes into to MemOps as gen_load() did. Signed-off-by: Bastian Koppelmann Signed-off-by: Peer Adelt --- target/riscv/insn_trans/trans_rvi.inc.c | 44 +++++++++++++++++-------- target/riscv/translate.c | 20 ----------- 2 files changed, 30 insertions(+), 34 deletions(-) diff --git a/target/riscv/insn_trans/trans_rvi.inc.c b/target/riscv/insn_tr= ans/trans_rvi.inc.c index 6097b82df4..873a5e8b53 100644 --- a/target/riscv/insn_trans/trans_rvi.inc.c +++ b/target/riscv/insn_trans/trans_rvi.inc.c @@ -131,46 +131,62 @@ static bool trans_bgeu(DisasContext *ctx, arg_bgeu *a= , uint32_t insn) return trans_branch(ctx, a, TCG_COND_GEU); } =20 -static bool trans_lb(DisasContext *ctx, arg_lb *a, uint32_t insn) +static bool trans_load(DisasContext *ctx, arg_lb *a, int memop) { - gen_load(ctx, OPC_RISC_LB, a->rd, a->rs1, a->imm); + TCGv t0 =3D tcg_temp_new(); + TCGv t1 =3D tcg_temp_new(); + gen_get_gpr(t0, a->rs1); + tcg_gen_addi_tl(t0, t0, a->imm); + + if (memop < 0) { + return false; + } + + tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx, memop); + gen_set_gpr(a->rd, t1); + tcg_temp_free(t0); + tcg_temp_free(t1); return true; } + +static bool trans_lb(DisasContext *ctx, arg_lb *a, uint32_t insn) +{ + return trans_load(ctx, a, MO_SB); +} + static bool trans_lh(DisasContext *ctx, arg_lh *a, uint32_t insn) { - gen_load(ctx, OPC_RISC_LH, a->rd, a->rs1, a->imm); - return true; + return trans_load(ctx, a, MO_TESW); } + static bool trans_lw(DisasContext *ctx, arg_lw *a, uint32_t insn) { - gen_load(ctx, OPC_RISC_LW, a->rd, a->rs1, a->imm); - return true; + return trans_load(ctx, a, MO_TESL); } + static bool trans_lbu(DisasContext *ctx, arg_lbu *a, uint32_t insn) { - gen_load(ctx, OPC_RISC_LBU, a->rd, a->rs1, a->imm); - return true; + return trans_load(ctx, a, MO_UB); } + static bool trans_lhu(DisasContext *ctx, arg_lhu *a, uint32_t insn) { - gen_load(ctx, OPC_RISC_LHU, a->rd, a->rs1, a->imm); - return true; + return trans_load(ctx, a, MO_TEUW); } =20 static bool trans_lwu(DisasContext *ctx, arg_lwu *a, uint32_t insn) { #ifdef TARGET_RISCV64 - gen_load(ctx, OPC_RISC_LWU, a->rd, a->rs1, a->imm); - return true; + return trans_load(ctx, a, MO_TEUL); #else return false; #endif } + static bool trans_ld(DisasContext *ctx, arg_ld *a, uint32_t insn) { #ifdef TARGET_RISCV64 - gen_load(ctx, OPC_RISC_LD, a->rd, a->rs1, a->imm); - return true; + return trans_load(ctx, a, MO_TEQ); #else return false; #endif diff --git a/target/riscv/translate.c b/target/riscv/translate.c index b8a9b1c64b..544e71a46c 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -488,26 +488,6 @@ static void gen_jal(CPURISCVState *env, DisasContext *= ctx, int rd, ctx->base.is_jmp =3D DISAS_NORETURN; } =20 -static void gen_load(DisasContext *ctx, uint32_t opc, int rd, int rs1, - target_long imm) -{ - TCGv t0 =3D tcg_temp_new(); - TCGv t1 =3D tcg_temp_new(); - gen_get_gpr(t0, rs1); - tcg_gen_addi_tl(t0, t0, imm); - int memop =3D tcg_memop_lookup[(opc >> 12) & 0x7]; - - if (memop < 0) { - gen_exception_illegal(ctx); - return; - } - - tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx, memop); - gen_set_gpr(rd, t1); - tcg_temp_free(t0); - tcg_temp_free(t1); -} - static void gen_store(DisasContext *ctx, uint32_t opc, int rs1, int rs2, target_long imm) { --=20 2.19.1